Lines Matching +full:interconnect +full:- +full:names
4 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/am33xx.h>
14 #include <dt-bindings/clock/am3.h>
18 interrupt-parent = <&intc>;
19 #address-cells = <1>;
20 #size-cells = <1>;
33 d-can0 = &dcan0;
34 d-can1 = &dcan1;
49 #address-cells = <1>;
50 #size-cells = <0>;
52 compatible = "arm,cortex-a8";
53 enable-method = "ti,am3352";
57 operating-points-v2 = <&cpu0_opp_table>;
60 clock-names = "cpu";
62 clock-latency = <300000>; /* From omap-cpufreq driver */
63 cpu-idle-states = <&mpu_gate>;
66 idle-states {
68 compatible = "arm,idle-state";
69 entry-latency-us = <40>;
70 exit-latency-us = <90>;
71 min-residency-us = <300>;
72 ti,idle-wkup-m3;
77 cpu0_opp_table: opp-table {
78 compatible = "operating-points-v2-ti-cpu";
82 * The three following nodes are marked with opp-suspend
86 opp50-300000000 {
87 opp-hz = /bits/ 64 <300000000>;
88 opp-microvolt = <950000 931000 969000>;
89 opp-supported-hw = <0x06 0x0010>;
90 opp-suspend;
93 opp100-275000000 {
94 opp-hz = /bits/ 64 <275000000>;
95 opp-microvolt = <1100000 1078000 1122000>;
96 opp-supported-hw = <0x01 0x00FF>;
97 opp-suspend;
100 opp100-300000000 {
101 opp-hz = /bits/ 64 <300000000>;
102 opp-microvolt = <1100000 1078000 1122000>;
103 opp-supported-hw = <0x06 0x0020>;
104 opp-suspend;
107 opp100-500000000 {
108 opp-hz = /bits/ 64 <500000000>;
109 opp-microvolt = <1100000 1078000 1122000>;
110 opp-supported-hw = <0x01 0xFFFF>;
113 opp100-600000000 {
114 opp-hz = /bits/ 64 <600000000>;
115 opp-microvolt = <1100000 1078000 1122000>;
116 opp-supported-hw = <0x06 0x0040>;
119 opp120-600000000 {
120 opp-hz = /bits/ 64 <600000000>;
121 opp-microvolt = <1200000 1176000 1224000>;
122 opp-supported-hw = <0x01 0xFFFF>;
125 opp120-720000000 {
126 opp-hz = /bits/ 64 <720000000>;
127 opp-microvolt = <1200000 1176000 1224000>;
128 opp-supported-hw = <0x06 0x0080>;
131 oppturbo-720000000 {
132 opp-hz = /bits/ 64 <720000000>;
133 opp-microvolt = <1260000 1234800 1285200>;
134 opp-supported-hw = <0x01 0xFFFF>;
137 oppturbo-800000000 {
138 opp-hz = /bits/ 64 <800000000>;
139 opp-microvolt = <1260000 1234800 1285200>;
140 opp-supported-hw = <0x06 0x0100>;
143 oppnitro-1000000000 {
144 opp-hz = /bits/ 64 <1000000000>;
145 opp-microvolt = <1325000 1298500 1351500>;
146 opp-supported-hw = <0x04 0x0200>;
151 compatible = "arm,cortex-a8-pmu";
162 compatible = "ti,omap-infra";
164 compatible = "ti,omap3-mpu";
166 pm-sram = <&pm_sram_code
172 * XXX: Use a flat representation of the AM33XX interconnect.
173 * The real AM33XX interconnect network is quite complex. Since
179 compatible = "simple-bus";
180 #address-cells = <1>;
181 #size-cells = <1>;
185 l4_wkup: interconnect@44c00000 {
187 compatible = "ti,am3352-wkup-m3";
190 reg-names = "umem", "dmem";
192 ti,pm-firmware = "am335x-pm-firmware.elf";
195 l4_per: interconnect@48000000 {
197 l4_fw: interconnect@47c00000 {
199 l4_fast: interconnect@4a000000 {
201 l4_mpuss: interconnect@4b140000 {
204 intc: interrupt-controller@48200000 {
205 compatible = "ti,am33xx-intc";
206 interrupt-controller;
207 #interrupt-cells = <1>;
211 target-module@49000000 {
212 compatible = "ti,sysc-omap4", "ti,sysc";
214 reg-names = "rev";
216 clock-names = "fck";
217 #address-cells = <1>;
218 #size-cells = <1>;
222 compatible = "ti,edma3-tpcc";
224 reg-names = "edma3_cc";
226 interrupt-names = "edma3_ccint", "edma3_mperr",
228 dma-requests = <64>;
229 #dma-cells = <2>;
234 ti,edma-memcpy-channels = <20 21>;
238 target-module@49800000 {
239 compatible = "ti,sysc-omap4", "ti,sysc";
242 reg-names = "rev", "sysc";
243 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
244 ti,sysc-midle = <SYSC_IDLE_FORCE>;
245 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
248 clock-names = "fck";
249 #address-cells = <1>;
250 #size-cells = <1>;
254 compatible = "ti,edma3-tptc";
257 interrupt-names = "edma3_tcerrint";
261 target-module@49900000 {
262 compatible = "ti,sysc-omap4", "ti,sysc";
265 reg-names = "rev", "sysc";
266 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
267 ti,sysc-midle = <SYSC_IDLE_FORCE>;
268 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
271 clock-names = "fck";
272 #address-cells = <1>;
273 #size-cells = <1>;
277 compatible = "ti,edma3-tptc";
280 interrupt-names = "edma3_tcerrint";
284 target-module@49a00000 {
285 compatible = "ti,sysc-omap4", "ti,sysc";
288 reg-names = "rev", "sysc";
289 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
290 ti,sysc-midle = <SYSC_IDLE_FORCE>;
291 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
294 clock-names = "fck";
295 #address-cells = <1>;
296 #size-cells = <1>;
300 compatible = "ti,edma3-tptc";
303 interrupt-names = "edma3_tcerrint";
307 target-module@47810000 {
308 compatible = "ti,sysc-omap2", "ti,sysc";
312 reg-names = "rev", "sysc", "syss";
313 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
317 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
320 ti,syss-mask = <1>;
322 clock-names = "fck";
323 #address-cells = <1>;
324 #size-cells = <1>;
328 compatible = "ti,am335-sdhci";
329 ti,needs-special-reset;
336 usb: target-module@47400000 {
337 compatible = "ti,sysc-omap4", "ti,sysc";
340 reg-names = "rev", "sysc";
341 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
343 ti,sysc-midle = <SYSC_IDLE_FORCE>,
346 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
351 clock-names = "fck";
352 #address-cells = <1>;
353 #size-cells = <1>;
356 usb0_phy: usb-phy@1300 {
357 compatible = "ti,am335x-usb-phy";
359 reg-names = "phy";
361 #phy-cells = <0>;
365 compatible = "ti,musb-am33xx";
368 reg-names = "mc", "control";
371 interrupt-names = "mc";
374 mentor,num-eps = <16>;
375 mentor,ram-bits = <12>;
394 dma-names =
403 usb1_phy: usb-phy@1b00 {
404 compatible = "ti,am335x-usb-phy";
406 reg-names = "phy";
408 #phy-cells = <0>;
412 compatible = "ti,musb-am33xx";
415 reg-names = "mc", "control";
417 interrupt-names = "mc";
420 mentor,num-eps = <16>;
421 mentor,ram-bits = <12>;
440 dma-names =
449 cppi41dma: dma-controller@2000 {
450 compatible = "ti,am3359-cppi41";
455 reg-names = "glue", "controller", "scheduler", "queuemgr";
457 interrupt-names = "glue";
458 #dma-cells = <2>;
459 #dma-channels = <30>;
460 #dma-requests = <256>;
465 compatible = "mmio-sram";
468 #address-cells = <1>;
469 #size-cells = <1>;
471 pm_sram_code: pm-code-sram@0 {
474 protect-exec;
477 pm_sram_data: pm-data-sram@1000 {
485 compatible = "ti,emif-am3352";
491 ti,no-idle;
495 compatible = "ti,am3352-gpmc";
497 ti,no-idle-on-init;
501 dma-names = "rxtx";
502 gpmc,num-cs = <7>;
503 gpmc,num-waitpins = <2>;
504 #address-cells = <2>;
505 #size-cells = <1>;
506 interrupt-controller;
507 #interrupt-cells = <2>;
508 gpio-controller;
509 #gpio-cells = <2>;
513 sham_target: target-module@53100000 {
514 compatible = "ti,sysc-omap3-sham", "ti,sysc";
518 reg-names = "rev", "sysc", "syss";
519 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
521 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
524 ti,syss-mask = <1>;
527 clock-names = "fck";
528 #address-cells = <1>;
529 #size-cells = <1>;
533 compatible = "ti,omap4-sham";
537 dma-names = "rx";
541 aes_target: target-module@53500000 {
542 compatible = "ti,sysc-omap2", "ti,sysc";
546 reg-names = "rev", "sysc", "syss";
547 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
549 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
553 ti,syss-mask = <1>;
556 clock-names = "fck";
557 #address-cells = <1>;
558 #size-cells = <1>;
562 compatible = "ti,omap4-aes";
567 dma-names = "tx", "rx";
571 target-module@56000000 {
572 compatible = "ti,sysc-omap4", "ti,sysc";
575 reg-names = "rev", "sysc";
576 ti,sysc-midle = <SYSC_IDLE_FORCE>,
579 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
583 clock-names = "fck";
584 power-domains = <&prm_gfx>;
586 reset-names = "rstctrl";
587 #address-cells = <1>;
588 #size-cells = <1>;
599 #include "am33xx-l4.dtsi"
600 #include "am33xx-clocks.dtsi"
604 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
606 #reset-cells = <1>;
610 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
612 #reset-cells = <1>;
616 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
618 #reset-cells = <1>;
622 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
624 #power-domain-cells = <0>;
625 #reset-cells = <1>;
629 /* Preferred always-on timer for clocksource */
631 ti,no-reset-on-init;
632 ti,no-idle;
634 assigned-clocks = <&timer1_fck>;
635 assigned-clock-parents = <&sys_clkin_ck>;
641 ti,no-reset-on-init;
642 ti,no-idle;
644 assigned-clocks = <&timer2_fck>;
645 assigned-clock-parents = <&sys_clkin_ck>;