32 			       unsigned long sz, const int op, const int full_page);
34 void (*__dma_cache_wback_inv)(phys_addr_t start, unsigned long sz);
35 void (*__dma_cache_inv)(phys_addr_t start, unsigned long sz);
36 void (*__dma_cache_wback)(phys_addr_t start, unsigned long sz);
82 		unsigned int pad:24, way:2, lsz:2, sz:4;  in read_decode_cache_bcr_arcv2()  member
84 		unsigned int sz:4, lsz:2, way:2, pad:24;  in read_decode_cache_bcr_arcv2()
108 		p_slc->sz_k = 128 << slc_cfg.sz;  in read_decode_cache_bcr_arcv2()
148 		unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;  in read_decode_cache_bcr()  member
150 		unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;  in read_decode_cache_bcr()
168 	p_ic->sz_k = 1 << (ibcr.sz - 1);  in read_decode_cache_bcr()
191 	p_dc->sz_k = 1 << (dbcr.sz - 1);  in read_decode_cache_bcr()
251 			  unsigned long sz, const int op, const int full_page)  in __cache_line_loop_v2()  argument
270 		sz += paddr & ~CACHE_LINE_MASK;  in __cache_line_loop_v2()
275 	num_lines = DIV_ROUND_UP(sz, L1_CACHE_BYTES);  in __cache_line_loop_v2()
296 			  unsigned long sz, const int op, const int full_page)  in __cache_line_loop_v3()  argument
316 		sz += paddr & ~CACHE_LINE_MASK;  in __cache_line_loop_v3()
320 	num_lines = DIV_ROUND_UP(sz, L1_CACHE_BYTES);  in __cache_line_loop_v3()
367 			  unsigned long sz, const int op, const int full_page)  in __cache_line_loop_v4()  argument
386 		sz += paddr & ~CACHE_LINE_MASK;  in __cache_line_loop_v4()
390 	num_lines = DIV_ROUND_UP(sz, L1_CACHE_BYTES);  in __cache_line_loop_v4()
421 			  unsigned long sz, const int op, const int full_page)  in __cache_line_loop_v4()  argument
436 		sz += paddr & ~CACHE_LINE_MASK;  in __cache_line_loop_v4()
443 		sz += L1_CACHE_BYTES - 1;  in __cache_line_loop_v4()
455 	write_aux_reg(e, paddr + sz);	/* ENDR is exclusive */  in __cache_line_loop_v4()
575 #define __dc_line_op_k(p, sz, op)	__dc_line_op(p, p, sz, op)  argument
581 				unsigned long sz, const int op)  in __dc_line_op()  argument
583 	const int full_page = __builtin_constant_p(sz) && sz == PAGE_SIZE;  in __dc_line_op()
590 	__cache_line_loop(paddr, vaddr, sz, op, full_page);  in __dc_line_op()
602 #define __dc_line_op(paddr, vaddr, sz, op)  argument
603 #define __dc_line_op_k(paddr, sz, op)  argument
617 			  unsigned long sz)  in __ic_line_inv_vaddr_local()  argument
619 	const int full_page = __builtin_constant_p(sz) && sz == PAGE_SIZE;  in __ic_line_inv_vaddr_local()
623 	(*_cache_line_loop_ic_fn)(paddr, vaddr, sz, OP_INV_IC, full_page);  in __ic_line_inv_vaddr_local()
635 	int sz;  member
642         __ic_line_inv_vaddr_local(ic_inv->paddr, ic_inv->vaddr, ic_inv->sz);  in __ic_line_inv_vaddr_helper()
646 				unsigned long sz)  in __ic_line_inv_vaddr()  argument
651 		.sz    = sz  in __ic_line_inv_vaddr()
662 #define __ic_line_inv_vaddr(pstart, vstart, sz)  argument
666 noinline void slc_op_rgn(phys_addr_t paddr, unsigned long sz, const int op)  in slc_op_rgn()  argument
709 	end = paddr + sz + l2_line_sz - 1;  in slc_op_rgn()
729 noinline void slc_op_line(phys_addr_t paddr, unsigned long sz, const int op)  in slc_op_line()  argument
760 	sz += paddr & ~SLC_LINE_MASK;  in slc_op_line()
763 	num_lines = DIV_ROUND_UP(sz, l2_line_sz);  in slc_op_line()
779 #define slc_op(paddr, sz, op)	slc_op_rgn(paddr, sz, op)  argument
873 static void __dma_cache_wback_inv_l1(phys_addr_t start, unsigned long sz)  in __dma_cache_wback_inv_l1()  argument
875 	__dc_line_op_k(start, sz, OP_FLUSH_N_INV);  in __dma_cache_wback_inv_l1()
878 static void __dma_cache_inv_l1(phys_addr_t start, unsigned long sz)  in __dma_cache_inv_l1()  argument
880 	__dc_line_op_k(start, sz, OP_INV);  in __dma_cache_inv_l1()
883 static void __dma_cache_wback_l1(phys_addr_t start, unsigned long sz)  in __dma_cache_wback_l1()  argument
885 	__dc_line_op_k(start, sz, OP_FLUSH);  in __dma_cache_wback_l1()
892 static void __dma_cache_wback_inv_slc(phys_addr_t start, unsigned long sz)  in __dma_cache_wback_inv_slc()  argument
894 	__dc_line_op_k(start, sz, OP_FLUSH_N_INV);  in __dma_cache_wback_inv_slc()
895 	slc_op(start, sz, OP_FLUSH_N_INV);  in __dma_cache_wback_inv_slc()
898 static void __dma_cache_inv_slc(phys_addr_t start, unsigned long sz)  in __dma_cache_inv_slc()  argument
900 	__dc_line_op_k(start, sz, OP_INV);  in __dma_cache_inv_slc()
901 	slc_op(start, sz, OP_INV);  in __dma_cache_inv_slc()
904 static void __dma_cache_wback_slc(phys_addr_t start, unsigned long sz)  in __dma_cache_wback_slc()  argument
906 	__dc_line_op_k(start, sz, OP_FLUSH);  in __dma_cache_wback_slc()
907 	slc_op(start, sz, OP_FLUSH);  in __dma_cache_wback_slc()
913 void dma_cache_wback_inv(phys_addr_t start, unsigned long sz)  in dma_cache_wback_inv()  argument
915 	__dma_cache_wback_inv(start, sz);  in dma_cache_wback_inv()
919 void dma_cache_inv(phys_addr_t start, unsigned long sz)  in dma_cache_inv()  argument
921 	__dma_cache_inv(start, sz);  in dma_cache_inv()
925 void dma_cache_wback(phys_addr_t start, unsigned long sz)  in dma_cache_wback()  argument
927 	__dma_cache_wback(start, sz);  in dma_cache_wback()
975 		unsigned int off, sz;  in flush_icache_range()  local
981 		sz = min_t(unsigned int, tot_sz, PAGE_SIZE - off);  in flush_icache_range()
982 		__sync_icache_dcache(phy, kstart, sz);  in flush_icache_range()
983 		kstart += sz;  in flush_icache_range()
984 		tot_sz -= sz;  in flush_icache_range()
1132 SYSCALL_DEFINE3(cacheflush, uint32_t, start, uint32_t, sz, uint32_t, flags)  in SYSCALL_DEFINE3()  argument