Lines Matching refs:PTP
378 a HW PTP clock source, to allow time conversion in userspace and
379 optionally synchronize system time with a userspace PTP stack such
380 as linuxptp. For the PTP clock API, see Documentation/driver-api/ptp.rst.
537 /* PTP v1, UDP, any kind of event packet */
593 3.2 Special considerations for stacked PTP Hardware Clocks
596 There are situations when there may be more than one PHC (PTP Hardware Clock)
613 When a DSA switch is attached to a host port, PTP synchronization has to
615 jitter between the host port and its PTP partner. For this reason, some DSA
624 By design, PTP timestamping with a DSA switch does not need any special
626 host port also supports PTP timestamping, DSA will take care of intercepting
634 PTP event messages (any other packets, including PTP general messages, are not
639 have a PTP TX timestamp register (or sometimes a FIFO) where the timestamp
662 switches do. However, PHYs may be able to detect and timestamp PTP packets, for
666 A PHY driver that supports PTP timestamping must create a ``struct
720 trigger before the existence of stacked PTP clocks. One example has to do with
733 1. "TX": checks whether PTP timestamping has been previously enabled through
754 that PTP timestamping is not enabled for anything other than the outermost PHC,