Lines Matching +full:1 +full:qbv
84 - Mode 1 (VLAN-unaware): a port is in this mode when it is used as a standalone
87 bridge with ``vlan_filtering=1``. Access to the entire VLAN range is given to
93 bridge with ``vlan_filtering=1``, and the devlink property of its parent
104 | | Mode 1 | Mode 2 | Mode 3 |
118 # swp2 operates in Mode 1 now
121 ip link set dev br0 type bridge vlan_filtering 1
122 [ 61.204770] sja1105 spi0.1: Reset switch and programmed static config. Reason: VLAN filtering
123 [ 61.239944] sja1105 spi0.1: Disabled switch tagging
125 devlink dev param set spi/spi0.1 name best_effort_vlan_filtering value true cmode runtime
126 [ 64.682927] sja1105 spi0.1: Reset switch and programmed static config. Reason: VLAN filtering
127 [ 64.711925] sja1105 spi0.1: Enabled switch tagging
135 swp5 1 PVID Egress Untagged
137 swp2 1 PVID Egress Untagged
141 swp3 1 PVID Egress Untagged
143 swp4 1 PVID Egress Untagged
145 br0 1 PVID Egress Untagged
153 [ 3885.216832] sja1105 spi0.1: No more free subvlans
177 | | | SJA1105 1 | | SJA1105 2 | | |
181 | SJA1105 switch 1 | | SJA1105 switch 2 |
186 To reach the CPU, SJA1105 switch 1 (spi/spi2.1) uses the same port as is uses
193 devlink dev param set spi/spi2.1 name best_effort_vlan_filtering value true cmode runtime
200 ip link set dev br0 type bridge vlan_filtering 1
211 sw1p0 1 PVID Egress Untagged
214 sw1p1 1 PVID Egress Untagged
217 sw1p2 1 PVID Egress Untagged
220 sw1p3 1 PVID Egress Untagged
223 sw2p0 1 PVID Egress Untagged
226 sw2p1 1 PVID Egress Untagged
229 sw2p2 1 PVID Egress Untagged
232 sw2p3 1 PVID Egress Untagged
234 br0 1 PVID Egress Untagged
237 SJA1105 switch 1 consumes 1 retagging entry for each VLAN on each user port
238 towards the CPU. It also consumes 1 retagging entry for each non-pvid VLAN that
242 In this case, SJA1105 switch 1 consumes a total of 11 retagging entries, as
245 - 8 retagging entries for VLANs 1 and 100 installed on its user ports
249 interested in it. The VLAN 1 is a pvid on SJA1105 switch 2 and does not need
257 switch 1 (``sw1p0`` - ``sw1p3``).
274 ``vlan_filtering 1``.
283 ``vlan_filtering`` 0, or both 1). Also an inevitable limitation of the fact
305 If br0 has vlan_filtering 1, then a new br1 interface needs to be created that
317 specified in IEEE 802.1Q-2018 (formerly 802.1Qbv). This means it can be used to
335 on egress. Using ``vlan_filtering=1``, the behavior is the other way around:
342 Management traffic (having DMAC 01-80-C2-xx-xx-xx or 01-19-1B-xx-xx-xx) is the
359 local tc_list="$1"
363 mask=$((${mask} | (1 << ${tc})))
376 sec=$(echo "${now}" | gawk -F. '{ print $1; }')
377 base_time="$(((${sec} + 1) * ${NSEC_PER_SEC}))"
381 map 0 1 2 3 5 6 7 \
382 queues 1@0 1@1 1@2 1@3 1@4 1@5 1@6 1@7 \
385 sched-entry S $(gatemask "0 1 2 3 4 5 6") 400000 \
418 Example 1: send frames received on swp2 with a DA of 42:be:24:9b:76:20 to the
461 sec=$(echo $now | awk -F. '{print $1}') && \
467 sched-entry OPEN 60000 -1 -1 \
468 sched-entry CLOSE 40000 -1 -1 \
474 sec=$(echo $now | awk -F. '{print $1}') && \
479 map 0 1 2 3 4 5 6 7 \
480 queues 1@0 1@1 1@2 1@3 1@4 1@5 1@6 1@7 \
492 more than 1 ingress port, via flow blocks. In this case, the restriction of
496 tc qdisc add dev swp2 ingress_block 1 clsact
497 tc qdisc add dev swp3 ingress_block 1 clsact
498 tc filter add block 1 flower skip_sw dst_mac 42:be:24:9b:76:20 \
501 sched-entry OPEN 50000000 -1 -1 \
502 sched-entry CLOSE 50000000 -1 -1 \
528 In the RMII spec, the PHY can transmit extra out-of-band signals via RXD[1:0].