Lines Matching +full:4 +full:ns
31 address is written to $4a, then the whole Byte is written to
32 $48, while it doesn't matter how often you're writing to $4a
35 address just written. Make sure $4a is written before $48,
56 $c00-$cff IDE-Select 4 (Port 2, Register set 0,
124 A6=1 (for example $840 for port 0, register set 0), a 780ns
131 only the upper three bits are used (Bits 7 to 5). Bit 4
142 about 30ns to the clocks on the Zorro bus, that's why the
143 values are no multiple of 71. One clock-cycle is 71ns long
147 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
152 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
155 781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
158 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
160 value 4
161 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
167 1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
170 355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
176 781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive.
178 All the timings with a very short select-signal (the 355ns
181 bus interface, making the whole access 497ns long. This
190 clock cycle is shortened to a bit less than 70ns (not worth