Lines Matching refs:DFL

2 FPGA Device Feature List (DFL) Framework Overview
11 The Device Feature List (DFL) FPGA framework (and drivers according to
15 implement the DFL in the device memory. Besides this, the DFL framework
19 Device Feature List (DFL) Overview
21 Device Feature List (DFL) defines a linked list of feature headers within the
178 DFL Framework Overview
193                |   FPGA DFL Device Module   |
200 DFL framework in kernel provides common interfaces to create container device
207 The FPGA DFL Device could be different hardwares, e.g. PCIe device, platform
211 and related resources to common interfaces from DFL framework for enumeration.
215 automatically after FME platform device creation from the DFL device module. It
237 under this DFL framework.
254 This section describes the virtualization support on DFL based FPGA device to
279   |            DFL based FPGA PCIe Device             |
317   interfaces from DFL framework.
352 In the example below, two DFL based FPGA devices are installed in the host. Each
480 In Current DFL, 3 sub features (Port error, FME global error and AFU interrupt)
487 DFL framework, then new platform device driver needs to be developed for the
490 modification on DFL framework enumeration code too, for new FIU type detection
497 (e.g. FME or Port). Developers don't need to touch enumeration code in DFL
499 mmio resources can be found under FIU platform device created by DFL framework.