bindings/usb/snps%2Cdwc3.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare USB3 Controller
10   - Felipe Balbi <balbi@kernel.org>
14   be presented as a standalone DT node with an optional vendor-specific
18   - $ref: usb-drd.yaml#
19   - if:
25         - dr_mode
29       $ref: usb-xhci.yaml#
44       PHY is suspended. suspend clocks a small part of the USB3 core when
48   clock-names:
51         - enum: [bus_early, ref, suspend]
52         - true
54   usb-phy:
57       - description: USB2/HS PHY
58       - description: USB3/SS PHY
63       - description: USB2/HS PHY
64       - description: USB3/SS PHY
66   phy-names:
69       - const: usb2-phy
70       - const: usb3-phy
75   snps,usb2-lpm-disable:
76     description: Indicate if we don't want to enable USB2 HW LPM
80     description: Determines if platform is USB3 LPM capable
83   snps,dis-start-transfer-quirk:
85       When set, disable isoc START TRANSFER command failure SW work-around
86       for DWC_usb31 version 1.70a-ea06 and prior.
95   snps,has-lpm-erratum:
99   snps,lpm-nyet-threshold:
104     description: Set if we want to enable u2exit lfps quirk
108     description: Set if we enable P3 OK for U2/SS Inactive quirk
137     description: When set core will set Tx de-emphasis value
142       The value driven to the PHY is controlled by the LTSSM during USB3
147     description: When set core will disable USB3 suspend phy
160   snps,dis-u1-entry-quirk:
161     description: Set if link entering into U1 needs to be disabled
164   snps,dis-u2-entry-quirk:
165     description: Set if link entering into U2 needs to be disabled
173   snps,dis-u2-freeclk-exists-quirk:
176       PHY doesn't provide a free-running PHY clock.
179   snps,dis-del-phy-power-chg-quirk:
184   snps,dis-tx-ipgap-linecheck-quirk:
188   snps,parkmode-disable-ss-quirk:
195       When set, disable metastability workaround. CAUTION! Use only if you are
199   snps,dis-split-quirk:
202       avoid -EPROTO errors with usbhid on some devices (Hikey 970).
205   snps,is-utmi-l1-suspend:
211   snps,hird-threshold:
217       High-Speed PHY interface selection between UTMI+ and ULPI when the
222   snps,quirk-frame-length-adjustment:
224       Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame
229   snps,rx-thr-num-pkt-prd:
232       snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
238   snps,rx-max-burst-prd:
241       snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
247   snps,tx-thr-num-pkt-prd:
250       snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
256   snps,tx-max-burst-prd:
259       snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
265   tx-fifo-resize:
266     description: Determines if the TX fifos can be dynamically resized depending
267       on the number of IN endpoints used and if bursting is supported.  This
273   tx-fifo-max-num:
281   snps,incr-burst-type-adjustment:
285       enabled. If more than one value specified, undefined length INCR burst
288     $ref: /schemas/types.yaml#/definitions/uint32-array
298   - compatible
299   - reg
300   - interrupts
303   - |
308       usb-phy = <&usb2_phy>, <&usb3_phy>;
309       snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
311   - |
317       clock-names = "bus_early", "ref", "suspend";
319       phy-names = "usb2-phy", "usb3-phy";