bindings/usb/fsl%2Cimx8mp-dwc3.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: NXP iMX8MP Soc USB Controller
11   - Li Jun <jun.li@nxp.com>
15     const: fsl,imx8mp-dwc3
20       dwc3 core on the SOC.
22   "#address-cells":
25   "#size-cells":
28   dma-ranges:
41       A list of phandle and clock-specifier pairs for the clocks
42       listed in clock-names.
44       - description: system hsio root clock.
45       - description: suspend clock, used for usb wakeup logic.
47   clock-names:
49       - const: hsio
50       - const: suspend
55   "^dwc3@[0-9a-f]+$":
58       A child node must exist to represent the core DWC3 IP block
59       The content of the node is defined in dwc3.txt.
62   - compatible
63   - reg
64   - "#address-cells"
65   - "#size-cells"
66   - dma-ranges
67   - ranges
68   - clocks
69   - clock-names
70   - interrupts
75   - |
76     #include <dt-bindings/clock/imx8mp-clock.h>
77     #include <dt-bindings/interrupt-controller/arm-gic.h>
79       compatible = "fsl,imx8mp-dwc3";
83       clock-names = "hsio", "suspend";
85       #address-cells = <1>;
86       #size-cells = <1>;
87       dma-ranges = <0x40000000 0x40000000 0xc0000000>;
90       dwc3@38100000 {
91         compatible = "snps,dwc3";
96         clock-names = "bus_early", "ref", "suspend";
97         assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
98         assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
99         assigned-clock-rates = <500000000>;
102         phy-names = "usb2-phy", "usb3-phy";
103         snps,dis-u2-freeclk-exists-quirk;