bindings/spi/brcm%2Cspi-bcm-qspi.txt

6  MSPI : SPI master controller can read and write to a SPI slave device
7  BSPI : Broadcom SPI in combination with the MSPI hw IP provides acceleration
11  Supported Broadcom SoCs have one instance of MSPI+BSPI controller IP.
12  MSPI master can be used wihout BSPI. BRCMSTB SoCs have an additional instance
13  of a MSPI master without the BSPI to use with non flash slave devices that
26     "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on BRCMSTB SoCs
27     "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi" : Second Instance of MSPI
29     "brcm,spi-bcm7425-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
31     "brcm,spi-bcm7429-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
33     "brcm,spi-bcm7435-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
35     "brcm,spi-bcm7445-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
37     "brcm,spi-bcm7216-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
39     "brcm,spi-bcm7278-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
41     "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi"     : MSPI+BSPI on Cygnus, NSP
46     The required range is MSPI controller registers.
49     First name does not matter, but must be reserved for the MSPI controller
53     - "mspi_regs": MSPI register range is required for compatible strings
58     The interrupts used by the MSPI and/or BSPI controller.
61     Names of interrupts associated with MSPI
86   SPI Master (MSPI+BSPI) for SPI-NOR access:
148     MSPI master for any SPI device :