Lines Matching refs:BSPI
7 BSPI : Broadcom SPI in combination with the MSPI hw IP provides acceleration
11 Supported Broadcom SoCs have one instance of MSPI+BSPI controller IP.
12 MSPI master can be used wihout BSPI. BRCMSTB SoCs have an additional instance
13 of a MSPI master without the BSPI to use with non flash slave devices that
26 "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on BRCMSTB SoCs
41 "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on Cygnus, NSP
51 - "bspi_regs": BSPI register range, not required with compatible
58 The interrupts used by the MSPI and/or BSPI controller.
64 - "spi_lr_fullness_reached" : Linear read BSPI pipe full
65 - "spi_lr_session_aborted" : Linear read BSPI pipe aborted
66 - "spi_lr_impatient" : Linear read BSPI requested when pipe empty
67 - "spi_lr_session_done" : Linear read BSPI session done
86 SPI Master (MSPI+BSPI) for SPI-NOR access: