Lines Matching +full:reset +full:- +full:delay

5 - compatible: "rockchip,rk3308-codec"
6 - reg: The physical base address of the controller and length of memory
8 - rockchip,grf: The phandle of the syscon node for GRF register.
9 - clocks: A list of phandle + clock-specifer pairs, one for each entry in
10 clock-names.
11 - clock-names: It should be "acodec".
12 - resets : Must contain an entry for each entry in reset-names.
13 - reset-names : Must include the following entries: "acodec-reset".
16 - rockchip,enable-all-adcs: This is a boolean type property, that shows whether
19 * grp 0 -- select ADC1 / ADC2
20 * grp 1 -- select ADC3 / ADC4
21 * grp 2 -- select ADC5 / ADC6
22 * grp 3 -- select ADC7 / ADC8
26 - rockchip,adc-grps-route: This is a variable length array, that shows the
27 mapping route of ACODEC sdo to I2S sdi. By default, they are one-to-one
29 * sdi_0 <-- sdo_0
30 * sdi_1 <-- sdo_1
31 * sdi_2 <-- sdo_2
32 * sdi_3 <-- sdo_3
34 * sdi_0 <-- sdo_3
35 * sdi_1 <-- sdo_0
36 * sdi_2 <-- sdo_2
37 * sdi_3 <-- sdo_1
39 - rockchip,adc-grps-route = <3 0 2 1>;
41 - rockchip,delay-loopback-handle-ms: This property points out that the delay for
43 - rockchip,delay-start-play-ms: This property points out the delay ms of start
45 - rockchip,en-always-grps: This property will keep the needed ADCs enabled
47 - rockchip,loopback-grp: It points out the ADC group which is the loopback used.
48 - rockchip,no-deep-low-power: The codec will not enter deep low power mode
50 - rockchip,no-hp-det: If there is no headphone on boards, we don't need to
52 - rockchip,micbias1: Using internal micbias1 supply which are from codec.
53 - rockchip,micbias2: Using internal micbias2 supply which are from codec.
54 - hp-ctl-gpios: The gpio of head phone controller.
55 - pa-drv-gpios: The gpio of poweramplifier controller
56 - rockchip,delay-pa-drv-ms: This property points out that the delay for
58 - spk-ctl-gpios: The gpio of speak controller.
63 compatible = "rockchip,rk3308-codec";
67 clock-names = "acodec";
69 reset-names = "acodec-reset";
70 rockchip,loopback-grp = <0>;
71 hp-ctl-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
72 pa-drv-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
73 spk-ctl-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;