Lines Matching +full:pga +full:- +full:gain
5 - compatible: "everest,es8311"
6 - reg: the I2C address of the device for I2C
7 - spk-ctl-gpios: control spk enable/disable
10 - clocks: The phandle of the master clock to the CODEC
11 - clock-names: Should be "mclk"
12 - adc-pga-gain: The PGA Gain of ADC, the value range is: 0(0dB) ~ 10(30dB),
14 - adc-volume: The volume of ADC, range is: 0x00(-95dB) ~ 0xff(+32dB), 0dB is 0xbf.
15 - dac-volume: The volume of DAC, range is: 0x00(-95dB) ~ 0xff(+32dB), 0dB is 0xbf.
16 - aec-mode: The string of description AEC path between ADC and DAC, It should be:
24 And aec-mode is "adc left, adc right" by default, if the property
32 clock-names = "mclk";
33 adc-pga-gain = <0>; /* 0dB */
34 adc-volume = <0xbf>; /* 0dB */
35 dac-volume = <0xbf>; /* 0dB */
36 aec-mode = "dac left, adc right";
37 spk-ctl-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;