bindings/riscv/cpus.yaml

4 $id: http://devicetree.org/schemas/riscv/cpus.yaml#
36           - const: riscv
37       - const: riscv    # Simulator only
47       https://riscv.org/specifications/
50       - riscv,sv32
51       - riscv,sv39
52       - riscv,sv48
54   riscv,isa:
59       https://riscv.org/specifications/
62       insensitive, letters in the riscv,isa string must be all
81         const: riscv,cpu-intc
91   - riscv,isa
105                 compatible = "sifive,rocket0", "riscv";
111                 riscv,isa = "rv64imac";
114                         compatible = "riscv,cpu-intc";
120                 compatible = "sifive,rocket0", "riscv";
132                 mmu-type = "riscv,sv39";
134                 riscv,isa = "rv64imafdc";
138                         compatible = "riscv,cpu-intc";
152                 compatible = "riscv";
153                 riscv,isa = "rv64imafdc";
154                 mmu-type = "riscv,sv48";
158                         compatible = "riscv,cpu-intc";