bindings/pinctrl/ingenic%2Cpinctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   Please refer to pinctrl-bindings.txt in this directory for details of the
14   For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins
16   GPIO port configuration registers and it is typical to refer to pins using the
17   naming scheme "PxN" where x is a character identifying the GPIO port with
19   pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
20   and PB31 is the last pin in GPIO port B. The JZ4740, the X1000 and the X1830
21   contains 4 GPIO ports, PA to PD, for a total of 128 pins. The JZ4760, the
22   JZ4770 and the JZ4780 contains 6 GPIO ports, PA to PF, for a total of 192
26   - Paul Cercueil <paul@crapouillou.net>
30     pattern: "^pinctrl@[0-9a-f]+$"
34       - enum:
35           - ingenic,jz4740-pinctrl
36           - ingenic,jz4725b-pinctrl
37           - ingenic,jz4760-pinctrl
38           - ingenic,jz4770-pinctrl
39           - ingenic,jz4780-pinctrl
40           - ingenic,x1000-pinctrl
41           - ingenic,x1500-pinctrl
42           - ingenic,x1830-pinctrl
43       - items:
44           - const: ingenic,jz4760b-pinctrl
45           - const: ingenic,jz4760-pinctrl
46       - items:
47           - const: ingenic,x1000e-pinctrl
48           - const: ingenic,x1000-pinctrl
53   "#address-cells":
56   "#size-cells":
60   "^gpio@[0-9]$":
65           - ingenic,jz4740-gpio
66           - ingenic,jz4725b-gpio
67           - ingenic,jz4760-gpio
68           - ingenic,jz4770-gpio
69           - ingenic,jz4780-gpio
70           - ingenic,x1000-gpio
71           - ingenic,x1500-gpio
72           - ingenic,x1830-gpio
76           - description: The GPIO bank number
78       gpio-controller: true
80       "#gpio-cells":
83       gpio-ranges:
86       interrupt-controller: true
88       "#interrupt-cells":
91           Refer to ../interrupt-controller/interrupts.txt for more details.
97       - compatible
98       - reg
99       - gpio-controller
100       - "#gpio-cells"
101       - interrupts
102       - interrupt-controller
103       - "#interrupt-cells"
108   - compatible
109   - reg
110   - "#address-cells"
111   - "#size-cells"
115     - type: object
117         - $ref: pincfg-node.yaml#
118         - $ref: pinmux-node.yaml#
121         phandle: true
125         bias-disable: true
126         bias-pull-up: true
127         bias-pull-down: true
128         output-low: true
129         output-high: true
132     - type: object
134         phandle: true
138           - $ref: pincfg-node.yaml#
139           - $ref: pinmux-node.yaml#
142           phandle: true
146           bias-disable: true
147           bias-pull-up: true
148           bias-pull-down: true
149           output-low: true
150           output-high: true
154   - |
155     pin-controller@10010000 {
156       compatible = "ingenic,jz4770-pinctrl";
159       #address-cells = <1>;
160       #size-cells = <0>;
162       gpio@0 {
163         compatible = "ingenic,jz4770-gpio";
166         gpio-controller;
167         gpio-ranges = <&pinctrl 0 0 32>;
168         #gpio-cells = <2>;
170         interrupt-controller;
171         #interrupt-cells = <2>;
173         interrupt-parent = <&intc>;