Lines Matching full:phy

5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
8 title: Qualcomm QMP PHY controller
14 QMP phy controller supports physical layer functionality for a number of
20 - qcom,ipq8074-qmp-pcie-phy
21 - qcom,ipq8074-qmp-usb3-phy
22 - qcom,msm8996-qmp-pcie-phy
23 - qcom,msm8996-qmp-ufs-phy
24 - qcom,msm8996-qmp-usb3-phy
25 - qcom,msm8998-qmp-pcie-phy
26 - qcom,msm8998-qmp-ufs-phy
27 - qcom,msm8998-qmp-usb3-phy
28 - qcom,sdm845-qhp-pcie-phy
29 - qcom,sdm845-qmp-pcie-phy
30 - qcom,sdm845-qmp-ufs-phy
31 - qcom,sdm845-qmp-usb3-uni-phy
32 - qcom,sm8150-qmp-ufs-phy
33 - qcom,sm8250-qmp-ufs-phy
37 - description: Address and length of PHY's common serdes block.
66 vdda-phy-supply:
68 Phandle to a regulator supply to PHY core block.
72 Phandle to 1.8V regulator supply to PHY refclk pll block.
80 "^phy@[0-9a-f]+$":
83 Each device node of QMP phy is required to have as many child nodes as
84 the number of lanes the PHY has.
97 - vdda-phy-supply
108 - qcom,sdm845-qmp-usb3-uni-phy
113 - description: Phy aux clock.
114 - description: Phy config clock.
116 - description: Phy common block aux clock.
125 - description: reset of phy block.
126 - description: phy common block reset.
129 - const: phy
136 - qcom,msm8996-qmp-pcie-phy
141 - description: Phy aux clock.
142 - description: Phy config clock.
151 - description: reset of phy block.
152 - description: phy common block reset.
153 - description: phy's ahb cfg block reset.
156 - const: phy
164 - qcom,ipq8074-qmp-usb3-phy
165 - qcom,msm8996-qmp-usb3-phy
166 - qcom,msm8998-qmp-pcie-phy
167 - qcom,msm8998-qmp-usb3-phy
172 - description: Phy aux clock.
173 - description: Phy config clock.
182 - description: reset of phy block.
183 - description: phy common block reset.
186 - const: phy
193 - qcom,msm8996-qmp-ufs-phy
204 - description: PHY reset in the UFS controller.
213 - qcom,msm8998-qmp-ufs-phy
214 - qcom,sdm845-qmp-ufs-phy
215 - qcom,sm8150-qmp-ufs-phy
216 - qcom,sm8250-qmp-ufs-phy
222 - description: Phy reference aux clock.
229 - description: PHY reset in the UFS controller.
238 - qcom,ipq8074-qmp-pcie-phy
249 - description: reset of phy block.
250 - description: phy common block reset.
253 - const: phy
260 - qcom,sdm845-qhp-pcie-phy
261 - qcom,sdm845-qmp-pcie-phy
266 - description: Phy aux clock.
267 - description: Phy config clock.
269 - description: Phy refgen clk.
278 - description: reset of phy block.
281 - const: phy
286 usb_2_qmpphy: phy-wrapper@88eb000 {
287 compatible = "qcom,sdm845-qmp-usb3-uni-phy";
302 reset-names = "phy", "common";
304 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
307 usb_2_ssphy: phy@200 {
313 #phy-cells = <0>;