Lines Matching full:dp83867
5 $id: "http://devicetree.org/schemas/net/ti,dp83867.yaml#"
8 title: TI DP83867 ethernet PHY
17 The DP83867 device is a robust, low power, fully featured Physical Layer
21 The DP83867 is designed for easy implementation of 10/100/1000 Mbps Ethernet
52 Transmitt FIFO depth see dt-bindings/net/ti-dp83867.h for values
57 Receive FIFO depth see dt-bindings/net/ti-dp83867.h for values
62 Muxing option for CLK_OUT pin. See dt-bindings/net/ti-dp83867.h
69 RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
76 RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
88 ti,dp83867-rxctrl-strap-quirk:
106 Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable
116 #include <dt-bindings/net/ti-dp83867.h>