Lines Matching +full:mixed +full:- +full:burst
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
26 - snps,dwmac-3.70a
27 - snps,dwmac-3.710
28 - snps,dwmac-4.00
29 - snps,dwmac-4.10a
30 - snps,dwmac-4.20a
31 - snps,dwxgmac
32 - snps,dwxgmac-2.10
35 - st,spear600-gmac
38 - compatible
48 - allwinner,sun7i-a20-gmac
49 - allwinner,sun8i-a83t-emac
50 - allwinner,sun8i-h3-emac
51 - allwinner,sun8i-r40-emac
52 - allwinner,sun8i-v3s-emac
53 - allwinner,sun50i-a64-emac
54 - amlogic,meson6-dwmac
55 - amlogic,meson8b-dwmac
56 - amlogic,meson8m2-dwmac
57 - amlogic,meson-gxbb-dwmac
58 - amlogic,meson-axg-dwmac
59 - rockchip,px30-gmac
60 - rockchip,rk3128-gmac
61 - rockchip,rk3228-gmac
62 - rockchip,rk3288-gmac
63 - rockchip,rk3328-gmac
64 - rockchip,rk3366-gmac
65 - rockchip,rk3368-gmac
66 - rockchip,rk3399-gmac
67 - rockchip,rv1108-gmac
68 - snps,dwmac
69 - snps,dwmac-3.50a
70 - snps,dwmac-3.610
71 - snps,dwmac-3.70a
72 - snps,dwmac-3.710
73 - snps,dwmac-4.00
74 - snps,dwmac-4.10a
75 - snps,dwmac-4.20a
76 - snps,dwxgmac
77 - snps,dwxgmac-2.10
87 - description: Combined signal for various interrupt events
88 - description: The interrupt to manage the remote wake-up packet detection
89 - description: The interrupt that occurs when Rx exits the LPI state
91 interrupt-names:
95 - const: macirq
96 - const: eth_wake_irq
97 - const: eth_lpi
104 - description: GMAC main clock
105 - description: Peripheral registers interface clock
106 - description:
111 clock-names:
117 - stmmaceth
118 - pclk
119 - ptp_ref
126 reset-names:
129 mac-mode:
130 $ref: ethernet-controller.yaml#/properties/phy-connection-type
132 The property is identical to 'phy-mode', and assumes that there is mode
133 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
137 snps,axi-config:
147 * snps,blen, this is a vector of supported burst length.
148 * snps,fb, fixed-burst
149 * snps,mb, mixed-burst
150 * snps,rb, rebuild INCRx Burst
152 snps,mtl-rx-config:
157 * snps,rx-queues-to-use, number of RX queues to be used in the
160 * snps,rx-sched-sp, Strict priority
161 * snps,rx-sched-wsp, Weighted Strict priority
164 * snps,dcb-algorithm, Queue to be enabled as DCB
165 * snps,avb-algorithm, Queue to be enabled as AVB
166 * snps,map-to-dma-channel, Channel to map
168 * snps,route-avcp, AV Untagged Control packets
169 * snps,route-ptp, PTP Packets
170 * snps,route-dcbcp, DCB Control Packets
171 * snps,route-up, Untagged Packets
172 * snps,route-multi-broad, Multicast & Broadcast Packets
175 snps,mtl-tx-config:
180 * snps,tx-queues-to-use, number of TX queues to be used in the
183 * snps,tx-sched-wrr, Weighted Round Robin
184 * snps,tx-sched-wfq, Weighted Fair Queuing
185 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
186 * snps,tx-sched-sp, Strict priority
191 * snps,dcb-algorithm, TX queue will be working in DCB
192 * snps,avb-algorithm, TX queue will be working in AVB
202 snps,reset-gpio:
208 snps,reset-active-low:
214 snps,reset-delays-us:
217 Triplet of delays. The 1st cell is reset pre-delay in micro
219 cell is reset post-delay in micro seconds.
220 $ref: /schemas/types.yaml#definitions/uint32-array
227 Use Address-Aligned Beats
229 snps,fixed-burst:
232 Program the DMA to use the fixed burst mode
234 snps,mixed-burst:
237 Program the DMA to use the mixed burst mode
250 snps,en-tx-lpi-clockgating:
253 Enable gating of the MAC TX clock during TX low-power mode
255 snps,multicast-filter-bins:
261 snps,perfect-filter-entries:
267 snps,ps-speed:
274 snps,flow-ctrl:
286 const: snps,dwmac-mdio
289 - compatible
292 - compatible
293 - reg
294 - interrupts
295 - interrupt-names
296 - phy-mode
299 snps,reset-active-low: ["snps,reset-gpio"]
300 snps,reset-delay-us: ["snps,reset-gpio"]
303 - $ref: "ethernet-controller.yaml#"
304 - if:
309 - allwinner,sun7i-a20-gmac
310 - allwinner,sun8i-a83t-emac
311 - allwinner,sun8i-h3-emac
312 - allwinner,sun8i-r40-emac
313 - allwinner,sun8i-v3s-emac
314 - allwinner,sun50i-a64-emac
315 - snps,dwxgmac
316 - snps,dwxgmac-2.10
317 - st,spear600-gmac
323 Programmable Burst Length (tx and rx)
329 Tx Programmable Burst Length. If set, DMA tx will use this
336 Rx Programmable Burst Length. If set, DMA rx will use this
341 snps,no-pbl-x8:
347 - if:
352 - allwinner,sun7i-a20-gmac
353 - allwinner,sun8i-a83t-emac
354 - allwinner,sun8i-h3-emac
355 - allwinner,sun8i-r40-emac
356 - allwinner,sun8i-v3s-emac
357 - allwinner,sun50i-a64-emac
358 - snps,dwmac-4.00
359 - snps,dwmac-4.10a
360 - snps,dwmac-4.20a
361 - snps,dwxgmac
362 - snps,dwxgmac-2.10
363 - st,spear600-gmac
376 - |
377 stmmac_axi_setup: stmmac-axi-config {
383 mtl_rx_setup: rx-queues-config {
384 snps,rx-queues-to-use = <1>;
385 snps,rx-sched-sp;
387 snps,dcb-algorithm;
388 snps,map-to-dma-channel = <0x0>;
393 mtl_tx_setup: tx-queues-config {
394 snps,tx-queues-to-use = <2>;
395 snps,tx-sched-wrr;
398 snps,dcb-algorithm;
403 snps,avb-algorithm;
413 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
415 interrupt-parent = <&vic1>;
417 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
418 mac-address = [000000000000]; /* Filled in by U-Boot */
419 max-frame-size = <3800>;
420 phy-mode = "gmii";
421 snps,multicast-filter-bins = <256>;
422 snps,perfect-filter-entries = <128>;
423 rx-fifo-depth = <16384>;
424 tx-fifo-depth = <16384>;
426 clock-names = "stmmaceth";
427 snps,axi-config = <&stmmac_axi_setup>;
428 snps,mtl-rx-config = <&mtl_rx_setup>;
429 snps,mtl-tx-config = <&mtl_tx_setup>;
431 #address-cells = <1>;
432 #size-cells = <0>;
433 compatible = "snps,dwmac-mdio";
434 phy1: ethernet-phy@0 {