Lines Matching full:smi
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
8 title: SMI (Smart Multimedia Interface) Common
16 MediaTek SMI have two generations of HW architecture, here is the list
21 There's slight differences between the two SMI, for generation 2, the
23 for generation 1, the register is at smi ao base(smi always on register
24 base). Besides that, the smi async clock should be prepared and enabled for
25 SMI generation 1 to transform the smi clock into emi clock domain, but that is
26 not needed for SMI generation 2.
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
34 - mediatek,mt6779-smi-common
35 - mediatek,mt8167-smi-common
36 - mediatek,mt8173-smi-common
37 - mediatek,mt8183-smi-common
41 - const: mediatek,mt7623-smi-common
42 - const: mediatek,mt2701-smi-common
52 apb and smi are mandatory. the async is only for generation 1 smi HW.
59 - description: smi is the clock for transfer data and command.
60 - description: async is asynchronous clock, it help transform the smi
82 - mediatek,mt2701-smi-common
91 - const: smi
98 - mediatek,mt6779-smi-common
99 - mediatek,mt8183-smi-common
109 - const: smi
121 - const: smi
130 smi_common: smi@14022000 {
131 compatible = "mediatek,mt8173-smi-common";
136 clock-names = "apb", "smi";