Lines Matching +full:smi +full:- +full:larb
6 - compatible: "mediatek,mt8173-mdp"
7 - mediatek,vpu: the node of video processor unit, see
8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details.
11 - compatible: Should be one of
12 "mediatek,mt8173-mdp-rdma" - read DMA
13 "mediatek,mt8173-mdp-rsz" - resizer
14 "mediatek,mt8173-mdp-wdma" - write DMA
15 "mediatek,mt8173-mdp-wrot" - write DMA with rotation
16 - reg: Physical base address and length of the function block register space
17 - clocks: device clocks, see
18 Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
19 - power-domains: a phandle to the power domain, see
23 - compatible: Should be one of
24 "mediatek,mt8173-mdp-rdma"
25 "mediatek,mt8173-mdp-wdma"
26 "mediatek,mt8173-mdp-wrot"
27 - iommus: should point to the respective IOMMU block with master port as
30 - mediatek,larb: must contain the local arbiters in the current Socs, see
31 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
36 compatible = "mediatek,mt8173-mdp-rdma";
37 "mediatek,mt8173-mdp";
41 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
43 mediatek,larb = <&larb0>;
48 compatible = "mediatek,mt8173-mdp-rdma";
52 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
54 mediatek,larb = <&larb4>;
58 compatible = "mediatek,mt8173-mdp-rsz";
61 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
65 compatible = "mediatek,mt8173-mdp-rsz";
68 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
72 compatible = "mediatek,mt8173-mdp-rsz";
75 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
79 compatible = "mediatek,mt8173-mdp-wdma";
82 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
84 mediatek,larb = <&larb0>;
88 compatible = "mediatek,mt8173-mdp-wrot";
91 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
93 mediatek,larb = <&larb0>;
97 compatible = "mediatek,mt8173-mdp-wrot";
100 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
102 mediatek,larb = <&larb4>;