Lines Matching full:ipmmu
4 $id: http://devicetree.org/schemas/iommu/renesas,ipmmu-vmsa.yaml#
13 The IPMMU is an IOMMU implementation compatible with the ARM VMSA page tables.
15 connected to the IPMMU through a port called micro-TLB.
22 - renesas,ipmmu-r8a73a4 # R-Mobile APE6
23 - renesas,ipmmu-r8a7742 # RZ/G1H
24 - renesas,ipmmu-r8a7743 # RZ/G1M
25 - renesas,ipmmu-r8a7744 # RZ/G1N
26 - renesas,ipmmu-r8a7745 # RZ/G1E
27 - renesas,ipmmu-r8a7790 # R-Car H2
28 - renesas,ipmmu-r8a7791 # R-Car M2-W
29 - renesas,ipmmu-r8a7793 # R-Car M2-N
30 - renesas,ipmmu-r8a7794 # R-Car E2
31 - const: renesas,ipmmu-vmsa # R-Mobile APE6 or R-Car Gen2 or RZ/G1
34 - renesas,ipmmu-r8a774a1 # RZ/G2M
35 - renesas,ipmmu-r8a774b1 # RZ/G2N
36 - renesas,ipmmu-r8a774c0 # RZ/G2E
37 - renesas,ipmmu-r8a774e1 # RZ/G2H
38 - renesas,ipmmu-r8a7795 # R-Car H3
39 - renesas,ipmmu-r8a7796 # R-Car M3-W
40 - renesas,ipmmu-r8a77961 # R-Car M3-W+
41 - renesas,ipmmu-r8a77965 # R-Car M3-N
42 - renesas,ipmmu-r8a77970 # R-Car V3M
43 - renesas,ipmmu-r8a77980 # R-Car V3H
44 - renesas,ipmmu-r8a77990 # R-Car E3
45 - renesas,ipmmu-r8a77995 # R-Car D3
67 renesas,ipmmu-main:
70 Reference to the main IPMMU phandle plus 1 cell. The cell is
71 the interrupt bit number associated with the particular cache IPMMU
72 device. The interrupt bit number needs to match the main IPMMU IMSSTR
73 register. Only used by cache IPMMU instances.
85 - renesas,ipmmu-main
96 compatible = "renasas,ipmmu-r8a7791", "renasas,ipmmu-vmsa";