bindings/interrupt-controller/qcom%2Cpdc.txt

4 Power Domain Controller (PDC) that is on always-on domain. In addition to
7 well detect interrupts when the GIC is non-operational.
9 GIC is parent interrupt controller at the highest level. Platform interrupt
11 wakeup capabilities of their device interrupts routed through the PDC, must
17 - compatible:
20 	Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc"
21 		    - "qcom,sc7180-pdc": For SC7180
22 		    - "qcom,sdm845-pdc": For SDM845
24 - reg:
26 	Value type: <prop-encoded-array>
29 		    need to be configured for wakeup capable GPIOs routed to
32 - interrupt-cells:
42 - interrupt-controller:
47 - qcom,pdc-ranges:
57 - qcom,scm-spi-cfg:
66 	pdc: interrupt-controller@b220000 {
67 		compatible = "qcom,sdm845-pdc";
69 		qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
70 		#interrupt-cells = <2>;
71 		interrupt-parent = <&intc>;
72 		interrupt-controller;
73 		qcom,scm-spi-cfg;
76 DT binding of a device that wants to use the GIC SPI 514 as a wakeup
77 interrupt, must do -
79 	wake-device {
80 		interrupts-extended = <&pdc 2 IRQ_TYPE_LEVEL_HIGH>;
84 the qcom,pdc-ranges property.