Lines Matching full:rockchip

1 * Rockchip rk3399 DMC (Dynamic Memory Controller) device
4 - compatible: Must be "rockchip,rk3399-dmc".
7 rockchip-dfi.txt
21 - rockchip,pmu: Phandle to the syscon managing the "PMU general register
26 - rockchip,dram_speed_bin : Value reference include/dt-bindings/clock/rk3399-ddr.h,
32 - rockchip,pd_idle : Configure the PD_IDLE value. Defines the
37 - rockchip,sr_idle : Configure the SR_IDLE value. Defines the
44 - rockchip,sr_mc_gate_idle : Defines the memory self-refresh and controller
50 - rockchip,srpd_lite_idle : Defines the self-refresh power down idle
56 - rockchip,standby_idle : Defines the standby idle period in which
62 - rockchip,dram_dll_dis_freq : Defines the DDR3 DLL bypass frequency in MHz.
67 - rockchip,phy_dll_dis_freq : Defines the PHY dll bypass frequency in
72 - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines
78 - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
82 - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
86 - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
91 - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
95 - rockchip,phy_ddr3_odt : When the DRAM type is DDR3, this parameter defines
99 - rockchip,lpddr3_odt_dis_freq : When the DRAM type is LPDDR3, this parameter defines
105 - rockchip,lpddr3_drv : When the DRAM type is LPDDR3, this parameter defines
109 - rockchip,lpddr3_odt : When the DRAM type is LPDDR3, this parameter defines
113 - rockchip,phy_lpddr3_ca_drv : When the DRAM type is LPDDR3, this parameter defines
118 - rockchip,phy_lpddr3_dq_drv : When the DRAM type is LPDDR3, this parameter defines
123 - rockchip,phy_lpddr3_odt : When dram type is LPDDR3, this parameter define
127 - rockchip,lpddr4_odt_dis_freq : When the DRAM type is LPDDR4, this parameter
133 - rockchip,lpddr4_drv : When the DRAM type is LPDDR4, this parameter defines
137 - rockchip,lpddr4_dq_odt : When the DRAM type is LPDDR4, this parameter defines
141 - rockchip,lpddr4_ca_odt : When the DRAM type is LPDDR4, this parameter defines
145 - rockchip,phy_lpddr4_ca_drv : When the DRAM type is LPDDR4, this parameter defines
150 - rockchip,phy_lpddr4_ck_cs_drv : When the DRAM type is LPDDR4, this parameter defines
154 - rockchip,phy_lpddr4_dq_drv : When the DRAM type is LPDDR4, this parameter defines
158 - rockchip,phy_lpddr4_odt : When the DRAM type is LPDDR4, this parameter defines
177 compatible = "rockchip,rk3399-dmc";
186 rockchip,ddr3_speed_bin = <21>;
187 rockchip,pd_idle = <0x40>;
188 rockchip,sr_idle = <0x2>;
189 rockchip,sr_mc_gate_idle = <0x3>;
190 rockchip,srpd_lite_idle = <0x4>;
191 rockchip,standby_idle = <0x2000>;
192 rockchip,dram_dll_dis_freq = <300>;
193 rockchip,phy_dll_dis_freq = <125>;
194 rockchip,auto_pd_dis_freq = <666>;
195 rockchip,ddr3_odt_dis_freq = <333>;
196 rockchip,ddr3_drv = <DDR3_DS_40ohm>;
197 rockchip,ddr3_odt = <DDR3_ODT_120ohm>;
198 rockchip,phy_ddr3_ca_drv = <PHY_DRV_ODT_40>;
199 rockchip,phy_ddr3_dq_drv = <PHY_DRV_ODT_40>;
200 rockchip,phy_ddr3_odt = <PHY_DRV_ODT_240>;
201 rockchip,lpddr3_odt_dis_freq = <333>;
202 rockchip,lpddr3_drv = <LP3_DS_34ohm>;
203 rockchip,lpddr3_odt = <LP3_ODT_240ohm>;
204 rockchip,phy_lpddr3_ca_drv = <PHY_DRV_ODT_40>;
205 rockchip,phy_lpddr3_dq_drv = <PHY_DRV_ODT_40>;
206 rockchip,phy_lpddr3_odt = <PHY_DRV_ODT_240>;
207 rockchip,lpddr4_odt_dis_freq = <333>;
208 rockchip,lpddr4_drv = <LP4_PDDS_60ohm>;
209 rockchip,lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>;
210 rockchip,lpddr4_ca_odt = <LP4_CA_ODT_40ohm>;
211 rockchip,phy_lpddr4_ca_drv = <PHY_DRV_ODT_40>;
212 rockchip,phy_lpddr4_ck_cs_drv = <PHY_DRV_ODT_80>;
213 rockchip,phy_lpddr4_dq_drv = <PHY_DRV_ODT_80>;
214 rockchip,phy_lpddr4_odt = <PHY_DRV_ODT_60>;