bindings/clock/idt%2Cversaclock5.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16   - 5P49V5923:
17     0 -- OUT0_SEL_I2CB
18     1 -- OUT1
19     2 -- OUT2
21   - 5P49V5933:
22     0 -- OUT0_SEL_I2CB
23     1 -- OUT1
24     2 -- OUT4
26   - other parts:
27     0 -- OUT0_SEL_I2CB
28     1 -- OUT1
29     2 -- OUT2
30     3 -- OUT3
31     4 -- OUT4
34   - Luca Ceresoli <luca@lucaceresoli.net>
39       - idt,5p49v5923
40       - idt,5p49v5925
41       - idt,5p49v5933
42       - idt,5p49v5935
43       - idt,5p49v6901
44       - idt,5p49v6965
50   '#clock-cells':
53   clock-names:
63   "^OUT[1-4]$":
72           The output drive mode. Values defined in dt-bindings/clk/versaclock.h
76       idt,voltage-microvolt:
79       idt,slew-percent:
80         description: The Slew rate control for CMOS single-ended.
85   - compatible
86   - reg
87   - '#clock-cells'
90   - if:
94             - idt,5p49v5933
95             - idt,5p49v5935
99         clock-names:
106         - clock-names
107         - clocks
112   - |
113     #include <dt-bindings/clk/versaclock.h>
117         compatible = "fixed-clock";
118         #clock-cells = <0>;
119         clock-frequency = <25000000>;
124         #address-cells = <1>;
125         #size-cells = <0>;
128         vc5: clock-generator@6a {
131             #clock-cells = <1>;
135             clock-names = "xin";
138                 idt,drive-mode = <VC5_CMOSD>;
139                 idt,voltage-microvolts = <1800000>;
140                 idt,slew-percent = <80>;
144                 idt,drive-mode = <VC5_LVDS>;