bindings/clock/clk-exynos-audss.txt

1 * Samsung Audio Subsystem Clock Controller
3 The Samsung Audio Subsystem clock controller generates and supplies clocks
4 to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
9 - compatible: should be one of the following:
10   - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs.
11   - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250
13   - "samsung,exynos5410-audss-clock" - controller compatible with Exynos5410
15   - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420
17 - reg: physical base address and length of the controller's register set.
19 - #clock-cells: should be 1.
21 - clocks:
22   - pll_ref: Fixed rate PLL reference clock, parent of mout_audss. "fin_pll"
24   - pll_in: Input PLL to the AudioSS block, parent of mout_audss. "fout_epll"
26   - cdclk: External i2s clock, parent of mout_i2s. "cdclk0" is used if not
28   - sclk_audio: Audio bus clock, parent of mout_i2s. "sclk_audio0" is used if
30   - sclk_pcm_in: PCM clock, parent of sclk_pcm.  "sclk_pcm0" is used if not
33 - clock-names: Aliases for the above clocks. They should be "pll_ref",
38   - power-domains: a phandle to respective power domain node as described by
42 The following is the list of clocks generated by the controller. Each clock is
44 clock which they consume. Some of the clocks are available only on a particular
49 Clock           ID      SoC (if specific)
50 -----------------------------------------------
64 Example 1: An example of a clock controller node using the default input
65 	   clock names is listed below.
67 clock_audss: audss-clock-controller@3810000 {
68 	compatible = "samsung,exynos5250-audss-clock";
70 	#clock-cells = <1>;
73 Example 2: An example of a clock controller node with the input clocks
76 clock_audss: audss-clock-controller@3810000 {
77 	compatible = "samsung,exynos5250-audss-clock";
79 	#clock-cells = <1>;
80 	clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>,
82 	clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in", "cdclk";
85 Example 3: I2S controller node that consumes the clock generated by the clock
86            controller. Refer to the standard clock bindings for information
87            about 'clocks' and 'clock-names' property.
90 	compatible = "samsung,i2s-v5";
95 	dma-names = "tx", "rx", "tx-sec";
101 	clock-names = "iis", "i2s_opclk0", "i2s_opclk1",