Lines Matching +full:0 +full:xf0000
89 pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); in hal_mpt_SwitchRfSetting()
90 pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); in hal_mpt_SwitchRfSetting()
92 if ((PlatformEFIORead4Byte(pAdapter, 0xF4) & BIT29) == BIT29) { in hal_mpt_SwitchRfSetting()
93 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xB); in hal_mpt_SwitchRfSetting()
94 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xB); in hal_mpt_SwitchRfSetting()
96 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD); in hal_mpt_SwitchRfSetting()
97 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD); in hal_mpt_SwitchRfSetting()
101 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ in hal_mpt_SwitchRfSetting()
102 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ in hal_mpt_SwitchRfSetting()
104 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ in hal_mpt_SwitchRfSetting()
105 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ in hal_mpt_SwitchRfSetting()
108 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_A); in hal_mpt_SwitchRfSetting()
109 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_B); in hal_mpt_SwitchRfSetting()
146 u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; in hal_mpt_CCKTxPowerAdjust()
147 u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; in hal_mpt_CCKTxPowerAdjust()
153 u8 DataRate = 0xFF; in hal_mpt_CCKTxPowerAdjust()
169 /* Channel 14 in CCK, need to set 0xA26~0xA29 to 0 for 8703B */ in hal_mpt_CCKTxPowerAdjust()
170 phy_set_bb_reg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); in hal_mpt_CCKTxPowerAdjust()
171 phy_set_bb_reg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); in hal_mpt_CCKTxPowerAdjust()
176 for (i = 0 ; i < 2 ; ++i) in hal_mpt_CCKTxPowerAdjust()
184 phy_set_bb_reg(Adapter, rCCK0_TxFilter2, bMaskDWord, 0x0000B81C); in hal_mpt_CCKTxPowerAdjust()
185 phy_set_bb_reg(Adapter, rCCK0_DebugPort, bMaskDWord, 0x00000000); in hal_mpt_CCKTxPowerAdjust()
186 phy_set_bb_reg(Adapter, 0xAAC, bMaskDWord, 0x00003667); in hal_mpt_CCKTxPowerAdjust()
188 for (i = 0 ; i < 3 ; ++i) { in hal_mpt_CCKTxPowerAdjust()
196 /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ in hal_mpt_CCKTxPowerAdjust()
203 for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { in hal_mpt_CCKTxPowerAdjust()
204 if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch1_ch13_88f[i][0]) && in hal_mpt_CCKTxPowerAdjust()
205 (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch1_ch13_88f[i][1])) { in hal_mpt_CCKTxPowerAdjust()
210 write_bbreg(Adapter, 0xa22, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][0]); in hal_mpt_CCKTxPowerAdjust()
211 write_bbreg(Adapter, 0xa23, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][1]); in hal_mpt_CCKTxPowerAdjust()
212 write_bbreg(Adapter, 0xa24, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][2]); in hal_mpt_CCKTxPowerAdjust()
213 write_bbreg(Adapter, 0xa25, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][3]); in hal_mpt_CCKTxPowerAdjust()
214 write_bbreg(Adapter, 0xa26, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][4]); in hal_mpt_CCKTxPowerAdjust()
215 write_bbreg(Adapter, 0xa27, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][5]); in hal_mpt_CCKTxPowerAdjust()
216 write_bbreg(Adapter, 0xa28, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][6]); in hal_mpt_CCKTxPowerAdjust()
217 write_bbreg(Adapter, 0xa29, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][7]); in hal_mpt_CCKTxPowerAdjust()
218 write_bbreg(Adapter, 0xa9a, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][8]); in hal_mpt_CCKTxPowerAdjust()
219 write_bbreg(Adapter, 0xa9b, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][9]); in hal_mpt_CCKTxPowerAdjust()
220 write_bbreg(Adapter, 0xa9c, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][10]); in hal_mpt_CCKTxPowerAdjust()
221 write_bbreg(Adapter, 0xa9d, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][11]); in hal_mpt_CCKTxPowerAdjust()
222 write_bbreg(Adapter, 0xaa0, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][12]); in hal_mpt_CCKTxPowerAdjust()
223 write_bbreg(Adapter, 0xaa1, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][13]); in hal_mpt_CCKTxPowerAdjust()
224 write_bbreg(Adapter, 0xaa2, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][14]); in hal_mpt_CCKTxPowerAdjust()
225 write_bbreg(Adapter, 0xaa3, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][15]); in hal_mpt_CCKTxPowerAdjust()
228 for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { in hal_mpt_CCKTxPowerAdjust()
229 if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch14_88f[i][0]) && in hal_mpt_CCKTxPowerAdjust()
230 (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch14_88f[i][1])) { in hal_mpt_CCKTxPowerAdjust()
235 write_bbreg(Adapter, 0xa22, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][0]); in hal_mpt_CCKTxPowerAdjust()
236 write_bbreg(Adapter, 0xa23, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][1]); in hal_mpt_CCKTxPowerAdjust()
237 write_bbreg(Adapter, 0xa24, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][2]); in hal_mpt_CCKTxPowerAdjust()
238 write_bbreg(Adapter, 0xa25, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][3]); in hal_mpt_CCKTxPowerAdjust()
239 write_bbreg(Adapter, 0xa26, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][4]); in hal_mpt_CCKTxPowerAdjust()
240 write_bbreg(Adapter, 0xa27, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][5]); in hal_mpt_CCKTxPowerAdjust()
241 write_bbreg(Adapter, 0xa28, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][6]); in hal_mpt_CCKTxPowerAdjust()
242 write_bbreg(Adapter, 0xa29, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][7]); in hal_mpt_CCKTxPowerAdjust()
243 write_bbreg(Adapter, 0xa9a, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][8]); in hal_mpt_CCKTxPowerAdjust()
244 write_bbreg(Adapter, 0xa9b, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][9]); in hal_mpt_CCKTxPowerAdjust()
245 write_bbreg(Adapter, 0xa9c, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][10]); in hal_mpt_CCKTxPowerAdjust()
246 write_bbreg(Adapter, 0xa9d, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][11]); in hal_mpt_CCKTxPowerAdjust()
247 write_bbreg(Adapter, 0xaa0, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][12]); in hal_mpt_CCKTxPowerAdjust()
248 write_bbreg(Adapter, 0xaa1, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][13]); in hal_mpt_CCKTxPowerAdjust()
249 write_bbreg(Adapter, 0xaa2, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][14]); in hal_mpt_CCKTxPowerAdjust()
250 write_bbreg(Adapter, 0xaa3, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][15]); in hal_mpt_CCKTxPowerAdjust()
255 /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ in hal_mpt_CCKTxPowerAdjust()
261 for (i = 0; i < CCK_TABLE_SIZE; i++) { in hal_mpt_CCKTxPowerAdjust()
262 if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch1_ch13[i][0]) && in hal_mpt_CCKTxPowerAdjust()
263 (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch1_ch13[i][1])) { in hal_mpt_CCKTxPowerAdjust()
269 /*Write 0xa22 0xa23*/ in hal_mpt_CCKTxPowerAdjust()
270 TempVal = cck_swing_table_ch1_ch13[CCKSwingIndex][0] + in hal_mpt_CCKTxPowerAdjust()
274 /*Write 0xa24 ~ 0xa27*/ in hal_mpt_CCKTxPowerAdjust()
275 TempVal2 = 0; in hal_mpt_CCKTxPowerAdjust()
281 /*Write 0xa28 0xa29*/ in hal_mpt_CCKTxPowerAdjust()
282 TempVal3 = 0; in hal_mpt_CCKTxPowerAdjust()
286 for (i = 0; i < CCK_TABLE_SIZE; i++) { in hal_mpt_CCKTxPowerAdjust()
287 if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch14[i][0]) && in hal_mpt_CCKTxPowerAdjust()
288 (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch14[i][1])) { in hal_mpt_CCKTxPowerAdjust()
294 /*Write 0xa22 0xa23*/ in hal_mpt_CCKTxPowerAdjust()
295 TempVal = cck_swing_table_ch14[CCKSwingIndex][0] + in hal_mpt_CCKTxPowerAdjust()
298 /*Write 0xa24 ~ 0xa27*/ in hal_mpt_CCKTxPowerAdjust()
299 TempVal2 = 0; in hal_mpt_CCKTxPowerAdjust()
305 /*Write 0xa28 0xa29*/ in hal_mpt_CCKTxPowerAdjust()
306 TempVal3 = 0; in hal_mpt_CCKTxPowerAdjust()
333 rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0); in hal_mpt_SetChannel()
335 rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0); in hal_mpt_SetChannel()
360 rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0); in hal_mpt_SetBandwidth()
362 rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0); in hal_mpt_SetBandwidth()
373 u32 TxAGC = 0, pwr = 0; in mpt_SetTxPower_Old()
376 if (pwr < 0x3f) { in mpt_SetTxPower_Old()
379 phy_set_bb_reg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); in mpt_SetTxPower_Old()
382 if (pwr < 0x3f) { in mpt_SetTxPower_Old()
385 phy_set_bb_reg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, TxAGC); in mpt_SetTxPower_Old()
391 u32 TxAGC = 0; in mpt_SetTxPower_Old()
392 u8 pwr = 0; in mpt_SetTxPower_Old()
394 pwr = pTxPower[0]; in mpt_SetTxPower_Old()
395 if (pwr < 0x3f) { in mpt_SetTxPower_Old()
397 RTW_INFO("HT Tx-rf(A) Power = 0x%x\n", TxAGC); in mpt_SetTxPower_Old()
405 TxAGC = 0; in mpt_SetTxPower_Old()
407 if (pwr < 0x3f) { in mpt_SetTxPower_Old()
409 RTW_INFO("HT Tx-rf(B) Power = 0x%x\n", TxAGC); in mpt_SetTxPower_Old()
435 u8 path = 0 , i = 0, MaxRate = MGN_6M; in mpt_SetTxPower()
453 for (i = 0; i < sizeof(rate); ++i) in mpt_SetTxPower()
464 for (i = 0; i < sizeof(rate); ++i) in mpt_SetTxPower()
488 for (i = 0; i < sizeof(rate); ++i) { in mpt_SetTxPower()
517 for (i = 0; i < sizeof(rate); ++i) { in mpt_SetTxPower()
584 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0x6); in hal_mpt_SetDataRate()
586 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0x6); in hal_mpt_SetDataRate()
589 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0xE); in hal_mpt_SetDataRate()
591 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0xE); in hal_mpt_SetDataRate()
598 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0xE); in hal_mpt_SetDataRate()
600 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0xE); in hal_mpt_SetDataRate()
609 u32 pout = 0; in hal_mpt_tssi_turn_target_power()
625 u32 IGReg = rA_IGI_Jaguar, IGvalue = 0; in mpt_ToggleIG_8814A()
627 for (Path = 0; Path <= RF_PATH_D; Path++) { in mpt_ToggleIG_8814A()
670 /*pHalData->ValidTxPath = 0x0e;*/ in mpt_SetRFPath_8814A()
671 …phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x90e); /*/ 0x940[27:16]=12'b0010_0100… in mpt_SetRFPath_8814A()
677 /*pHalData->ValidTxPath = 0x0d;*/ in mpt_SetRFPath_8814A()
678 …phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x247); /*/ 0x940[27:16]=12'b0010_0100… in mpt_SetRFPath_8814A()
687 /*pHalData->ValidTxPath = 0x0e;*/ in mpt_SetRFPath_8814A()
688 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x7); in mpt_SetRFPath_8814A()
689 phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0xe); in mpt_SetRFPath_8814A()
690 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0xe); in mpt_SetRFPath_8814A()
695 /*pHalData->ValidTxPath = 0x06;*/ in mpt_SetRFPath_8814A()
696 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x6); in mpt_SetRFPath_8814A()
697 phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0x6); in mpt_SetRFPath_8814A()
698 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x6); in mpt_SetRFPath_8814A()
702 /*pHalData->ValidTxPath = 0x02;*/ in mpt_SetRFPath_8814A()
703 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); /*/ 0xa07[7:4] = 4'b0100*/ in mpt_SetRFPath_8814A()
704 …phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x002); /*/ 0x93C[31:20]=12'b0000_0000_… in mpt_SetRFPath_8814A()
705 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x2); /* 0x80C[7:4] = 4'b0010*/ in mpt_SetRFPath_8814A()
710 /*pHalData->ValidTxPath = 0x04;*/ in mpt_SetRFPath_8814A()
711 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x2); /*/ 0xa07[7:4] = 4'b0010*/ in mpt_SetRFPath_8814A()
712 …phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x004); /*/ 0x93C[31:20]=12'b0000_0000_… in mpt_SetRFPath_8814A()
713 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x4); /*/ 0x80C[7:4] = 4'b0100*/ in mpt_SetRFPath_8814A()
718 /*pHalData->ValidTxPath = 0x08;*/ in mpt_SetRFPath_8814A()
719 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x1); /*/ 0xa07[7:4] = 4'b0001*/ in mpt_SetRFPath_8814A()
720 …phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x008); /*/ 0x93C[31:20]=12'b0000_0000_… in mpt_SetRFPath_8814A()
721 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x8); /*/ 0x80C[7:4] = 4'b1000*/ in mpt_SetRFPath_8814A()
727 /*pHalData->ValidTxPath = 0x01;*/ in mpt_SetRFPath_8814A()
728 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x8); /*/ 0xa07[7:4] = 4'b1000*/ in mpt_SetRFPath_8814A()
729 …phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x001); /*/ 0x93C[31:20]=12'b0000_0000_… in mpt_SetRFPath_8814A()
730 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x1); /*/ 0x80C[7:4] = 4'b0001*/ in mpt_SetRFPath_8814A()
737 /*pHalData->ValidRxPath = 0x01;*/ in mpt_SetRFPath_8814A()
738 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
739 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
740 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); in mpt_SetRFPath_8814A()
741 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
742 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
743 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x0); in mpt_SetRFPath_8814A()
744 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
745 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
746 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
747 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
749 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
750 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
754 /*pHalData->ValidRxPath = 0x02;*/ in mpt_SetRFPath_8814A()
755 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
756 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
757 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); in mpt_SetRFPath_8814A()
758 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
759 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
760 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x1); in mpt_SetRFPath_8814A()
761 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
762 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
763 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
764 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
766 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
767 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
771 /*pHalData->ValidRxPath = 0x04;*/ in mpt_SetRFPath_8814A()
772 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
773 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
774 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x44); in mpt_SetRFPath_8814A()
775 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
776 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
777 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x2); in mpt_SetRFPath_8814A()
778 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
779 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
780 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
781 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
783 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
784 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
788 /*pHalData->ValidRxPath = 0x08;*/ in mpt_SetRFPath_8814A()
789 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
790 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
791 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x88); in mpt_SetRFPath_8814A()
792 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
793 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
794 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x3); in mpt_SetRFPath_8814A()
795 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
796 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
797 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
798 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
800 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
801 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
805 /*pHalData->ValidRxPath = 0x06;*/ in mpt_SetRFPath_8814A()
806 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
807 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
808 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x66); in mpt_SetRFPath_8814A()
809 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
810 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
811 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); in mpt_SetRFPath_8814A()
812 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
813 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
814 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ in mpt_SetRFPath_8814A()
815 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
817 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
818 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
822 /*pHalData->ValidRxPath = 0x0C;*/ in mpt_SetRFPath_8814A()
823 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
824 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
825 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xcc); in mpt_SetRFPath_8814A()
826 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
827 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
828 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0xB); in mpt_SetRFPath_8814A()
829 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
830 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
831 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ in mpt_SetRFPath_8814A()
832 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
834 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
835 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
839 /*pHalData->ValidRxPath = 0x0e;*/ in mpt_SetRFPath_8814A()
840 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
841 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
842 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xee); in mpt_SetRFPath_8814A()
843 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
844 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
845 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); in mpt_SetRFPath_8814A()
846 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
847 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
848 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
849 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, Rx mode*/ in mpt_SetRFPath_8814A()
851 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); in mpt_SetRFPath_8814A()
852 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); in mpt_SetRFPath_8814A()
856 /*pHalData->ValidRxPath = 0x0f;*/ in mpt_SetRFPath_8814A()
857 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
858 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
859 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xff); in mpt_SetRFPath_8814A()
860 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
861 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
862 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x1); in mpt_SetRFPath_8814A()
863 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
864 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
865 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
866 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
868 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); in mpt_SetRFPath_8814A()
869 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); in mpt_SetRFPath_8814A()
893 static u32 regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; in mpt_SetSingleTone_8814A()
896 regIG0 = phy_query_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord); /*/ 0xC1C[31:21]*/ in mpt_SetSingleTone_8814A()
897 regIG1 = phy_query_bb_reg(pAdapter, rB_TxScale_Jaguar, bMaskDWord); /*/ 0xE1C[31:21]*/ in mpt_SetSingleTone_8814A()
898 regIG2 = phy_query_bb_reg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord); /*/ 0x181C[31:21]*/ in mpt_SetSingleTone_8814A()
899 regIG3 = phy_query_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord); /*/ 0x1A1C[31:21]*/ in mpt_SetSingleTone_8814A()
933 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); /*/ Disable CCA*/ in mpt_SetSingleTone_8814A()
936 phy_set_rf_reg(pAdapter, path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ in mpt_SetSingleTone_8814A()
937 …phy_set_rf_reg(pAdapter, path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0… in mpt_SetSingleTone_8814A()
939 phy_set_rf_reg(pAdapter, path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ in mpt_SetSingleTone_8814A()
942 phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xC1C[31:21]*/ in mpt_SetSingleTone_8814A()
943 phy_set_bb_reg(pAdapter, rB_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xE1C[31:21]*/ in mpt_SetSingleTone_8814A()
944 phy_set_bb_reg(pAdapter, rC_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x181C[31:21]*/ in mpt_SetSingleTone_8814A()
945 phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x1A1C[31:21]*/ in mpt_SetSingleTone_8814A()
974 phy_set_rf_reg(pAdapter, path, lna_low_gain_3, BIT1, 0x0); /* RF LO disabled */ in mpt_SetSingleTone_8814A()
976 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); /* Enable CCA*/ in mpt_SetSingleTone_8814A()
989 phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord, regIG0); /* 0xC1C[31:21]*/ in mpt_SetSingleTone_8814A()
990 phy_set_bb_reg(pAdapter, rB_TxScale_Jaguar, bMaskDWord, regIG1); /* 0xE1C[31:21]*/ in mpt_SetSingleTone_8814A()
991 phy_set_bb_reg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord, regIG2); /* 0x181C[31:21]*/ in mpt_SetSingleTone_8814A()
992 phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord, regIG3); /* 0x1A1C[31:21]*/ in mpt_SetSingleTone_8814A()
1008 u32 reg0xC50 = 0; in mpt_SetRFPath_8812A()
1016 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); in mpt_SetRFPath_8812A()
1018 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); in mpt_SetRFPath_8812A()
1022 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); in mpt_SetRFPath_8812A()
1024 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1); in mpt_SetRFPath_8812A()
1028 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); in mpt_SetRFPath_8812A()
1030 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); in mpt_SetRFPath_8812A()
1040 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); in mpt_SetRFPath_8812A()
1041 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8812A()
1042 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); in mpt_SetRFPath_8812A()
1043 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); in mpt_SetRFPath_8812A()
1054 && eLNA_2g == 0) { in mpt_SetRFPath_8812A()
1055 /* 0x830[3:1]=3'b010 */ in mpt_SetRFPath_8812A()
1056 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); in mpt_SetRFPath_8812A()
1058 /* 0x830[3:1]=3'b100 */ in mpt_SetRFPath_8812A()
1059 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1061 /* 0x830[3:1]=3'b100 for 5G */ in mpt_SetRFPath_8812A()
1062 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1066 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); in mpt_SetRFPath_8812A()
1067 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1);/*/ RF_A_0x0[19:16] = 1, Standby m… in mpt_SetRFPath_8812A()
1068 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); in mpt_SetRFPath_8812A()
1069 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); in mpt_SetRFPath_8812A()
1080 && eLNA_2g == 0) { in mpt_SetRFPath_8812A()
1081 /* 0x830[3:1]=3'b010 */ in mpt_SetRFPath_8812A()
1082 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); in mpt_SetRFPath_8812A()
1084 /* 0x830[3:1]=3'b100 */ in mpt_SetRFPath_8812A()
1085 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1087 /* 0x830[3:1]=3'b100 for 5G */ in mpt_SetRFPath_8812A()
1088 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1092 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); in mpt_SetRFPath_8812A()
1093 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, Rx mode*/ in mpt_SetRFPath_8812A()
1094 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); in mpt_SetRFPath_8812A()
1096 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1106 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(1) | BIT(0), 0x2); in mpt_SetRFPath_8812A()
1107 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(9) | BIT(8), 0x3); in mpt_SetRFPath_8812A()
1110 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(1) | BIT(0), 0x1); in mpt_SetRFPath_8812A()
1111 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(9) | BIT(8), 0x3); in mpt_SetRFPath_8812A()
1138 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0); in mpt_SetRFPath_8723B()
1139 phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ in mpt_SetRFPath_8723B()
1141 for (i = 0; i < 3; ++i) { in mpt_SetRFPath_8723B()
1142 u32 offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0]; in mpt_SetRFPath_8723B()
1145 if (offset != 0) { in mpt_SetRFPath_8723B()
1147 RTW_INFO("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8723B()
1150 for (i = 0; i < 2; ++i) { in mpt_SetRFPath_8723B()
1151 u32 offset = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][0]; in mpt_SetRFPath_8723B()
1154 if (offset != 0) { in mpt_SetRFPath_8723B()
1156 RTW_INFO("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8723B()
1166 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); in mpt_SetRFPath_8723B()
1167 phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /*/ AGC Table Sel.*/ in mpt_SetRFPath_8723B()
1169 for (i = 0; i < 3; ++i) { in mpt_SetRFPath_8723B()
1171 offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0]; in mpt_SetRFPath_8723B()
1173 if (pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_B][i][0] != 0) { in mpt_SetRFPath_8723B()
1175 RTW_INFO("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8723B()
1179 for (i = 0; i < 2; ++i) { in mpt_SetRFPath_8723B()
1180 offset = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][0]; in mpt_SetRFPath_8723B()
1182 if (pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_B][i][0] != 0) { in mpt_SetRFPath_8723B()
1184 RTW_INFO("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8723B()
1217 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0); in mpt_SetRFPath_8703B()
1218 phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ in mpt_SetRFPath_8703B()
1220 for (i = 0; i < 3; ++i) { in mpt_SetRFPath_8703B()
1221 u32 offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; in mpt_SetRFPath_8703B()
1224 if (offset != 0) { in mpt_SetRFPath_8703B()
1226 RTW_INFO("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8703B()
1230 for (i = 0; i < 2; ++i) { in mpt_SetRFPath_8703B()
1231 u32 offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; in mpt_SetRFPath_8703B()
1234 if (offset != 0) { in mpt_SetRFPath_8703B()
1236 RTW_INFO("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8703B()
1243 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); in mpt_SetRFPath_8703B()
1244 phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /* AGC Table Sel */ in mpt_SetRFPath_8703B()
1246 for (i = 0; i < 3; ++i) { in mpt_SetRFPath_8703B()
1247 u32 offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; in mpt_SetRFPath_8703B()
1250 if (pRFCalibrateInfo->tx_iqc_8703b[i][0] != 0) { in mpt_SetRFPath_8703B()
1252 RTW_INFO("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8703B()
1255 for (i = 0; i < 2; ++i) { in mpt_SetRFPath_8703B()
1256 u32 offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; in mpt_SetRFPath_8703B()
1259 if (pRFCalibrateInfo->rx_iqc_8703b[i][0] != 0) { in mpt_SetRFPath_8703B()
1261 RTW_INFO("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8703B()
1278 u8 p = 0, i = 0; in mpt_SetRFPath_8723D()
1279 u32 ulAntennaTx, ulAntennaRx, offset = 0, data = 0, val32 = 0; in mpt_SetRFPath_8723D()
1296 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7|BIT6, 0); in mpt_SetRFPath_8723D()
1302 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7|BIT6, 0xA); in mpt_SetRFPath_8723D()
1320 u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; in mpt_SetRFPath_819X()
1321 u8 chgTx = 0, chgRx = 0; in mpt_SetRFPath_819X()
1322 u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; in mpt_SetRFPath_819X()
1330 p_ofdm_tx->r_ant_ht1 = 0x1; in mpt_SetRFPath_819X()
1331 p_ofdm_tx->r_ant_ht2 = 0x2;/*Second TX RF path is A*/ in mpt_SetRFPath_819X()
1332 p_ofdm_tx->r_ant_non_ht = 0x3;/*/ 0x1+0x2=0x3 */ in mpt_SetRFPath_819X()
1336 p_ofdm_tx->r_tx_antenna = 0x1; in mpt_SetRFPath_819X()
1337 r_ofdm_tx_en_val = 0x1; in mpt_SetRFPath_819X()
1338 p_ofdm_tx->r_ant_l = 0x1; in mpt_SetRFPath_819X()
1339 p_ofdm_tx->r_ant_ht_s1 = 0x1; in mpt_SetRFPath_819X()
1340 p_ofdm_tx->r_ant_non_ht_s1 = 0x1; in mpt_SetRFPath_819X()
1341 p_cck_txrx->r_ccktx_enable = 0x8; in mpt_SetRFPath_819X()
1346 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); in mpt_SetRFPath_819X()
1347 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); in mpt_SetRFPath_819X()
1348 r_ofdm_tx_en_val = 0x3; in mpt_SetRFPath_819X()
1350 /*/cosa r_ant_select_ofdm_val = 0x11111111;*/ in mpt_SetRFPath_819X()
1353 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); in mpt_SetRFPath_819X()
1355 phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); in mpt_SetRFPath_819X()
1357 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); in mpt_SetRFPath_819X()
1363 p_ofdm_tx->r_tx_antenna = 0x2; in mpt_SetRFPath_819X()
1364 r_ofdm_tx_en_val = 0x2; in mpt_SetRFPath_819X()
1365 p_ofdm_tx->r_ant_l = 0x2; in mpt_SetRFPath_819X()
1366 p_ofdm_tx->r_ant_ht_s1 = 0x2; in mpt_SetRFPath_819X()
1367 p_ofdm_tx->r_ant_non_ht_s1 = 0x2; in mpt_SetRFPath_819X()
1368 p_cck_txrx->r_ccktx_enable = 0x4; in mpt_SetRFPath_819X()
1373 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); in mpt_SetRFPath_819X()
1374 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in mpt_SetRFPath_819X()
1380 phy_set_bb_reg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); in mpt_SetRFPath_819X()
1381 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); in mpt_SetRFPath_819X()
1382 /*/phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ in mpt_SetRFPath_819X()
1383 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); in mpt_SetRFPath_819X()
1390 p_ofdm_tx->r_tx_antenna = 0x3; in mpt_SetRFPath_819X()
1391 r_ofdm_tx_en_val = 0x3; in mpt_SetRFPath_819X()
1392 p_ofdm_tx->r_ant_l = 0x3; in mpt_SetRFPath_819X()
1393 p_ofdm_tx->r_ant_ht_s1 = 0x3; in mpt_SetRFPath_819X()
1394 p_ofdm_tx->r_ant_non_ht_s1 = 0x3; in mpt_SetRFPath_819X()
1395 p_cck_txrx->r_ccktx_enable = 0xC; in mpt_SetRFPath_819X()
1400 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); in mpt_SetRFPath_819X()
1401 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in mpt_SetRFPath_819X()
1403 /*cosa r_ant_select_ofdm_val = 0x3321333;*/ in mpt_SetRFPath_819X()
1406 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); in mpt_SetRFPath_819X()
1408 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); in mpt_SetRFPath_819X()
1409 /*/phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ in mpt_SetRFPath_819X()
1419 #if 0 in mpt_SetRFPath_819X()
1421 /* r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D */ in mpt_SetRFPath_819X()
1422 /* r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */ in mpt_SetRFPath_819X()
1426 r_rx_antenna_ofdm = 0x1; /* A*/ in mpt_SetRFPath_819X()
1427 p_cck_txrx->r_cckrx_enable = 0x0; /* default: A*/ in mpt_SetRFPath_819X()
1428 p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A*/ in mpt_SetRFPath_819X()
1432 r_rx_antenna_ofdm = 0x2; /*/ B*/ in mpt_SetRFPath_819X()
1433 p_cck_txrx->r_cckrx_enable = 0x1; /*/ default: B*/ in mpt_SetRFPath_819X()
1434 p_cck_txrx->r_cckrx_enable_2 = 0x1; /*/ option: B*/ in mpt_SetRFPath_819X()
1438 r_rx_antenna_ofdm = 0x3;/*/ AB*/ in mpt_SetRFPath_819X()
1439 p_cck_txrx->r_cckrx_enable = 0x0;/*/ default:A*/ in mpt_SetRFPath_819X()
1440 p_cck_txrx->r_cckrx_enable_2 = 0x1;/*/ option:B*/ in mpt_SetRFPath_819X()
1454 phy_set_bb_reg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /*/OFDM Tx*/ in mpt_SetRFPath_819X()
1455 phy_set_bb_reg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /*/OFDM Tx*/ in mpt_SetRFPath_819X()
1456 phy_set_bb_reg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ in mpt_SetRFPath_819X()
1457 phy_set_bb_reg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ in mpt_SetRFPath_819X()
1459 phy_set_bb_reg(pAdapter, rOFDM0_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ in mpt_SetRFPath_819X()
1460 phy_set_bb_reg(pAdapter, rOFDM1_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ in mpt_SetRFPath_819X()
1536 enum bb_path bb_tx = 0; in hal_mpt_SetAntenna()
1593 RTW_INFO("%s ,ant idx %d, tx path_num_nss = %d\n", __func__, anttx, hal->txpath_num_nss[0]); in hal_mpt_SetAntenna()
1683 target_ther &= 0xff; in hal_mpt_SetThermalMeter()
1694 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x1); in hal_mpt_TriggerRFThermalMeter()
1695 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x0); in hal_mpt_TriggerRFThermalMeter()
1696 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x1); in hal_mpt_TriggerRFThermalMeter()
1698 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); in hal_mpt_TriggerRFThermalMeter()
1708 u32 ThermalValue = 0; in hal_mpt_ReadRFThermalMeter()
1709 s32 thermal_value_temp = 0; in hal_mpt_ReadRFThermalMeter()
1710 s8 thermal_offset = 0; in hal_mpt_ReadRFThermalMeter()
1711 u32 thermal_reg_mask = 0; in hal_mpt_ReadRFThermalMeter()
1714 …thermal_reg_mask = 0x007e; /*0x42: RF Reg[6:1], 35332(themal K & bias k & power trim) & 35325(ts… in hal_mpt_ReadRFThermalMeter()
1716 thermal_reg_mask = 0xfc00; /*0x42: RF Reg[15:10]*/ in hal_mpt_ReadRFThermalMeter()
1718 ThermalValue = (u8)phy_query_rf_reg(pAdapter, rf_path, 0x42, thermal_reg_mask); in hal_mpt_ReadRFThermalMeter()
1726 else if (thermal_value_temp < 0) in hal_mpt_ReadRFThermalMeter()
1727 ThermalValue = 0; in hal_mpt_ReadRFThermalMeter()
1737 #if 0 in hal_mpt_GetThermalMeter()
1741 *value &= 0xFF; in hal_mpt_GetThermalMeter()
1764 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0); in hal_mpt_SetSingleCarrierTx()
1792 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); in hal_mpt_SetSingleCarrierTx()
1793 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); in hal_mpt_SetSingleCarrierTx()
1804 static u32 regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; in hal_mpt_SetSingleToneTx()
1813 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x0, 0xF0000, 0x2); in hal_mpt_SetSingleToneTx()
1814 /* @Lowest RF gain index: RF_0x0[4:0] = 0*/ in hal_mpt_SetSingleToneTx()
1815 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x0, 0x1F, 0x0); in hal_mpt_SetSingleToneTx()
1817 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x58, BIT(1), 0x1); in hal_mpt_SetSingleToneTx()
1819 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x0, 0xF0000, 0x2); in hal_mpt_SetSingleToneTx()
1820 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x0, 0x1F, 0x0); in hal_mpt_SetSingleToneTx()
1821 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x58, BIT(1), 0x1); in hal_mpt_SetSingleToneTx()
1851 phy_set_rf_reg(pAdapter, RF_PATH_A, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1852 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); in hal_mpt_SetSingleToneTx()
1853 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); in hal_mpt_SetSingleToneTx()
1856 phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0xF); in hal_mpt_SetSingleToneTx()
1857 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
1858 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ in hal_mpt_SetSingleToneTx()
1861 phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x1); in hal_mpt_SetSingleToneTx()
1862 phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x1); in hal_mpt_SetSingleToneTx()
1863 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x1); in hal_mpt_SetSingleToneTx()
1864 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x1); in hal_mpt_SetSingleToneTx()
1865 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x1); in hal_mpt_SetSingleToneTx()
1866 phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x1); in hal_mpt_SetSingleToneTx()
1867 phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0xF); in hal_mpt_SetSingleToneTx()
1868 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x1); /* RF LO disabled*/ in hal_mpt_SetSingleToneTx()
1869 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /* Tx mode*/ in hal_mpt_SetSingleToneTx()
1873 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ in hal_mpt_SetSingleToneTx()
1874 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x56, 0xF, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1877 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ in hal_mpt_SetSingleToneTx()
1878 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x76, 0xF, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1882 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */ in hal_mpt_SetSingleToneTx()
1883 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */ in hal_mpt_SetSingleToneTx()
1887 phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF); in hal_mpt_SetSingleToneTx()
1888 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); in hal_mpt_SetSingleToneTx()
1889 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); in hal_mpt_SetSingleToneTx()
1893 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0); in hal_mpt_SetSingleToneTx()
1894 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x0); in hal_mpt_SetSingleToneTx()
1895 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, BIT0, 0x1); in hal_mpt_SetSingleToneTx()
1897 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0); in hal_mpt_SetSingleToneTx()
1898 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x0); in hal_mpt_SetSingleToneTx()
1899 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x63, BIT0, 0x1); in hal_mpt_SetSingleToneTx()
1911 phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x0); /*/ Disable CCK and OFDM*/ in hal_mpt_SetSingleToneTx()
1915 phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ in hal_mpt_SetSingleToneTx()
1916 … phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ in hal_mpt_SetSingleToneTx()
1917 phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1920 …phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19… in hal_mpt_SetSingleToneTx()
1921 …reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0… in hal_mpt_SetSingleToneTx()
1924 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x75, BIT16, 0x1); /* RF LO (for BTG) enabled */ in hal_mpt_SetSingleToneTx()
1927 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1930 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); /* 0xCB0=0x77777777*/ in hal_mpt_SetSingleToneTx()
1931 phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); /* 0xEB0=0x77777777*/ in hal_mpt_SetSingleToneTx()
1932 … phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskLWord, 0x7777); /* 0xCB4[15:0] = 0x7777*/ in hal_mpt_SetSingleToneTx()
1933 … phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskLWord, 0x7777); /* 0xEB4[15:0] = 0x7777*/ in hal_mpt_SetSingleToneTx()
1934 phy_set_bb_reg(pAdapter, rA_RFE_Inverse_Jaguar, 0xFFF, 0xb); /* 0xCBC[23:16] = 0x12*/ in hal_mpt_SetSingleToneTx()
1935 phy_set_bb_reg(pAdapter, rB_RFE_Inverse_Jaguar, 0xFFF, 0x830); /* 0xEBC[23:16] = 0x12*/ in hal_mpt_SetSingleToneTx()
1937 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xF0F0, 0x707); /* 0xCB0[[15:12, 7:4] = 0x707*/ in hal_mpt_SetSingleToneTx()
1941 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/ in hal_mpt_SetSingleToneTx()
1945 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/ in hal_mpt_SetSingleToneTx()
1948 …phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x770… in hal_mpt_SetSingleToneTx()
1949 …phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x770… in hal_mpt_SetSingleToneTx()
1952 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/ in hal_mpt_SetSingleToneTx()
1953 phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/ in hal_mpt_SetSingleToneTx()
1955 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/ in hal_mpt_SetSingleToneTx()
1956 phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/ in hal_mpt_SetSingleToneTx()
1968 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in hal_mpt_SetSingleToneTx()
1969 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in hal_mpt_SetSingleToneTx()
1975 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); in hal_mpt_SetSingleToneTx()
1976 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); in hal_mpt_SetSingleToneTx()
1978 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3);/*/ Tx mode*/ in hal_mpt_SetSingleToneTx()
1979 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0);/*/ RF LO disabled */ in hal_mpt_SetSingleToneTx()
1981 phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0x0); in hal_mpt_SetSingleToneTx()
1984 phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x0); in hal_mpt_SetSingleToneTx()
1985 phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x0); in hal_mpt_SetSingleToneTx()
1986 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x0); in hal_mpt_SetSingleToneTx()
1987 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x0); in hal_mpt_SetSingleToneTx()
1988 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x0); in hal_mpt_SetSingleToneTx()
1989 phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x0); in hal_mpt_SetSingleToneTx()
1990 phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0x0); in hal_mpt_SetSingleToneTx()
1991 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x0); /* RF LO disabled*/ in hal_mpt_SetSingleToneTx()
1992 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /* Rx mode*/ in hal_mpt_SetSingleToneTx()
1996 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ in hal_mpt_SetSingleToneTx()
1997 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x56, 0xF, 0x0); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2000 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ in hal_mpt_SetSingleToneTx()
2001 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x76, 0xF, 0x0); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2005 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */ in hal_mpt_SetSingleToneTx()
2006 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */ in hal_mpt_SetSingleToneTx()
2009 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /*Tx mode*/ in hal_mpt_SetSingleToneTx()
2010 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0); /*RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2012 phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xc); in hal_mpt_SetSingleToneTx()
2015 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x3); in hal_mpt_SetSingleToneTx()
2016 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x1); in hal_mpt_SetSingleToneTx()
2017 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, BIT0, 0x0); in hal_mpt_SetSingleToneTx()
2019 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x3); in hal_mpt_SetSingleToneTx()
2020 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x1); in hal_mpt_SetSingleToneTx()
2021 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x63, BIT0, 0x0); in hal_mpt_SetSingleToneTx()
2027 phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x3); /*/ Disable CCK and OFDM*/ in hal_mpt_SetSingleToneTx()
2032 phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2039 phy_set_rf_reg(pAdapter, p, 0x75, BIT16, 0x0); /* RF LO (for BTG) disabled */ in hal_mpt_SetSingleToneTx()
2041 phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2051 phy_set_bb_reg(pAdapter, rA_RFE_Inverse_Jaguar, 0xfff, 0x0); in hal_mpt_SetSingleToneTx()
2052 phy_set_bb_reg(pAdapter, rB_RFE_Inverse_Jaguar, 0xfff, 0x0); in hal_mpt_SetSingleToneTx()
2063 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in hal_mpt_SetSingleToneTx()
2064 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in hal_mpt_SetSingleToneTx()
2093 …phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); /* rSingleTone_ContTx_Jaguar… in hal_mpt_SetCarrierSuppressionTx()
2097 write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ in hal_mpt_SetCarrierSuppressionTx()
2098 write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /*/turn off scramble setting*/ in hal_mpt_SetCarrierSuppressionTx()
2101 write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /*/Set FTxRate to 1Mbps*/ in hal_mpt_SetCarrierSuppressionTx()
2105 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in hal_mpt_SetCarrierSuppressionTx()
2106 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in hal_mpt_SetCarrierSuppressionTx()
2111 write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ in hal_mpt_SetCarrierSuppressionTx()
2112 write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ in hal_mpt_SetCarrierSuppressionTx()
2115 write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); in hal_mpt_SetCarrierSuppressionTx()
2116 write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); in hal_mpt_SetCarrierSuppressionTx()
2119 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in hal_mpt_SetCarrierSuppressionTx()
2120 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in hal_mpt_SetCarrierSuppressionTx()
2130 u16 count = 0; in hal_mpt_query_phytxok()
2145 count = phy_query_bb_reg(pAdapter, 0xF50, bMaskLWord); /* [15:0]*/ in hal_mpt_query_phytxok()
2147 count = phy_query_bb_reg(pAdapter, 0xF50, bMaskHWord); /* [31:16]*/ in hal_mpt_query_phytxok()
2153 count = 0; in hal_mpt_query_phytxok()
2171 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ in mpt_StopCckContTx()
2172 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ in mpt_StopCckContTx()
2175 phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 2b00*/ in mpt_StopCckContTx()
2176 phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ in mpt_StopCckContTx()
2178 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); in mpt_StopCckContTx()
2179 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, BIT14, 0); in mpt_StopCckContTx()
2180 phy_set_bb_reg(pAdapter, 0x0B34, BIT14, 0); in mpt_StopCckContTx()
2184 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); in mpt_StopCckContTx()
2185 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); in mpt_StopCckContTx()
2190 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in mpt_StopCckContTx()
2191 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in mpt_StopCckContTx()
2198 phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bDisable);/* patch Count CCK adjust Rate*/ in mpt_StopCckContTx()
2217 phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); in mpt_StopOfdmContTx()
2224 phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 0*/ in mpt_StopOfdmContTx()
2225 phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ in mpt_StopOfdmContTx()
2229 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); in mpt_StopOfdmContTx()
2230 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); in mpt_StopOfdmContTx()
2235 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in mpt_StopOfdmContTx()
2236 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in mpt_StopOfdmContTx()
2255 phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); in mpt_StartCckContTx()
2263 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*transmit mode*/ in mpt_StartCckContTx()
2264 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ in mpt_StartCckContTx()
2267 phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 11 force cck rxiq = 0*/ in mpt_StartCckContTx()
2268 …phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1 force ofdm rxiq = ofdm … in mpt_StartCckContTx()
2271 phy_set_bb_reg(pAdapter, 0x0B34, BIT14, 1); in mpt_StartCckContTx()
2277 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in mpt_StartCckContTx()
2278 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in mpt_StartCckContTx()
2286 phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bDisable); in mpt_StartCckContTx()
2288 phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bEnable); in mpt_StartCckContTx()
2309 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0); in mpt_StartOfdmContTx()
2315 phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 2b'11*/ in mpt_StartOfdmContTx()
2316 phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ in mpt_StartOfdmContTx()
2321 phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ContinuousTx); in mpt_StartOfdmContTx()
2328 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in mpt_StartOfdmContTx()
2329 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in mpt_StartOfdmContTx()
2360 phydmtxinfo->service_field_bit2= 0x1; in mpt_convert_phydm_txinfo_for_jaguar3()
2387 #if 0 in mpt_ProSetPMacTx()
2398 if (pmppriv->pktInterval != 0) in mpt_ProSetPMacTx()
2401 if (pmppriv->tx.count != 0) in mpt_ProSetPMacTx()
2461 phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ in mpt_ProSetPMacTx()
2467 u4bTmp = phy_query_bb_reg(Adapter, 0xf50, bMaskLWord); in mpt_ProSetPMacTx()
2468 phy_set_bb_reg(Adapter, 0xb1c, bMaskLWord, u4bTmp + 50); in mpt_ProSetPMacTx()
2469 phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/ in mpt_ProSetPMacTx()
2471 phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ in mpt_ProSetPMacTx()
2509 if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0) in mpt_ProSetPMacTx()
2510 PMacTxInfo.PacketCount = 0xffff; in mpt_ProSetPMacTx()
2514 /* 0xb1c[0:15] TX packet count 0xb1C[31:16] SFD*/ in mpt_ProSetPMacTx()
2516 phy_set_bb_reg(Adapter, 0xb1c, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2517 /* 0xb40 7:0 SIGNAL 15:8 SERVICE 31:16 LENGTH*/ in mpt_ProSetPMacTx()
2519 phy_set_bb_reg(Adapter, 0xb40, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2520 u4bTmp = PMacTxInfo.CRC16[0] | (PMacTxInfo.CRC16[1] << 8); in mpt_ProSetPMacTx()
2521 phy_set_bb_reg(Adapter, 0xb44, bMaskLWord, u4bTmp); in mpt_ProSetPMacTx()
2524 phy_set_bb_reg(Adapter, 0xb0c, BIT27, 0); in mpt_ProSetPMacTx()
2526 phy_set_bb_reg(Adapter, 0xb0c, BIT27, 1); in mpt_ProSetPMacTx()
2528 phy_set_bb_reg(Adapter, 0xb18, 0xfffff, PMacTxInfo.PacketCount); in mpt_ProSetPMacTx()
2530 …u4bTmp = PMacTxInfo.LSIG[0] | ((PMacTxInfo.LSIG[1]) << 8) | ((PMacTxInfo.LSIG[2]) << 16) | ((PMacT… in mpt_ProSetPMacTx()
2531 …phy_set_bb_reg(Adapter, 0xb08, bMaskDWord, u4bTmp); /* Set 0xb08[23:0] = LSIG, 0xb08[31:24] = Dat… in mpt_ProSetPMacTx()
2533 if (PMacTxInfo.PacketPattern == 0x12) in mpt_ProSetPMacTx()
2534 u4bTmp = 0x3000000; in mpt_ProSetPMacTx()
2536 u4bTmp = 0; in mpt_ProSetPMacTx()
2540 u4bTmp |= PMacTxInfo.HT_SIG[0] | ((PMacTxInfo.HT_SIG[1]) << 8) | ((PMacTxInfo.HT_SIG[2]) << 16); in mpt_ProSetPMacTx()
2541 phy_set_bb_reg(Adapter, 0xb0c, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2543 phy_set_bb_reg(Adapter, 0xb10, 0xffffff, u4bTmp); in mpt_ProSetPMacTx()
2545 …u4bTmp |= PMacTxInfo.VHT_SIG_A[0] | ((PMacTxInfo.VHT_SIG_A[1]) << 8) | ((PMacTxInfo.VHT_SIG_A[2]) … in mpt_ProSetPMacTx()
2546 phy_set_bb_reg(Adapter, 0xb0c, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2548 phy_set_bb_reg(Adapter, 0xb10, 0xffffff, u4bTmp); in mpt_ProSetPMacTx()
2551 phy_set_bb_reg(Adapter, 0xb14, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2556 phy_set_bb_reg(Adapter, 0xb20, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2559 phy_set_bb_reg(Adapter, 0xb24, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2561 /* 0xb28 - 0xb34 24 byte Probe Request MAC Header*/ in mpt_ProSetPMacTx()
2563 phy_set_bb_reg(Adapter, 0xb28, bMaskDWord, 0x00000040); in mpt_ProSetPMacTx()
2565 /* Address1 [0:3]*/ in mpt_ProSetPMacTx()
2566 …u4bTmp = PMacTxInfo.MacAddress[0] | (PMacTxInfo.MacAddress[1] << 8) | (PMacTxInfo.MacAddress[2] <<… in mpt_ProSetPMacTx()
2567 phy_set_bb_reg(Adapter, 0xb2C, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2569 /* Address3 [3:0]*/ in mpt_ProSetPMacTx()
2570 phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2572 /* Address2[0:1] & Address1 [5:4]*/ in mpt_ProSetPMacTx()
2573 …u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8) | (Adapter->mac_addr[0] << 16)… in mpt_ProSetPMacTx()
2574 phy_set_bb_reg(Adapter, 0xb30, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2578 phy_set_bb_reg(Adapter, 0xb34, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2582 /*phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp);*/ in mpt_ProSetPMacTx()
2584 phy_set_bb_reg(Adapter, 0xb20, bMaskDWord, PMacTxInfo.PacketPeriod); /* for TX interval*/ in mpt_ProSetPMacTx()
2586 phy_set_bb_reg(Adapter, 0xb24, bMaskDWord, 0x00000040); in mpt_ProSetPMacTx()
2588 /* 0xb24 - 0xb38 24 byte Probe Request MAC Header*/ in mpt_ProSetPMacTx()
2589 /* Address1 [0:3]*/ in mpt_ProSetPMacTx()
2590 …u4bTmp = PMacTxInfo.MacAddress[0] | (PMacTxInfo.MacAddress[1] << 8) | (PMacTxInfo.MacAddress[2] <<… in mpt_ProSetPMacTx()
2591 phy_set_bb_reg(Adapter, 0xb28, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2593 /* Address3 [3:0]*/ in mpt_ProSetPMacTx()
2594 phy_set_bb_reg(Adapter, 0xb34, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2596 /* Address2[0:1] & Address1 [5:4]*/ in mpt_ProSetPMacTx()
2597 …u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8) | (Adapter->mac_addr[0] << 16)… in mpt_ProSetPMacTx()
2598 phy_set_bb_reg(Adapter, 0xb2c, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2602 phy_set_bb_reg(Adapter, 0xb30, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2606 phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2609 phy_set_bb_reg(Adapter, 0xb48, bMaskByte3, PMacTxInfo.TX_RATE_HEX); in mpt_ProSetPMacTx()
2611 /* 0xb4c 3:0 TXSC 5:4 BW 7:6 m_STBC 8 NDP_Sound*/ in mpt_ProSetPMacTx()
2613 phy_set_bb_reg(Adapter, 0xb4c, 0x1ff, u4bTmp); in mpt_ProSetPMacTx()
2616 u32 offset = 0xb44; in mpt_ProSetPMacTx()
2619 phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); in mpt_ProSetPMacTx()
2621 phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); in mpt_ProSetPMacTx()
2623 phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); in mpt_ProSetPMacTx()
2626 u32 offset = 0xb4c; in mpt_ProSetPMacTx()
2629 phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); in mpt_ProSetPMacTx()
2631 phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); in mpt_ProSetPMacTx()
2633 phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); in mpt_ProSetPMacTx()
2636 phy_set_bb_reg(Adapter, 0xb00, BIT8, 1); /* Turn on PMAC*/ in mpt_ProSetPMacTx()
2637 /* phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); */ /* TX Stop */ in mpt_ProSetPMacTx()
2639 phy_set_bb_reg(Adapter, 0xb04, 0xf, 8); /*TX CCK ON*/ in mpt_ProSetPMacTx()
2640 phy_set_bb_reg(Adapter, 0xA84, BIT31, 0); in mpt_ProSetPMacTx()
2642 phy_set_bb_reg(Adapter, 0xb04, 0xf, 4); /* TX Ofdm ON */ in mpt_ProSetPMacTx()