106 	((regoff) == OFFSETOF(chipcregs_t, pmutimer) || \
107 	 (regoff) == OFFSETOF(chipcregs_t, pmuwatchdog) || \
108 	 (regoff) == OFFSETOF(chipcregs_t, res_req_timer))
128 static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, uint32 savewin,
370 si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, uint32 savewin,  in si_buscore_setup()
693 	chipcregs_t *cc;  in si_doattach()
746 		cc = (chipcregs_t *)regs;  in si_doattach()
750 		cc = (chipcregs_t *)sii->curmap;  in si_doattach()
765 		cc = (chipcregs_t *)REG_MAP(SI_ENUM_BASE(sih), SI_CORE_SIZE);  in si_doattach()
976 			cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0);  in si_doattach()
1767 			OFFSETOF(chipcregs_t, pmustatus);  in si_pmu_corereg()
2176 		si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, watchdog), ~0, ticks);  in si_watchdog()
2202 	chipcregs_t *cc;  in si_slowclk_src()
2214 		cc = (chipcregs_t *)si_setcoreidx(&sii->pub, sii->curidx);  in si_slowclk_src()
2223 si_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc)  in si_slowclk_freq()
2262 	chipcregs_t *cc = (chipcregs_t *)chipcregs;  in si_clkctl_setdelay()
2292 	chipcregs_t *cc;  in si_clkctl_init()
2302 		if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL)  in si_clkctl_init()
2304 	} else if ((cc = (chipcregs_t *)CCREGS_FAST(sii)) == NULL)  in si_clkctl_init()
2351 	regoff = OFFSETOF(chipcregs_t, gpiocontrol);  in si_gpiocontrol()
2373 	regoff = OFFSETOF(chipcregs_t, gpioouten);  in si_gpioouten()
2395 	regoff = OFFSETOF(chipcregs_t, gpioout);  in si_gpioout()
2463 	regoff = OFFSETOF(chipcregs_t, gpioin);  in si_gpioin()
2480 	regoff = OFFSETOF(chipcregs_t, gpiointpolarity);  in si_gpiointpolarity()
2497 	regoff = OFFSETOF(chipcregs_t, gpiointmask);  in si_gpiointmask()
2511 	regoff = OFFSETOF(chipcregs_t, gpioeventintmask);  in si_gpioeventintmask()
2523 	return (si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, gpiotimeroutmask), mask, val));  in si_gpioled()
2534 		OFFSETOF(chipcregs_t, gpiotimerval), mask, gpiotimerval));  in si_gpiotimerval()
2545 	offs = (updown ? OFFSETOF(chipcregs_t, gpiopulldown) : OFFSETOF(chipcregs_t, gpiopullup));  in si_gpiopull()
2558 		offs = OFFSETOF(chipcregs_t, gpioevent);  in si_gpioevent()
2560 		offs = OFFSETOF(chipcregs_t, gpioeventintmask);  in si_gpioevent()
2562 		offs = OFFSETOF(chipcregs_t, gpioeventintpolarity);  in si_gpioevent()
2577 	offs = OFFSETOF(chipcregs_t, intmask);  in si_gpio_int_enable()
3145 	chipcregs_t *cc;  in si_btcgpiowar()
3158 	cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0);  in si_btcgpiowar()
3173 	chipcregs_t *cc;  in si_chipcontrl_restore()
3176 	if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) {  in si_chipcontrl_restore()
3188 	chipcregs_t *cc;  in si_chipcontrl_read()
3192 	if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) {  in si_chipcontrl_read()
3206 	chipcregs_t *cc;  in si_chipcontrl_srom4360()
3210 	if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) {  in si_chipcontrl_srom4360()
3238 	chipcregs_t *cc;  in si_srom_clk_set()
3243 	if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) {  in si_srom_clk_set()
3269 	chipcregs_t *cc;  in si_btc_enable_chipcontrol()
3272 	if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) {  in si_btc_enable_chipcontrol()
3331 		chipcregs_t *cc;  in si_is_sprom_available()
3400 	chipcregs_t *cc;  in si_get_sromctl()
3417 	chipcregs_t *cc;  in si_set_sromctl()
3682 #define PWRREQ_OFFSET(sih)	OFFSETOF(chipcregs_t, powerctl)
3716 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in si_srpwr_request()
3769 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in si_srpwr_stat_spinwait()
3801 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in si_srpwr_stat()
3819 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in si_srpwr_domain()