Lines Matching +full:0 +full:x0400000
76 #define TRIG_FRAME_FORMAT_11AX_DRAFT_1P1 0
107 #define BCM_IOV_XTLV_VERSION 0
118 #define DFS_PREFCHANLIST_VER 0x01
122 (sizeof(wl_dfs_forced_t) + (((n) < 1) ? (0) : (((n) - 1)* sizeof(chanspec_t))))
139 #define DFS_SCAN_S_RADAR_FREE 0
214 #define MFP_TEST_FLAG_NORMAL 0
244 #define WL_OBSS_DYN_BWSW_FLAG_ACTIVITY_PERIOD (0x01)
245 #define WL_OBSS_DYN_BWSW_FLAG_NOACTIVITY_PERIOD (0x02)
246 #define WL_OBSS_DYN_BWSW_FLAG_NOACTIVITY_INCR_PERIOD (0x04)
247 #define WL_OBSS_DYN_BWSW_FLAG_PSEUDO_SENSE_PERIOD (0x08)
248 #define WL_OBSS_DYN_BWSW_FLAG_RX_CRS_PERIOD (0x10)
249 #define WL_OBSS_DYN_BWSW_FLAG_DUR_THRESHOLD (0x20)
250 #define WL_OBSS_DYN_BWSW_FLAG_TXOP_PERIOD (0x40)
292 BSSCFG_TYPE_GENERIC = 0, /**< Generic AP/STA/IBSS BSS */
306 BSSCFG_SUBTYPE_NONE = 0,
659 /* AIFSN=0 indicates that EDCA is disabled for the duration
662 #define HE_MUEDCA_AIFSN_MIN 0
681 #define BSSCOLOR0_IDX 0
683 #define HE_BSSCOLOR0 0
687 #define STAID0_IDX 0
691 #define HE_STAID_MAX_VAL 0x07FF
696 uint8 bsscolor_index; /**< bsscolor index 0-1 */
697 uint8 bsscolor; /**<bsscolor value from 0 to 63 */
700 uint16 staid_info[HE_MAX_STAID_PER_BSSCOLOR]; /**< 0-3 staid info of each bsscolor */
703 #define WL_BSS_USER_RADAR_CHAN_SELECT 0x1 /**< User application will randomly select
708 #define DLOAD_FLAG_VER_MASK 0xf000 /**< Downloader version mask */
711 #define DL_CRC_NOT_INUSE 0x0001
712 #define DL_BEGIN 0x0002
713 #define DL_END 0x0004
717 #define EPI_VER_MASK 0xFFFF
801 int8 nprobes; /**< 0, passive, otherwise active */
817 wlc_ssid_t ssid; /**< default: {0, ""} */
822 uint8 scan_type; /**< flags, 0 use default */
835 * low half is count of channels in channel_list, 0
860 wlc_ssid_t ssid; /**< default: {0, ""} */
866 uint32 scan_type; /**< flags, 0 use default, and flags specified in
881 * low half is count of channels in channel_list, 0
1075 #define WL_HE_CAP_MCS_0_7_MAP 0x00ff
1076 #define WL_HE_CAP_MCS_0_8_MAP 0x01ff
1077 #define WL_HE_CAP_MCS_0_9_MAP 0x03ff
1078 #define WL_HE_CAP_MCS_0_10_MAP 0x07ff
1079 #define WL_HE_CAP_MCS_0_11_MAP 0x0fff
1102 /* bitmap for each element: B[4:0]=>c0, B[9:5]=>c1, B[14:10]=>c2, B[19:15]=>c[3-7]
1116 #define OFDM_RATE_MASK 0x0000007f
1140 #define ALLOW_MODE_ANY_BSSID 0
1147 uint16 bssid_cnt; /**< 0: use chanspec_num, and the single bssid,
1153 int32 chanspec_num; /**< 0: all available channels,
1192 #define ROAM_EXP_ENABLE_FLAG (1 << 0)
1210 #define ROAM_EXP_CLEAR_BSSID_PREF (1 << 0)
1222 #define ROAM_EXP_CLEAR_SSID_WHITELIST (1 << 0)
1248 uint8 scan_type; /**< 0 use default, active or passive scan */
1264 wlc_ssid_t ssid; /**< {0, ""}: wildcard scan */
1343 ITFR_NONE = 0, /**< interference */
1370 * on get, rev >= 0
1382 WLC_CCODE_ROLE_ACTIVE = 0,
1491 WLC_SUP_DISCONNECTED = 0,
1539 #define WSEC_PASSPHRASE (1<<0)
1548 #define WL_AUTH_EVENT_DATA_V1 0x1
1598 /* 0 means expired, all 0xFF means never expire */
1722 uint8 enable; /**< set to 1 to enable mode; set to 0 to disable it */
2051 #define WDS_MACLIST_MAGIC 0xFFFFFFFF
2072 #define LQ_IDX_MIN 0
2077 #define LQ_STOP_MONITOR 0
2137 uint8 set; /**< 1=set IOCTL; 0=query IOCTL */
2144 #define WL_NUM_RATES_MCS_1STREAM 8 /**< MCS 0-7 1-stream rates - SISO/CDD/STBC/MCS */
2222 #define WL_PHY_PAVARS_LEN 32 /**< Phytype, Bandrange, chain, a[0], b[0], c[0], d[0] .. */
2289 /* version 0 fields */
2321 /* version for unpacked sample data, int16 {(I,Q),Core(0..N)} */
2335 WL_OTA_TEST_IDLE = 0, /**< Default Idle state */
2343 WL_OTA_SYNC_IDLE = 0, /**< Idle state */
2360 WL_OTA_TEST_TX = 0, /**< ota_tx */
2366 WL_OTA_TEST_BW_20_IN_40MHZ = 0, /**< 20 in 40 operation */
2371 #define HT_MCS_INUSE 0x00000080 /* HT MCS in use,indicates b0-6 holds an mcs */
2372 #define VHT_MCS_INUSE 0x00000100 /* VHT MCS in use,indicates b0-6 holds an mcs */
2373 #define OTA_RATE_MASK 0x0000007f /* rate/mcs value */
2374 #define OTA_STF_SISO 0
2405 * bit3-0: 4 bits TxCore bitmask, specify cores used for transmit frames
2408 #define WL_OTA_TEST_ANT_MASK 0xF0
2409 #define WL_OTA_TEST_CORE_MASK 0x0F
2413 WL_OTA_TEST_FORCE_ANT0 = 0x10, /* force antenna to Ant 0 */
2414 WL_OTA_TEST_FORCE_ANT1 = 0x20, /* force antenna to Ant 1 */
2511 uint16 thresh0; /**< Radar detection, thresh 0 */
2539 uint16 thresh0_sc; /**< Radar detection, thresh 0 */
2548 uint16 thresh0_20_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 20MHz */
2550 uint16 thresh0_40_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 40MHz */
2552 uint16 thresh0_80_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 80MHz */
2554 uint16 thresh0_20_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 20MHz */
2556 uint16 thresh0_40_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 40MHz */
2558 uint16 thresh0_80_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 80MHz */
2560 uint16 thresh0_160_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 160MHz */
2562 uint16 thresh0_160_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 160MHz */
2625 * list and notes the channel in channel_cleared. set to 0 if no channel is cleared
2790 /* active_chains: 0 for all, 1 for 1 chain. */
2792 /* static (0) or dynamic (1).or disabled (3) Mode applies only when active_chains = 0. */
2794 /* bandwidth = Full (0), 20M (1), 40M (2), 80M (3). */
2805 #define WL_MIMO_PS_METRICS_SNAPSHOT_TRACE_TYPE 0
2844 uint8 mimo_ps_state; /* mimo_ps_cfg states: [0-5]. See below for values */
2845 uint8 mrc_state; /* MRC state: NONE (0), ACTIVE(1) */
2848 uint8 bss_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */
2852 uint8 hw_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */
2863 uint8 mimo_ps_state; /* mimo_ps_cfg states: [0-5]. See below for values */
2864 uint8 mrc_state; /* MRC state: NONE (0), ACTIVE(1) */
2867 uint8 bss_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */
2871 uint8 hw_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */
2875 #define WL_MIMO_PS_STATUS_AP_CAP(ap_cap) (ap_cap & 0x0F)
2881 #define WL_MIMO_PS_STATUS_ASSOC_STATUS_MASK 0x0F
2882 #define WL_MIMO_PS_STATUS_ASSOC_STATUS_VHT_WITHOUT_OMN 0x80
2886 WL_MIMO_PS_STATUS_ASSOC_NONE = 0,
2894 WL_MIMO_PS_CFG_STATE_NONE = 0,
2903 #define WL_MIMO_PS_STATUS_HW_STATE_NONE 0
2904 #define WL_MIMO_PS_STATUS_HW_STATE_LTECOEX (0x1 << 0)
2905 #define WL_MIMO_PS_STATUS_HW_STATE_MIMOPS_BSS (0x1 << 1)
2906 #define WL_MIMO_PS_STATUS_HW_STATE_AWDL_BSS (0x1 << 2)
2907 #define WL_MIMO_PS_STATUS_HW_STATE_SCAN (0x1 << 3)
2908 #define WL_MIMO_PS_STATUS_HW_STATE_TXPPR (0x1 << 4)
2909 #define WL_MIMO_PS_STATUS_HW_STATE_PWRTHOTTLE (0x1 << 5)
2910 #define WL_MIMO_PS_STATUS_HW_STATE_TMPSENSE (0x1 << 6)
2911 #define WL_MIMO_PS_STATUS_HW_STATE_IOVAR (0x1 << 7)
2912 #define WL_MIMO_PS_STATUS_HW_STATE_AP_BSS (0x1 << 8)
2915 #define WL_MIMO_PS_STATUS_MRC_NONE 0
2919 #define WL_MIMO_PS_STATUS_MHF_FLAG_NONE 0
2925 #define WL_MIMO_PS_PS_LEARNING_ABORTED (1 << 0)
2940 #define WL_MIMO_PS_PS_LEARNING_CFG_ABORT (1 << 0)
2943 #define WL_MIMO_PS_PS_LEARNING_CFG_MASK (0x7)
2948 /* flag: bit 0 for abort */
2952 /* mimo ps learning version, compatible version is 0 */
2954 /* if version is 0 or rssi is 0, ignored */
2988 #define OCL_DISABLED_HOST 0x01 /* Host has disabled through ocl_enable */
2989 #define OCL_DISABLED_RSSI 0x02 /* Disabled because of ocl_rssi_threshold */
2990 #define OCL_DISABLED_LTEC 0x04 /* Disabled due to LTE Coex activity */
2991 #define OCL_DISABLED_SISO 0x08 /* Disabled while in SISO mode */
2992 #define OCL_DISABLED_CAL 0x10 /* Disabled during active calibration */
2993 #define OCL_DISABLED_CHANSWITCH 0x20 /* Disabled during active channel switch */
2994 #define OCL_DISABLED_ASPEND 0x40 /* Disabled due to assoc pending */
2997 #define OCL_HWCFG 0x01 /* State of OCL config bit in phy HW */
2998 #define OCL_HWMIMO 0x02 /* Set if current coremask is > 1 bit */
2999 #define OCL_COREDOWN 0x80 /* Set if core is currently down */
3013 WL_OPS_CFG_SUBCMD_ENABLE = 0, /* OPS enable/disable mybss and obss
3022 #define WL_OPS_CFG_MASK 0xffff
3023 #define WL_OPS_CFG_CAP_MASK 0xffff0000
3036 #define WL_OPS_MYBSS_PLCP_DUR 0x1 /* OPS based on mybss 11b & 11n mixed HT frames
3039 #define WL_OPS_MYBSS_NAV_DUR 0x2 /* OPS based on mybss RTS-CTS duration */
3040 #define WL_OPS_OBSS_PLCP_DUR 0x4 /* OPS based on obss 11b & 11n mixed HT frames
3043 #define WL_OPS_OBSS_NAV_DUR 0x8 /* OPS based on obss RTS-CTS duration */
3052 uint32 val; /* bitmap of slices, 0 means all slices */
3056 #define OPS_DUR_HIST_BINS 5 /* number of bins used, 0-1, 1-2, 2-4, 4-8, >8 msec */
3086 #define OPS_DISABLED_HOST 0x01 /* Host has disabled through ops_cfg */
3087 #define OPS_DISABLED_UNASSOC 0x02 /* Disabled because the slice is in unassociated state */
3088 #define OPS_DISABLED_SCAN 0x04 /* Disabled because the slice is in scan state */
3089 #define OPS_DISABLED_BCN_MISS 0x08 /* Disabled because beacon missed for a duration */
3104 WL_PSBW_CFG_SUBCMD_ENABLE = 0,
3111 #define WL_PSBW_OVERRIDE_DISA_CFG_MASK 0x0000ffff
3112 #define WL_PSBW_OVERRIDE_DISA_CAP_MASK 0xffff0000
3127 uint32 val; /* infra interface index, 0 */
3148 #define PSBW_ACTIVE 0x1 /* active 20MHz */
3149 #define PSBW_TTTT_PEND 0x2 /* waiting for TTTT intr */
3150 #define PSBW_WAIT_ENTER 0x4 /* in wait period before entering */
3151 #define PSBW_CAL_DONE 0x8 /* 20M channel cal done */
3154 #define WL_PSBW_DISA_HOST 0x00000001 /* Host has disabled through psbw_cfg */
3155 #define WL_PSBW_DISA_AP20M 0x00000002 /* AP is operating on 20 MHz */
3156 #define WL_PSBW_DISA_SLOTTED_BSS 0x00000004 /* AWDL or NAN active */
3157 #define WL_PSBW_DISA_NOT_PMFAST 0x00000008 /* Not PM_FAST */
3158 #define WL_PSBW_DISA_BASICRATESET 0x00000010 /* BasicRateSet is empty */
3159 #define WL_PSBW_DISA_NOT_D3 0x00000020 /* PCIe not in D3 */
3160 #define WL_PSBW_DISA_CSA 0x00000040 /* CSA IE is present */
3161 #define WL_PSBW_DISA_ASSOC 0x00000080 /* assoc state is active/or unassoc */
3162 #define WL_PSBW_DISA_SCAN 0x00000100 /* scan state is active */
3163 #define WL_PSBW_DISA_CAL 0x00000200 /* cal pending or active */
3165 #define WL_PSBW_EXIT_PM 0x00001000 /* Out of PM */
3166 #define WL_PSBW_EXIT_TIM 0x00002000 /* unicast TIM bit present */
3167 #define WL_PSBW_EXIT_DATA 0x00004000 /* Data for transmission */
3168 #define WL_PSBW_EXIT_MGMTDATA 0x00008000 /* management frame for transmission */
3169 #define WL_PSBW_EXIT_BW_UPD 0x00010000 /* BW being updated */
3170 #define WL_PSBW_DISA_NONE 0x80000000 /* reserved for internal use only */
3185 * offset 0: reserved
3189 * offset 0: reserved
3205 * offset 0: reserved
3209 * offset 0: band types
3217 #define RATE_CCK_1MBPS 0
3222 #define RATE_LEGACY_OFDM_6MBPS 0
3298 WL_REINIT_RC_NONE = 0,
3359 #define REINITRSNIDX(_x) (((_x) < WL_REINIT_RC_LAST) ? (_x) : 0)
3370 #define FIRST_COUNTER_OFFSET 0x04
3383 WL_CNT_XTLV_SLICE_IDX = 0x1, /**< Slice index */
3384 WL_CNT_XTLV_WLC = 0x100, /**< WLC layer counters */
3385 WL_CNT_XTLV_WLC_RINIT_RSN = 0x101, /**< WLC layer reinitreason extension */
3386 WL_CNT_XTLV_WLC_HE = 0x102, /* he counters */
3387 WL_CNT_XTLV_WLC_SECVLN = 0x103, /* security vulnerabilities counters */
3388 WL_CNT_XTLV_CNTV_LE10_UCODE = 0x200, /**< wl counter ver < 11 UCODE MACSTAT */
3389 WL_CNT_XTLV_LT40_UCODE_V1 = 0x300, /**< corerev < 40 UCODE MACSTAT */
3390 WL_CNT_XTLV_GE40_UCODE_V1 = 0x400, /**< corerev >= 40 UCODE MACSTAT */
3391 WL_CNT_XTLV_GE64_UCODEX_V1 = 0x800, /* corerev >= 64 UCODEX MACSTAT */
3392 WL_CNT_XTLV_GE80_UCODE_V1 = 0x900, /* corerev >= 80 UCODEX MACSTAT */
3393 WL_CNT_XTLV_GE80_TXFUNFL_UCODE_V1 = 0x1000 /* corerev >= 80 UCODEX MACSTAT */
3398 WL_STATE_COMPACT_COUNTERS = 0x1,
3399 WL_STATE_TXBF_COUNTERS = 0x2,
3400 WL_STATE_COMPACT_HE_COUNTERS = 0x3
3405 WL_STATE_IF_COMPACT_STATE = 0x1,
3406 WL_STATE_IF_ADPS_STATE = 0x02
3790 uint32 reinitreason[NREINITREASONCOUNT]; /**< reinitreason counters; 0: Unknown reason */
3981 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */
4066 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */
4185 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */
4231 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not
4266 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */
4382 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not
4416 uint32 rxf0ovfl; /**< Number of receive fifo 0 overflows */
4555 uint32 reinitreason[NREINITREASONCOUNT]; /**< reinitreason counters; 0: Unknown reason */
4680 uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not
4714 uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */
4915 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not
4949 uint32 rxf0ovfl; /**< Number of receive fifo 0 overflows */
5121 #define WL_CNT_CTL_MGT_FRAMES 0
5204 #define WL_ICMP_IPV6_CLEAR_ALL (1 << 0)
5225 uint8 keep_alive_id; /* 0 - 3 for N = 4 */
5232 #define WL_MKEEP_ALIVE_PERIOD_MASK 0x7FFFFFFF
5233 #define WL_MKEEP_ALIVE_IMMEDIATE 0x80000000
5327 uint8 initiator; /**< 0 is recipient, 1 is originator */
5415 #define TSPEC_DEFAULT_SBW_FACTOR 0x3000 /**< default surplus bw */
5433 #define WL_MACCAPTR_DEFSTART_PTR 0xA00
5434 #define WL_MACCAPTR_DEFSTOP_PTR 0xA3F
5435 #define WL_MACCAPTR_DEFSZ 0x3F
5437 #define WL_MACCAPTR_DEF_MASK 0xFFFFFFFF
5440 WL_MACCAPT_TRIG = 0,
5472 uint8 mode; /**< value 0 or 1 */
5496 #define SORT_CRITERIA_BIT 0
5509 #define SORT_CRITERIA_MASK 0x0001
5510 #define AUTO_NET_SWITCH_MASK 0x0002
5511 #define ENABLE_BKGRD_SCAN_MASK 0x0004
5512 #define IMMEDIATE_SCAN_MASK 0x0008
5513 #define AUTO_CONNECT_MASK 0x0010
5515 #define ENABLE_BD_SCAN_MASK 0x0020
5516 #define ENABLE_ADAPTSCAN_MASK 0x00c0
5517 #define IMMEDIATE_EVENT_MASK 0x0100
5518 #define SUPPRESS_SSID_MASK 0x0200
5519 #define ENABLE_NET_OFFLOAD_MASK 0x0400
5521 #define REPORT_SEPERATELY_MASK 0x0800
5526 #define PFN_INCOMPLETE 0
5529 #define DEFAULT_MSCAN 0
5533 #define PFN_PARTIAL_SCAN_BIT 0
5725 #define WL_PFN_SUPPRESSFOUND_MASK 0x08
5726 #define WL_PFN_SUPPRESSLOST_MASK 0x10
5727 #define WL_PFN_SSID_IMPRECISE_MATCH 0x80
5728 #define WL_PFN_SSID_SAME_NETWORK 0x10000
5729 #define WL_PFN_SUPPRESS_AGING_MASK 0x20000
5730 #define WL_PFN_FLUSH_ALL_SSIDS 0x40000
5732 #define WL_PFN_IOVAR_FLAG_MASK 0xFFFF00FF
5733 #define WL_PFN_RSSI_MASK 0xff00
5744 #define WL_PFN_SSID_CFG_CLEAR 0x1
5773 #define CH_BUCKET_REPORT_NONE 0
5778 #define CH_BUCKET_REPORT_REGULAR 0
5797 #define GSCAN_SEND_ALL_RESULTS_MASK (1 << 0)
5826 #define WL_PFN_REPORT_ALLNET 0
5830 #define WL_PFN_CFG_FLAGS_PROHIBITED 0x00000001 /* Accept and use prohibited channels */
5831 #define WL_PFN_CFG_FLAGS_RESERVED 0xfffffffe /**< Remaining reserved for future use */
5866 #define WL_PFN_SSID_EXT_FOUND 0x1
5867 #define WL_PFN_SSID_EXT_LOST 0x2
5888 #define WL_PFN_HIDDEN_MASK 0x4
5903 #define WL_PFN_MPF_GROUP_SSID 0
5911 #define WL_PFN_MPF_ADAPT_ON_BIT 0
5914 #define WL_PFN_MPF_ADAPT_ON_MASK 0x0001
5915 #define WL_PFN_MPF_ADAPTSCAN_MASK 0x0006
5929 uint16 groupid; /* Group ID: 0 (SSID), 1 (BSSID), other: reserved */
5968 #define WL_MPF_STATE_AUTO (0xFFFF) /* (uint16)-1) */
5974 uint8 force; /* 0 - auto (HW) state, 1 - forced state */
6007 /** GAS state machine tunable parameters. Structure field values of 0 means use the default. */
6032 * 0 means use default social channels.
6040 #define P2PO_FIND_FLAG_SCAN_ALL_APS 0x01 /**< Whether to scan for all APs in the p2po_find
6042 * 0 means scan for only P2P devices.
6103 uint16 max_retransmit; /**< ~0 use default, max retransmit on no ACK from peer */
6104 uint16 response_timeout; /**< ~0 use default, msec to wait for resp after tx packet */
6105 uint16 max_comeback_delay; /**< ~0 use default, max comeback delay in resp else fail */
6106 uint16 max_retries; /**< ~0 use default, max retries on failure */
6111 #define WL_ANQPO_FLAGS_BSSID_WILDCARD 0x0001
6120 uint32 flags; /**< 0x01-Peer is MBO Capable */
6221 WL_ND_IPV6_ADDR_TYPE_UNICAST = 0,
6239 WL_ND_HOSTIP_OP_VER = 0, /* get version */
6271 uint32 period_msec; /** Retransmission period (0 to disable packet re-transmits) */
6272 uint16 len_bytes; /* Size of packet to transmit (0 to disable packet re-transmits) */
6291 #define DFSP_EVT_FLAGS_AP_ASSOC (1 << 0)
6312 #define DFSP_FLAGS_ENAB 0x1
6366 ROLE_NONE = 0x0,
6367 ROLE_AUTH = 0x1,
6368 ROLE_SUP = 0x2,
6369 ROLE_STATIC = 0x3,
6370 ROLE_INVALID = 0xff,
6425 WL_PKT_FILTER_TYPE_PATTERN_MATCH=0, /**< Pattern matching filter */
6460 * Offset '0' is the first byte of the ethernet header.
6464 * at offset 0. Pattern immediately follows mask. for
6495 * Offset '0' is the first byte of the ethernet header.
6500 * mask starts at offset 0. Pattern
6536 ((apf_program)->instr_len * sizeof((apf_program)->instrs[0]))
6572 #define WL_PKT_FILTER_PORTS_VERSION 0
6650 uint8 pe_category; /* PE duration 0/8/16usecs */
6802 wowl_pattern_type_bitmap = 0,
6852 * one per specified period (0 to disable rate limit).
6863 #define RSSI_MONITOR_STOP (1 << 0)
6878 #define WL_CHAN_QUAL_CCA 0
6882 /* Additional channel quality event support in report only (>= 0x100)
6887 #define WL_CHAN_QUAL_FULL_CCA (0x100 | WL_CHAN_QUAL_CCA)
6888 #define WL_CHAN_QUAL_FULLPM_CCA (0x200u | WL_CHAN_QUAL_CCA) /* CCA: me vs. notme, PM vs. !PM */
6902 * one per specified period (0 to disable rate limit).
7028 #define LEGACY1_WL_PFN_MACADDR_CFG_VER 0
7032 #define WL_PFN_MACADDR_FLAG_MASK 0x7
7073 iov_bs_data_record_t structure_record[1]; /**< 0 - structure_count records */
7079 SCB_BS_DATA_FLAG_NO_RESET = (1<<0) /**< Do not clear the counters after reading */
7133 FMTSTR_DRIVER_UP_ID = 0,
7177 #define NBR_ADD_STATIC 0
7181 #define WL_NBR_RPT_FLAG_BSS_PREF_FROM_AP 0x01
7210 EVENTMSGS_NONE = 0,
7217 #define EVENTMSGS_EXT_STRUCT_SIZE OFFSETOF(eventmsgs_ext_t, mask[0])
7278 #define PM_IGNORE_BCMC_PROXY_ARP (1 << 0)
7284 #define HMAPTEST_INVALID_OFFSET 0xFFFFFFFFu
7285 #define HMAPTEST_DEFAULT_WRITE_PATTERN 0xBABECAFEu
7286 #define HMAPTEST_ACCESS_ARM 0
7333 * Length 0 (no types) means get all.
7350 * valid len values are 0-4095.
7357 #define WLC_PMD_WAKE_SET 0x1
7358 #define WLC_PMD_PM_AWAKE_BCN 0x2
7360 #define WLC_PMD_SCAN_IN_PROGRESS 0x8
7361 #define WLC_PMD_RM_IN_PROGRESS 0x10
7362 #define WLC_PMD_AS_IN_PROGRESS 0x20
7363 #define WLC_PMD_PM_PEND 0x40
7364 #define WLC_PMD_PS_POLL 0x80
7365 #define WLC_PMD_CHK_UNALIGN_TBTT 0x100
7366 #define WLC_PMD_APSD_STA_UP 0x200
7367 #define WLC_PMD_TX_PEND_WAR 0x400 /* obsolete, can be reused */
7368 #define WLC_PMD_GPTIMER_STAY_AWAKE 0x800
7369 #define WLC_PMD_PM2_RADIO_SOFF_PEND 0x2000
7370 #define WLC_PMD_NON_PRIM_STA_UP 0x4000
7371 #define WLC_PMD_AP_UP 0x8000
7445 uint8 flags; /**< bit0: 1-sleep, 0- wake. bit1: 0-bit0 invlid, 1-bit0 valid */
7458 /* bit0: 1-sleep, 0- wake. bit1: 0-bit0 invlid, 1-bit0 valid */
7459 #define WL_PWR_PM_AWAKE_STATS_WAKE 0x02
7460 #define WL_PWR_PM_AWAKE_STATS_ASLEEP 0x03
7461 #define WL_PWR_PM_AWAKE_STATS_WAKE_MASK 0x03
7650 PCIE_CNT_XTLV_METRICS = 0x1, /**< PCIe Bus Metrics */
7651 PCIE_CNT_XTLV_BUS_CNT = 0x2 /**< PCIe Bus counters */
7864 #define ND_REPLY_PEER 0x1 /**< Reply was sent to service NS request from peer */
7865 #define ND_REQ_SINK 0x2 /**< Input packet should be discarded */
7866 #define ND_FORCE_FORWARD 0X3 /**< For the dongle to forward req to HOST */
7885 #define PM_DUR_EXCEEDED (1<<0)
7911 * valid len values are 0-4095.
7917 #define WL_PMALERT_FIXED 0 /**< struct wl_pmalert_fixed_t, fixed fields */
8184 #define TXPWR_RPT_LEN_TOKEN 0x5649414e /* Spells VIAN */
8204 #define TXPWR_TARGET_VERSION 0
8214 #define BSS_PEER_INFO_PARAM_CUR_VER 0
8223 #define BSS_PEER_INFO_CUR_VER 0
8237 #define BSS_PEER_LIST_INFO_CUR_VER 0
8250 #define AIBSS_BCN_FORCE_CONFIG_VER_0 0
8263 #define AIBSS_TXFAIL_CONFIG_VER_0 0
8343 uint16 antgrant_lt10ms; /* Ant grant duration cnt 0~10ms */
8438 #define ASSERTLOG_CUR_VER 0x0100
8494 uint8 ccastats[CCASTATS_V2_MAX]; /**< normalized as 0-255 */
8500 uint8 chan_idle; /**< normalized as 0~255 */
8508 uint8 ccastats[CCASTATS_V3_MAX]; /**< normalized as 0-255 */
8516 uint8 chan_idle; /**< normalized as 0~255 */
8531 #define NOISE_MEASURE_KNOISE 0x1
8661 uint8 ops; /**< 0: disable 1: enable */
8691 uint16 enable; /**< 0: disable 1: enable */
8710 #define IHV_NIC_SPECIFIC_EXTENTION_HEADER OFFSETOF(IHV_NIC_SPECIFIC_EXTENSION, ihvData[0])
8743 SPATIAL_MODE_2G_IDX = 0,
8765 #define TXCAL_IOVAR_VERSION 0x1
8775 #define TXCAL_PWR_BPHY 0
8895 trf_mgmt_priority_low = 0, /**< Maps to 802.1p BK */
8904 uint32 trf_mgmt_enabled; /**< 0 - disabled, 1 - enabled */
9042 TXDELAY_STATS_PARTIAL_RESULT = 0,
9054 uint32 full_result; /* 0:Partial, 1:full */
9091 uint8 tclas_proc; /**< TCLAS processing value (0:and, 1:or) */
9110 TFS_STATUS_DISABLED = 0, /**< TFS filter set disabled by user */
9136 #define DMS_DEP_PROXY_ARP (1 << 0)
9140 DMS_STATUS_DISABLED = 0, /**< DMS desc disabled by user */
9159 uint8 mac_len; /**< length of all ether_addr in data array, 0 if STA */
9219 uint16 assoc_delay; /**< Association retry delay, 0: means no delay */
9223 #define WL_BTM_REQ_NO_ASSOC_RETRY_DELAY 0
9226 BSSTRANS_RESP_AUTO = 0, /**< Currently equivalent to ENABLE */
9247 WL_BSSTRANS_POLICY_ROAM_ALWAYS = 0, /**< Roam (or disassociate) in all cases */
9291 WL_TIMBC_STATUS_DISABLE = 0, /**< TIMBC disabled by user */
9313 #define WL_DFRTS_LOGIC_OFF 0 /**< Feature is disabled */
9322 #define WL_PASSACTCONV_DISABLE_NONE 0 /**< Enable permanent and temporary conversions */
9340 #define WL_RMC_ACK_MCAST0 0x02
9341 #define WL_RMC_ACK_MCAST_ALL 0x01
9350 RELMCAST_ENTRY_OP_DISABLE = 0, /**< Disable multi-cast group */
9358 WL_RMC_MODE_RECEIVER = 0, /**< Receiver mode by default */
9451 PROXD_UNDEFINED_METHOD = 0,
9457 #define WL_PROXD_MODE_DISABLE 0
9462 #define WL_PROXD_ACTION_STOP 0
9465 #define WL_PROXD_FLAG_TARGET_REPORT 0x1
9466 #define WL_PROXD_FLAG_REPORT_FAILURE 0x2
9467 #define WL_PROXD_FLAG_INITIATOR_REPORT 0x4
9468 #define WL_PROXD_FLAG_NOCHANSWT 0x8
9469 #define WL_PROXD_FLAG_NETRUAL 0x10
9470 #define WL_PROXD_FLAG_INITIATOR_RPTRTT 0x20
9471 #define WL_PROXD_FLAG_ONEWAY 0x40
9472 #define WL_PROXD_FLAG_SEQ_EN 0x80
9474 #define WL_PROXD_SETFLAG_K 0x1
9475 #define WL_PROXD_SETFLAG_N 0x2
9476 #define WL_PROXD_SETFLAG_S 0x4
9478 #define WL_PROXD_SETFLAG_K 0x1
9479 #define WL_PROXD_SETFLAG_N 0x2
9480 #define WL_PROXD_SETFLAG_S 0x4
9482 #define WL_PROXD_RANDOM_WAKEUP 0x8000
9522 TOF_BW_20MHZ_INDEX = 0,
9708 #define PROXD_COLLECT_GET_STATUS 0
9717 WL_PROXD_COLLECT_METHOD_TYPE_DISABLE = 0x0,
9718 WL_PROXD_COLLECT_METHOD_TYPE_IOVAR = 0x1,
9719 WL_PROXD_COLLECT_METHOD_TYPE_EVENT = 0x2,
9720 WL_PROXD_COLLECT_METHOD_TYPE_EVENT_LOG = 0x4
9729 uint8 status; /**< bitmask 0 -- disable, 0x1 -- enable collection, */
9730 /* 0x2 -- Use generic event, 0x4 -- use event log */
9731 uint16 index; /**< The current frame index [0 to total_frames - 1]. */
9770 * Bits 0 - 23 can be set by host
9775 * Bit 0 : If set to 1, means event uses nan bsscfg,
9778 #define WL_NAN_CTRL_ROUTE_EVENT_VIA_NAN_BSSCFG 0x0000001
9780 #define WL_NAN_CTRL_DISC_BEACON_TX_2G 0x0000002
9782 #define WL_NAN_CTRL_SYNC_BEACON_TX_2G 0x0000004
9784 #define WL_NAN_CTRL_DISC_BEACON_TX_5G 0x0000008
9786 #define WL_NAN_CTRL_SYNC_BEACON_TX_5G 0x0000010
9788 #define WL_NAN_CTRL_AUTO_DPRESP 0x0000020
9790 #define WL_NAN_CTRL_AUTO_DPCONF 0x0000040
9792 #define WL_NAN_CTRL_AUTO_SCHEDRESP 0x0000080
9794 #define WL_NAN_CTRL_AUTO_SCHEDCONF 0x0000100
9796 #define WL_NAN_CTRL_PROP_RATE 0x0000200
9798 #define WL_NAN_CTRL_SVC_OVERRIDE_DEV_AWAKE_DW 0x0000400
9800 #define WL_NAN_CTRL_SCAN_DISABLE 0x0000800
9802 #define WL_NAN_CTRL_POWER_SAVE_DISABLE 0x0001000
9804 #define WL_NAN_CTRL_MERGE_CONF_CID_ONLY 0x0002000
9806 #define WL_NAN_CTRL_5G_SLICE_POWER_OPT 0x0004000
9807 #define WL_NAN_CTRL_DUMP_HEAP 0x0008000
9809 #define WL_NAN_CTRL_HOST_GEN_NDPID 0x0010000
9811 #define WL_NAN_CTRL_DELETE_INACTIVE_PEERS 0x0020000
9813 #define WL_NAN_CTRL_INFRA_ASSOC_COEX 0x0040000
9815 #define WL_NAN_CTRL_DAM_ACCEPT_ALL 0x0080000
9817 #define WL_NAN_CTRL_FASTDISC_IGNO_ROLE 0x0100000
9819 #define WL_NAN_CTRL_INCL_NA_IN_BCNS 0x0200000
9821 #define WL_NAN_CTRL_HOST_ASSIST 0x0400000
9823 #define WL_NAN_CTRL_HOST_CFG_SVC_NDI 0x0800000
9824 #define WL_NAN_CTRL_NDP_HB_ENABLE 0x1000000
9827 #define WL_NAN_CTRL_MAX_MASK 0xFFFFFFF
9856 #define WL_NAN_IOCTL_VERSION 0x2
9863 #define WL_NAN_RANGE_LIMITED 0x0040 /* Publish/Subscribe flags */
9879 #define WL_NAN_DP_TYPE_UNICAST 0
9901 #define WL_NAN_COMP_MASK(_c) (0x0F & ((uint8)(_c)))
9927 uint8 attr_list[0]; /* attributes payload */
9931 #define WL_NAN_TXS_FAILURE 0
10002 uint8 svctype; /* 0 - Publish, 0x1 - Subscribe */
10017 uint8 attr_list[0]; /* attributes payload */
10069 WL_NAN_XTLV_MAC_ADDR = 0x120,
10070 WL_NAN_XTLV_MATCH_RX = 0x121,
10071 WL_NAN_XTLV_MATCH_TX = 0x122,
10072 WL_NAN_XTLV_SVC_INFO = 0x123,
10073 WL_NAN_XTLV_SVC_NAME = 0x124,
10074 WL_NAN_XTLV_SR_FILTER = 0x125,
10075 WL_NAN_XTLV_FOLLOWUP = 0x126,
10076 WL_NAN_XTLV_SVC_LIFE_COUNT = 0x127,
10077 WL_NAN_XTLV_AVAIL = 0x128,
10078 WL_NAN_XTLV_SDF_RX = 0x129,
10079 WL_NAN_XTLV_SDE_CONTROL = 0x12a,
10080 WL_NAN_XTLV_SDE_RANGE_LIMIT = 0x12b,
10081 WL_NAN_XTLV_NAN_AF = 0x12c,
10082 WL_NAN_XTLV_SD_TERMINATE = 0x12d,
10083 WL_NAN_XTLV_CLUSTER_ID = 0x12e,
10084 WL_NAN_XTLV_PEER_RSSI = 0x12f,
10085 WL_NAN_XTLV_BCN_RX = 0x130,
10086 WL_NAN_XTLV_REPLIED = 0x131, /* Publish sent for a subscribe */
10087 WL_NAN_XTLV_RECEIVED = 0x132, /* FUP Received */
10088 WL_NAN_XTLV_DISC_RESULTS = 0x133, /* Discovery results */
10089 WL_NAN_XTLV_TXS = 0x134 /* TX status */
10092 #define WL_NAN_CMD_GLOBAL 0x00
10093 #define WL_NAN_CMD_CFG_COMP_ID 0x01
10094 #define WL_NAN_CMD_ELECTION_COMP_ID 0x02
10095 #define WL_NAN_CMD_SD_COMP_ID 0x03
10096 #define WL_NAN_CMD_SYNC_COMP_ID 0x04
10097 #define WL_NAN_CMD_DATA_COMP_ID 0x05
10098 #define WL_NAN_CMD_DAM_COMP_ID 0x06
10099 #define WL_NAN_CMD_RANGE_COMP_ID 0x07
10100 #define WL_NAN_CMD_GENERIC_COMP_ID 0x08
10101 #define WL_NAN_CMD_SCHED_COMP_ID 0x09
10102 #define WL_NAN_CMD_NSR_COMP_ID 0x0a /* NAN Save Restore */
10103 #define WL_NAN_CMD_NANHO_COMP_ID 0x0b /* NAN Host offload */
10104 #define WL_NAN_CMD_DBG_COMP_ID 0x0f
10114 WL_NAN_XTLV_CFG_MATCH_RX = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x01),
10115 WL_NAN_XTLV_CFG_MATCH_TX = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x02),
10116 WL_NAN_XTLV_CFG_SR_FILTER = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x03),
10117 WL_NAN_XTLV_CFG_SVC_NAME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x04),
10118 WL_NAN_XTLV_CFG_NAN_STATUS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x05),
10119 WL_NAN_XTLV_CFG_SVC_LIFE_COUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x06),
10120 WL_NAN_XTLV_CFG_SVC_HASH = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x07),
10121 WL_NAN_XTLV_CFG_SEC_CSID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x08), /* Security CSID */
10122 WL_NAN_XTLV_CFG_SEC_PMK = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x09), /* Security PMK */
10123 WL_NAN_XTLV_CFG_SEC_PMKID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0A),
10124 WL_NAN_XTLV_CFG_SEC_SCID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0B),
10125 WL_NAN_XTLV_CFG_VNDR_PAYLOAD = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0C),
10126 WL_NAN_XTLV_CFG_HOST_INDPID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0D),
10128 WL_NAN_XTLV_CFG_MAC_ADDR = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0E),
10130 WL_NAN_XTLV_CFG_FDISC_TBMP = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0F),
10132 WL_NAN_XTLV_SD_SVC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01),
10133 WL_NAN_XTLV_SD_FOLLOWUP = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x02),
10134 WL_NAN_XTLV_SD_SDF_RX = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x03),
10135 WL_NAN_XTLV_SD_SDE_CONTROL = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x04),
10136 WL_NAN_XTLV_SD_SDE_RANGE_LIMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x05),
10137 WL_NAN_XTLV_SD_NAN_AF = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x06),
10138 WL_NAN_XTLV_SD_TERM = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x07),
10139 WL_NAN_XTLV_SD_REPLIED = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x08), /* Pub sent */
10140 WL_NAN_XTLV_SD_FUP_RECEIVED = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x09), /* FUP Received */
10141 WL_NAN_XTLV_SD_DISC_RESULTS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0A), /* Pub RX */
10142 WL_NAN_XTLV_SD_TXS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0B), /* Tx status */
10143 WL_NAN_XTLV_SD_SDE_SVC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0C),
10144 WL_NAN_XTLV_SD_SDE_SVC_UPD_IND = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0D),
10145 WL_NAN_XTLV_SD_SVC_NDI = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0E),
10146 WL_NAN_XTLV_SD_NDP_SPEC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0F),
10147 WL_NAN_XTLV_SD_NDPE_TLV_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x10),
10148 WL_NAN_XTLV_SD_NDL_QOS_UPD = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x11),
10149 WL_NAN_XTLV_SD_DISC_CACHE_TIMEOUT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x12),
10151 WL_NAN_XTLV_SYNC_BCN_RX = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01),
10152 WL_NAN_XTLV_EV_MR_CHANGED = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x02),
10154 WL_NAN_XTLV_DATA_DP_END = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01),
10155 WL_NAN_XTLV_DATA_DP_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02),
10156 WL_NAN_XTLV_DATA_DP_SEC_INST = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03),
10157 WL_NAN_XTLV_DATA_DP_TXS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x04), /* txs for dp */
10158 WL_NAN_XTLV_DATA_DP_OPAQUE_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x05),
10159 WL_NAN_XTLV_RANGE_INFO = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01),
10160 WL_NAN_XTLV_RNG_TXS = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x02),
10162 WL_NAN_XTLV_EV_SLOT_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x01),
10163 WL_NAN_XTLV_EV_GEN_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x02),
10164 WL_NAN_XTLV_CCA_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x03),
10165 WL_NAN_XTLV_PER_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x04),
10166 WL_NAN_XTLV_CHBOUND_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x05),
10167 WL_NAN_XTLV_SLOT_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x06),
10169 WL_NAN_XTLV_DAM_NA_ATTR = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), /* na attr */
10170 WL_NAN_XTLV_HOST_ASSIST_REQ = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x02), /* host assist */
10172 WL_NAN_XTLV_GEN_FW_CAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), /* fw cap */
10174 WL_NAN_XTLV_SCHED_INFO = NAN_CMD(WL_NAN_CMD_SCHED_COMP_ID, 0x01),
10177 WL_NAN_XTLV_NSR2_PEER = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x21),
10178 WL_NAN_XTLV_NSR2_NDP = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x22),
10181 WL_NAN_XTLV_NANHO_PEER_ENTRY = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01),
10182 WL_NAN_XTLV_NANHO_DCAPLIST = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x02),
10183 WL_NAN_XTLV_NANHO_DCSLIST = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x03),
10184 WL_NAN_XTLV_NANHO_BLOB = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x04),
10185 WL_NAN_XTLV_NANHO_NDP_STATE = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x05),
10186 WL_NAN_XTLV_NANHO_FRM_TPLT = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x06),
10187 WL_NAN_XTLV_NANHO_OOB_NAF = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x07)
10192 NAN_MAC = 0, /* nan mac */
10211 WL_NAN_CMD_GLB_NAN_VER = NAN_CMD(WL_NAN_CMD_GLOBAL, 0x00),
10215 WL_NAN_CMD_CFG_NAN_INIT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x01),
10216 WL_NAN_CMD_CFG_ROLE = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x02),
10217 WL_NAN_CMD_CFG_HOP_CNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x03),
10218 WL_NAN_CMD_CFG_HOP_LIMIT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x04),
10219 WL_NAN_CMD_CFG_WARMUP_TIME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x05),
10220 WL_NAN_CMD_CFG_STATUS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x06),
10221 WL_NAN_CMD_CFG_OUI = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x07),
10222 WL_NAN_CMD_CFG_COUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x08),
10223 WL_NAN_CMD_CFG_CLEARCOUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x09),
10224 WL_NAN_CMD_CFG_CHANNEL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0A),
10225 WL_NAN_CMD_CFG_BAND = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0B),
10226 WL_NAN_CMD_CFG_CID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0C),
10227 WL_NAN_CMD_CFG_IF_ADDR = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0D),
10228 WL_NAN_CMD_CFG_BCN_INTERVAL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0E),
10229 WL_NAN_CMD_CFG_SDF_TXTIME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0F),
10230 WL_NAN_CMD_CFG_SID_BEACON = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x10),
10231 WL_NAN_CMD_CFG_DW_LEN = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x11),
10232 WL_NAN_CMD_CFG_AVAIL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x12),
10233 WL_NAN_CMD_CFG_WFA_TM = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x13),
10234 WL_NAN_CMD_CFG_EVENT_MASK = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x14),
10235 WL_NAN_CMD_CFG_NAN_CONFIG = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x15), /* ctrl */
10236 WL_NAN_CMD_CFG_NAN_ENAB = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x16),
10237 WL_NAN_CMD_CFG_ULW = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x17),
10238 WL_NAN_CMD_CFG_NAN_CONFIG2 = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x18), /* ctrl2 */
10239 WL_NAN_CMD_CFG_DEV_CAP = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x19),
10240 WL_NAN_CMD_CFG_SCAN_PARAMS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1A),
10241 WL_NAN_CMD_CFG_VNDR_PAYLOAD = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1B),
10242 WL_NAN_CMD_CFG_FASTDISC = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1C),
10243 WL_NAN_CMD_CFG_MIN_TX_RATE = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1D),
10249 WL_NAN_CMD_ELECTION_HOST_ENABLE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x01),
10250 WL_NAN_CMD_ELECTION_METRICS_CONFIG = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x02),
10251 WL_NAN_CMD_ELECTION_METRICS_STATE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x03),
10252 WL_NAN_CMD_ELECTION_LEAVE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x03),
10253 WL_NAN_CMD_ELECTION_MERGE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x04),
10254 WL_NAN_CMD_ELECTION_ADVERTISERS = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x05),
10255 WL_NAN_CMD_ELECTION_RSSI_THRESHOLD = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x06),
10260 WL_NAN_CMD_SD_PARAMS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01),
10261 WL_NAN_CMD_SD_PUBLISH = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x02),
10262 WL_NAN_CMD_SD_PUBLISH_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x03),
10263 WL_NAN_CMD_SD_CANCEL_PUBLISH = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x04),
10264 WL_NAN_CMD_SD_SUBSCRIBE = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x05),
10265 WL_NAN_CMD_SD_SUBSCRIBE_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x06),
10266 WL_NAN_CMD_SD_CANCEL_SUBSCRIBE = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x07),
10267 WL_NAN_CMD_SD_VND_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x08),
10268 WL_NAN_CMD_SD_STATS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x09),
10269 WL_NAN_CMD_SD_TRANSMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0A),
10270 WL_NAN_CMD_SD_FUP_TRANSMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0B),
10271 WL_NAN_CMD_SD_CONNECTION = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0C),
10272 WL_NAN_CMD_SD_SHOW = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0D),
10273 WL_NAN_CMD_SD_DISC_CACHE_TIMEOUT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0E),
10274 WL_NAN_CMD_SD_DISC_CACHE_CLEAR = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0F),
10279 WL_NAN_CMD_SYNC_SOCIAL_CHAN = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01),
10280 WL_NAN_CMD_SYNC_AWAKE_DWS = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x02),
10281 WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x03),
10285 WL_NAN_CMD_DATA_CONFIG = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01),
10286 WL_NAN_CMD_DATA_RSVD02 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02),
10287 WL_NAN_CMD_DATA_RSVD03 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03),
10288 WL_NAN_CMD_DATA_DATAREQ = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x04),
10289 WL_NAN_CMD_DATA_DATARESP = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x05),
10290 WL_NAN_CMD_DATA_DATAEND = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x06),
10291 WL_NAN_CMD_DATA_SCHEDUPD = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x07),
10292 WL_NAN_CMD_DATA_RSVD08 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x08),
10293 WL_NAN_CMD_DATA_CAP = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x9),
10294 WL_NAN_CMD_DATA_STATUS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0A),
10295 WL_NAN_CMD_DATA_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0B),
10296 WL_NAN_CMD_DATA_RSVD0C = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0C),
10297 WL_NAN_CMD_DATA_NDP_SHOW = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0D),
10298 WL_NAN_CMD_DATA_DATACONF = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0E),
10299 WL_NAN_CMD_DATA_MIN_TX_RATE = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0F),
10300 WL_NAN_CMD_DATA_MAX_PEERS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x10),
10301 WL_NAN_CMD_DATA_DP_IDLE_PERIOD = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x11),
10302 WL_NAN_CMD_DATA_DP_OPAQUE_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x12),
10303 WL_NAN_CMD_DATA_DP_HB_DURATION = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x13),
10307 WL_NAN_CMD_DAM_CFG = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01),
10310 /* nan2.0 ranging commands */
10311 WL_NAN_CMD_RANGE_REQUEST = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01),
10312 WL_NAN_CMD_RANGE_AUTO = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x02),
10313 WL_NAN_CMD_RANGE_RESPONSE = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x03),
10314 WL_NAN_CMD_RANGE_CANCEL = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x04),
10315 WL_NAN_CMD_RANGE_IDLE_COUNT = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x05),
10316 WL_NAN_CMD_RANGE_CANCEL_EXT = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x06),
10319 WL_NAN_CMD_DBG_SCAN_PARAMS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x01),
10320 WL_NAN_CMD_DBG_SCAN = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x02),
10321 WL_NAN_CMD_DBG_SCAN_RESULTS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x03),
10323 WL_NAN_CMD_DBG_EVENT_MASK = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x04),
10324 WL_NAN_CMD_DBG_EVENT_CHECK = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x05),
10325 WL_NAN_CMD_DBG_DUMP = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x06),
10326 WL_NAN_CMD_DBG_CLEAR = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x07),
10327 WL_NAN_CMD_DBG_RSSI = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x08),
10328 WL_NAN_CMD_DBG_DEBUG = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x09),
10329 WL_NAN_CMD_DBG_TEST1 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0A),
10330 WL_NAN_CMD_DBG_TEST2 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0B),
10331 WL_NAN_CMD_DBG_TEST3 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0C),
10332 WL_NAN_CMD_DBG_DISC_RESULTS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0D),
10333 WL_NAN_CMD_DBG_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0E),
10334 WL_NAN_CMD_DBG_LEVEL = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0F),
10338 WL_NAN_CMD_GEN_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01),
10339 WL_NAN_CMD_GEN_FW_CAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02),
10343 WL_NAN_CMD_NSR2 = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x20),
10347 WL_NAN_CMD_NANHO_UPDATE = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01),
10348 WL_NAN_CMD_NANHO_FRM_TPLT = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x02),
10349 WL_NAN_CMD_NANHO_OOB_NAF = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x03),
10357 WL_NAN_XTLV_SYNC_MAC_STATS = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01),
10359 WL_NAN_XTLV_SD_DISC_STATS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01),
10361 WL_NAN_XTLV_DATA_NDP_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01),
10362 WL_NAN_XTLV_DATA_NDL_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02),
10363 WL_NAN_XTLV_DATA_SEC_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03),
10365 WL_NAN_XTLV_GEN_SCHED_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01),
10366 WL_NAN_XTLV_GEN_PEER_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02),
10367 WL_NAN_XTLV_GEN_PEER_STATS_DEVCAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x03),
10368 WL_NAN_XTLV_GEN_PEER_STATS_NDP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x04),
10369 WL_NAN_XTLV_GEN_PEER_STATS_SCHED = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x05),
10370 WL_NAN_XTLV_GEN_AVAIL_STATS_SCHED = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x06),
10371 WL_NAN_XTLV_GEN_NDP_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x07),
10373 WL_NAN_XTLV_DAM_STATS = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01),
10374 WL_NAN_XTLV_DAM_AVAIL_STATS = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x02),
10376 WL_NAN_XTLV_RANGE_STATS = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01)
10399 #define WLA_NAN_STATS_GET 0
10402 #define WL_NAN_STAT_ALL 0xFFFFFFFF
10536 WL_NAN_SCHED_STAT_SLOT_COMM = 0x01, /* Committed slot */
10537 WL_NAN_SCHED_STAT_SLOT_COND = 0x02, /* Conditional slot(proposal/counter) */
10538 WL_NAN_SCHED_STAT_SLOT_NDC = 0x04, /* NDC slot */
10539 WL_NAN_SCHED_STAT_SLOT_IMMUT = 0x08, /* Immutable slot */
10540 WL_NAN_SCHED_STAT_SLOT_RANGE = 0x10, /* Ranging slot */
10585 #define NAN_NDP_STATS_FLAG_ROLE_MASK 0x01
10586 #define NAN_NDP_STATS_FLAG_ROLE_INIT 0x00
10587 #define NAN_NDP_STATS_FLAG_ROLE_RESP 0x01
10590 #define NAN_NDP_STATS_FLAG_STATE_MASK 0x07
10591 #define NAN_NDP_STATS_FLAG_STATE_IN_PROG 0x00
10592 #define NAN_NDP_STATS_FLAG_STATE_ESTB 0x01
10593 #define NAN_NDP_STATS_FLAG_STATE_TEARDOWN_WAIT 0x02
10716 WL_NAN_E_OK = 0
10721 WL_NAN_DPEND_E_OK = 0,
10746 WL_NAN_SUB_CMD_FLAG_NONE = 0,
10770 WL_NAN_CONFIG_STATE_DISABLE = 0,
10796 WL_NAN_CTRL2_FLAG1_ALLOW_SDF_TX_UCAST_IN_PROG = 0x00000001,
10798 WL_NAN_CTRL2_FLAG1_ALLOW_SDF_TX_BCAST_IN_PROG = 0x00000002,
10800 WL_NAN_CTRL2_FLAG1_AUTO_SCHEDUPD = 0x00000004,
10802 WL_NAN_CTRL2_FLAG1_SLOT_PRE_CLOSE = 0x00000008
10804 #define WL_NAN_CTRL2_FLAGS1_MASK 0x0000000F
10806 #define WL_NAN_CTRL2_FLAGS2_MASK 0x00000000
10817 WL_NAN_ROLE_AUTO = 0,
10926 WL_NAN_DISABLE_FLAG_HOST_ELECTION = 0,
10931 * 0 - disable host based election
10964 * 0 - disable cluster merge
10971 * role = 0 means configuration by firmware(obsolete); otherwise by host
11049 #define NAN_VIRTUAL_PEER_BIT 0x80
11052 NAC_CNT_NTLV_AF_TX = 0, /* count of AWDL AF containing NTLV tx */
11075 nan_adv_entry_t adv_nodes[0];
11093 #define WL_NAN_RANGE_LIMITED 0x0040
11097 #define WL_NAN_MATCH_ONCE 0x100000
11098 #define WL_NAN_MATCH_NEVER 0x200000
11102 #define WL_NAN_PUB_UNSOLICIT 0x1000 /* Unsolicited Tx */
11103 #define WL_NAN_PUB_SOLICIT 0x2000 /* Solicited Tx */
11104 #define WL_NAN_PUB_BOTH 0x3000 /* Both the above */
11106 #define WL_NAN_PUB_BCAST 0x4000 /* bcast solicited Tx only */
11107 #define WL_NAN_PUB_EVENT 0x8000 /* Event on each solicited Tx */
11108 #define WL_NAN_PUB_SOLICIT_PENDING 0x10000 /* Used for one-time solicited Publish */
11110 #define WL_NAN_FOLLOWUP 0x20000 /* Follow-up frames */
11111 #define WL_NAN_TX_FOLLOWUP 0x40000 /* host generated transmit Follow-up frames */
11115 #define WL_NAN_SUB_ACTIVE 0x1000 /* Active subscribe mode */
11116 #define WL_NAN_SUB_MATCH_IF_SVC_INFO 0x2000 /* Service info in publish */
11118 #define WL_NAN_TTL_UNTIL_CANCEL 0xFFFFFFFF /* Special values for time to live (ttl) parameter */
11124 #define WL_NAN_TTL_FIRST 0
11129 #define WL_NAN_SVC_CTRL_AUTO_DPRESP 0x1000000
11132 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_RECEIVE 0x2000000
11135 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_REPLIED 0x4000000
11138 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_TERMINATED 0x8000000
11150 int8 proximity_rssi; /* RSSI limit to Rx subscribe or pub SDF 0 no effect */
11206 wl_nan_band_t band; /* 0 - b mode 1- a mode */
11272 #define WL_NAN_FUP_SUPR_EVT_TXS 0x01
11317 * If set to 0 then fw default will be used.
11321 * If set to 0 then fw default will be used.
11383 uint8 res; /* resolution: 0 = 16ms, 1 = 32ms, 2 = 64ms 3 = reserved. REfer NAN spec */
11461 #define WL_NAN_DP_MAX_SVC_INFO 0xFF
11465 #define WL_NAN_DP_FLAG_SVC_INFO 0x0001
11466 #define WL_NAN_DP_FLAG_CONFIRM 0x0002
11467 #define WL_NAN_DP_FLAG_EXPLICIT_CFM 0x0004
11468 #define WL_NAN_DP_FLAG_SECURITY 0x0008
11469 #define WL_NAN_DP_FLAG_HAST_NDL_COUNTER 0x0010 /* Host assisted NDL counter */
11473 #define WL_NAN_DP_STATUS_REJECTED 0
11513 uint8 opt_tlvs[0];
11523 uint8 attr_list[0]; /* list of NAN attributes */
11542 /* single-shot when bitmap and offset are set to 0; periodic otherwise */
11576 #define WL_NAN_RANGING_REPORT (1<<0) /**< Enable reporting range to target */
11588 uint8 num_peers_done; /**< host set to 0, when read, shows number of peers
11601 #define WL_NAN_RANGING_STATUS_ABORT 4 /**< with partial results if sounding count > 0 */
11604 uint8 sounding_count; /**< number of measurements completed (0 = failure) */
11609 * Only valid when sounding_count > 0. Examples:
11610 * 0x08 = 0.5m
11611 * 0x10 = 1m
11612 * 0x18 = 1.5m
11613 * set to 0xffffffff to indicate invalid number
11616 * Only valid when sounding_count > 0
11709 #define WL_NAN_PEER_RSSI 0x1
11710 #define WL_NAN_PEER_RSSI_LIST 0x2
11750 #define WL_NAN_NDL_QOS_MAX_LAT_NO_PREF 0xFFFF
11786 #define WL_NAN_INVALID_NDPID 0 /* reserved ndp id */
11789 uint8 type; /* 0- unicast 1 - multicast */
11809 uint8 type; /* 0- unicast 1 - multicast */
11812 /* Local NDP ID for unicast, mc_id for multicast, 0 for implicit NMSG */
11825 uint8 nmsgid; /* NMSG ID or for multicast else 0 */
11843 uint8 type; /* 0: unicast, 1: multicast */
11854 #define WL_NAN_DP_SCHEDUPD_NOTIF (1 << 0)
11878 #define NAN_DP_OPAQUE_INFO_DP_RESP 0x01
11879 #define NAN_DP_OPAQUE_INFO_DP_CONF 0x02
11887 uint8 opaque_info[0];
11891 #define NAN_DP_SESSION_UNICAST 0
11893 #define NAN_DP_SECURITY_NONE 0
11939 uint8 bcn[0];
11944 WL_NAN_HAST_REASON_NONE = 0,
11969 WL_NAN_FW_CAP_FLAG_NONE = 0x00000000, /* dummy */
11970 WL_NAN_FW_CAP_FLAG1_AVAIL = 0x00000001,
11971 WL_NAN_FW_CAP_FLAG1_DISC = 0x00000002,
11972 WL_NAN_FW_CAP_FLAG1_DATA = 0x00000004,
11973 WL_NAN_FW_CAP_FLAG1_SEC = 0x00000008,
11974 WL_NAN_FW_CAP_FLAG1_RANGE = 0x00000010,
11975 WL_NAN_FW_CAP_FLAG1_WFA_TB = 0x00000020,
11976 WL_NAN_FW_CAP_FLAG1_DAM = 0x00000040,
11977 WL_NAN_FW_CAP_FLAG1_DAM_STRICT = 0x00000080,
11978 WL_NAN_FW_CAP_FLAG1_DAM_AUTO = 0x00000100,
11979 WL_NAN_FW_CAP_FLAG1_DBG = 0x00000200,
11980 WL_NAN_FW_CAP_FLAG1_BCMC_IN_NDC = 0x00000400,
11981 WL_NAN_FW_CAP_FLAG1_CHSTATS = 0x00000800,
11982 WL_NAN_FW_CAP_FLAG1_ASSOC_COEX = 0x00001000,
11983 WL_NAN_FW_CAP_FLAG1_FASTDISC = 0x00002000,
11984 WL_NAN_FW_CAP_FLAG1_NO_ID_GEN = 0x00004000,
11985 WL_NAN_FW_CAP_FLAG1_DP_OPAQUE_DATA = 0x00008000,
11986 WL_NAN_FW_CAP_FLAG1_NSR2 = 0x00010000,
11987 WL_NAN_FW_CAP_FLAG1_NSR2_SAVE = 0x00020000,
11988 WL_NAN_FW_CAP_FLAG1_NANHO = 0x00040000
12020 #define WL_NAN_CIPHER_SUITE_SHARED_KEY_128_MASK 0x01
12021 #define WL_NAN_CIPHER_SUITE_SHARED_KEY_256_MASK 0x02
12040 WL_NAN_NSR_NDP_FLAG_LCL_INITATOR = 0x0001,
12041 WL_NAN_NSR_NDP_FLAG_MCAST = 0x0002
12057 /* NAN2.0 Ranging definitions */
12060 #define NAN_RANGE_INDICATION_CONT (1<<0)
12065 #define NAN_RANGE_FLAG_AUTO_ACCEPT (1 << 0)
12095 #define NAN_RNG_TERM_FLAG_IMMEDIATE (1u << 0u) /* Do not wait for TXS */
12238 #define WL_P2P_NAN_IOCTL_VERSION 0x1
12260 #define WL_P2P_NAN_DEVICE_P2P 0x0
12261 #define WL_P2P_NAN_DEVICE_GO 0x1
12262 #define WL_P2P_NAN_DEVICE_GC 0x2
12263 #define WL_P2P_NAN_DEVICE_INVAL 0xFF
12269 uint32 flags; /* 0x1 to NEW, 0x2 to ADD, 0x4 to DEL */
12290 #define WL_P2P_NAN_CONFIG_NEW 0x1
12291 #define WL_P2P_NAN_CONFIG_ADD 0x2
12292 #define WL_P2P_NAN_CONFIG_DEL 0x4
12323 WL_AVAIL_NONE = 0x0000,
12324 WL_AVAIL_LOCAL = 0x0001,
12325 WL_AVAIL_PEER = 0x0002,
12326 WL_AVAIL_NDC = 0x0003,
12327 WL_AVAIL_IMMUTABLE = 0x0004,
12328 WL_AVAIL_RESPONSE = 0x0005,
12329 WL_AVAIL_COUNTER = 0x0006,
12330 WL_AVAIL_RANGING = 0x0007,
12331 WL_AVAIL_UPD_POT = 0x0008, /* modify potential, keep committed/conditional */
12332 WL_AVAIL_UPD_COM_COND = 0x0009, /* modify committed/conditional, keep potential */
12333 WL_AVAIL_REMOVE_MAP = 0x000A, /* remove map */
12334 WL_AVAIL_FRM_TYPE = 0x000B, /* specify frame types containing NA */
12337 #define WL_AVAIL_TYPE_MASK 0x000F
12338 #define WL_AVAIL_FLAG_REMOVE 0x2000 /* remove schedule attr of given type & map id */
12339 #define WL_AVAIL_FLAG_SELECTED_NDC 0x4000
12340 #define WL_AVAIL_FLAG_RAW_MODE 0x8000
12341 #define WL_AVAIL_FLAGS_MASK 0xFF00
12348 WL_AVAIL_ENTRY_NONE = 0x0000,
12349 WL_AVAIL_ENTRY_COM = 0x0001, /* committed */
12350 WL_AVAIL_ENTRY_POT = 0x0002, /* potential */
12351 WL_AVAIL_ENTRY_COND = 0x0004, /* conditional */
12352 WL_AVAIL_ENTRY_PAGED = 0x0008, /* P-NDL */
12353 WL_AVAIL_ENTRY_USAGE = 0x0030, /* usage preference */
12354 WL_AVAIL_ENTRY_BIT_DUR = 0x00C0, /* bit duration */
12355 WL_AVAIL_ENTRY_BAND_PRESENT = 0x0100, /* band present */
12356 WL_AVAIL_ENTRY_CHAN_PRESENT = 0x0200, /* channel information present */
12357 WL_AVAIL_ENTRY_CHAN_ENTRY_PRESENT = 0x0400, /* channel entry (opclass+bitmap) */
12358 /* free to use 0x0800 */
12359 WL_AVAIL_ENTRY_RXNSS = 0xF000 /* max num of spatial stream RX */
12364 WL_AVAIL_BIT_DUR_16 = 0, /* 16TU */
12372 WL_AVAIL_PERIOD_0 = 0, /* 0TU */
12384 WL_AVAIL_BAND_NONE = 0, /* reserved */
12392 #define WL_AVAIL_ENTRY_TYPE_MASK 0x000F
12393 #define WL_AVAIL_ENTRY_USAGE_MASK 0x0030 /* up to 4 usage preferences */
12398 #define WL_AVAIL_ENTRY_BIT_DUR_MASK 0x00C0 /* 0:16TU, 1:32TU, 2:64TU, 3:128TU */
12403 #define WL_AVAIL_ENTRY_BAND_MASK 0x0100 /* 0=band not present, 1=present */
12406 #define WL_AVAIL_ENTRY_CHAN_MASK 0x0200 /* 0=channel info not present, 1=present */
12409 #define WL_AVAIL_ENTRY_CHAN_ENTRY_MASK 0x0400 /* 0=chanspec, 1=hex channel entry */
12412 #define WL_AVAIL_ENTRY_RXNSS_MASK 0xF000
12416 #define WL_AVAIL_ENTRY_RXNSS_MAX 15 /* 0-15 */
12419 #define WL_AVAIL_ENTRY_OPCLASS_MASK 0xFF
12420 #define WL_AVAIL_ENTRY_CHAN_BITMAP_MASK 0xFF00
12442 } u; /* band or channel value, 0=all band/channels */
12476 ((n) * OFFSETOF(wl_avail_entry_t, bitmap)) : 0)
12481 uint8 overwrite; /* bit 0: overwrite all
12482 * 1-4: map ID if overwrite all is 0
12499 #define WL_NAN_ULW_CTRL_PRESENT (1 << 0)
12509 WL_NAN_WFA_TM_IGNORE_TERMINATE_NAF = 0x00000001,
12510 WL_NAN_WFA_TM_IGNORE_RX_DATA_OUTSIDE_CRB = 0x00000002,
12511 WL_NAN_WFA_TM_ALLOW_TX_DATA_OUTSIDE_CRB = 0x00000004,
12512 WL_NAN_WFA_TM_ENFORCE_NDL_COUNTER = 0x00000008,
12513 WL_NAN_WFA_TM_BYPASS_NDL_PROPOSAL_VALIDATION = 0x00000010,
12515 WL_NAN_WFA_TM_SEC_SEND_PINGS_BYPASS_NDP_SM = 0x00000020,
12517 WL_NAN_WFA_TM_SEC_INCORRECT_MIC = 0x00000040,
12519 WL_NAN_WFA_TM_SEC_REJECT_STATUS4M4 = 0x00000080,
12521 WL_NAN_WFA_TM_SEC_SEND_MGMT_CLEAR = 0x00000100,
12523 WL_NAN_WFA_TM_NDL_QOS_VALIDATE = 0x00000200,
12525 WL_NAN_WFA_TM_GEN_SCHED_UPD = 0x00000400,
12527 WL_NAN_WFA_TM_ULW_START_TIME = 0x00000800,
12529 WL_NAN_WFA_TM_SDF_SCHED_VALIDATE = 0x00001000,
12531 WL_NAN_WFA_TM_SKIP_RAW_NA_BLOB = 0x00002000,
12533 WL_NAN_WFA_TM_LOCAL_NA_OVERWRITE = 0x00004000,
12535 WL_NAN_WFA_TM_SELF_CFG_NDL_QOS = 0x00008000,
12537 WL_NAN_WFA_TM_SEND_NAF_IN_DW = 0x00010000,
12539 WL_NAN_WFA_TM_RESTRICT_COUNTER_SLOTS_CHAN = 0x00020000,
12541 WL_NAN_WFA_TM_NDPE_NEGATIVE_TEST_TB = 0x00040000,
12542 /* Set NDPE(NAN3.0) capable bit in dev cap attr */
12543 WL_NAN_WFA_TM_ENABLE_NDPE_CAP = 0x00080000,
12546 WL_NAN_WFA_TM_FLAG_MASK = 0x000FFFFF
12608 uint16 type; /**< type: 0 channel table, 1 channel smoothing table, 2 and 3 seq */
12717 #define WL_WSEC_INFO_VERSION 0x01
12720 #define WL_WSEC_INFO_BSS_BASE 0x0100
12727 WL_WSEC_INFO_NONE = 0,
12744 WL_WSEC_INFO_MAX = 0xffff
12771 #define WL_RANDMAC_API_VERSION 0x0100 /**< version 1.0 */
12772 #define WL_RANDMAC_API_MIN_VERSION 0x0100 /**< version 1.0 */
12776 WL_RANDMAC_SUBCMD_NONE = 0,
12793 uint8 data[0]; /* subcommand data */
12807 #define WL_RANDMAC_USER_NONE 0x0000
12808 #define WL_RANDMAC_USER_FTM 0x0001
12809 #define WL_RANDMAC_USER_NAN 0x0002
12810 #define WL_RANDMAC_USER_SCAN 0x0004
12811 #define WL_RANDMAC_USER_ANQP 0x0008
12812 #define WL_RANDMAC_USER_ALL 0xFFFF
12816 WL_RANDMAC_FLAGS_NONE = 0x00,
12817 WL_RANDMAC_FLAGS_ADDR = 0x01,
12818 WL_RANDMAC_FLAGS_MASK = 0x02,
12819 WL_RANDMAC_FLAGS_METHOD = 0x04,
12820 WL_RANDMAC_FLAGS_ALL = 0xFF
12846 WL_RANDMAC_EVENT_NONE = 0, /**< not an event, reserved */
12859 #define WL_RANDMAC_EVENT_MASK_ALL 0xfffffffe
12862 ((_mask) & WL_RANDMAC_EVENT_MASK_EVENT(_event_type)) != 0)
12866 WL_RANDMAC_TLV_NONE = 0,
12901 #define WL_SCANMAC_SUBCMD_ENABLE 0
12907 uint8 enable; /**< 1 - enable, 0 - disable */
12925 #define WL_SCANMAC_SCAN_UNASSOC (0x01 << 0) /**< unassociated scans */
12926 #define WL_SCANMAC_SCAN_ASSOC_ROAM (0x01 << 1) /**< associated roam scans */
12927 #define WL_SCANMAC_SCAN_ASSOC_PNO (0x01 << 2) /**< associated PNO scans */
12928 #define WL_SCANMAC_SCAN_ASSOC_HOST (0x01 << 3) /**< associated host scans */
12932 #define WL_SCAN_TYPE_ASSOC 0x1 /* Assoc scan */
12933 #define WL_SCAN_TYPE_ROAM 0x2 /* Roam scan */
12934 #define WL_SCAN_TYPE_FWSCAN 0x4 /* Other FW scan */
12935 #define WL_SCAN_TYPE_HOSTSCAN 0x8 /* Host scan */
12958 #define WL_BDO_SUBCMD_DOWNLOAD 0 /* Download flattened database */
12970 * is required (i.e. frag_num = 0, total_size = frag_size).
12975 uint16 frag_num; /* fragment number, 0 for first fragment, N-1 for last fragment */
12986 uint8 enable; /* 1 - enable, 0 - disable */
13010 #define WL_TKO_SUBCMD_MAX_TCP 0 /* max TCP connections supported */
13025 /* 0 - 3600 sec are valid */
13047 uint8 index; /* TCP connection index, 0 to max-1 */
13048 uint8 ip_addr_type; /* 0 - IPv4, 1 - IPv6 */
13059 * offset 0 - local IPv4
13064 * offset 0 - local IPv6
13073 uint8 index; /* TCP connection index, 0 to max-1 */
13078 uint8 enable; /* 1 - enable, 0 - disable */
13095 uint8 index; /**< TCP connection index, 0 to max-1 */
13101 TKO_STATUS_NORMAL = 0, /* TCP connection normal, no error */
13125 #define WL_DLTRO_SUBCMD_CONNECT 0 /* DLTRO connection info */
13133 uint8 index; /* DLTRO connection index, 0 to max-1 */
13134 uint8 ip_addr_type; /* 0 - IPv4, 1 - IPv6 */
13135 uint8 offload_type; /* 0 - Client, 1 - Server */
13148 uint8 index; /* DLTRO connection index, 0 to max-1 */
13159 uint8 index; /* DLTRO connection index, 0 to max-1 */
13163 RSSI_REASON_UNKNOW = 0,
13170 TOF_REASON_OK = 0,
13180 RSSI_STATE_POLL = 0,
13193 TOF_STATE_IDLE = 0,
13204 TOF_LEGACY_UNKNOWN = 0,
13210 TOF_TYPE_ONE_WAY = 0,
13216 TOF_FRAME_RATE_VHT = 0,
13222 TOF_ADJ_SOFTWARE = 0,
13230 FRAME_TYPE_CCK = 0,
13264 nd_bss_any = 0,
13302 uint8 nd_wake_data[0]; /**< Wake data (currently unused) */
13358 WL_RRM_BCN_MODE_PASSIVE = 0, /* passive mode */
13439 WL_RRM_CONFIG_NONE = 0, /* reserved */
13453 WL_RRM_EVENT_NONE = 0, /* not an event, reserved */
13478 uint16 max_age; /* Max elapsed time before FTM request, 0xFFFF = any */
13519 WL_RRM_FRNG_NONE = 0, /* reserved */
13527 #define WL_RRM_RPT_VER 0
13530 #define WL_RRM_RPT_FALG_ERR 0
13531 #define WL_RRM_RPT_FALG_GRP_ID_PROPR (1 << 0)
13571 #define EVENT_LOG_SET_TYPE_CURRENT_VERSION 0
13590 STAMON_CFG_CMD_DEL = 0,
13601 wl_stamon_cfg_cmd_type_t cmd; /**< 0 - delete, 1 - add */
13629 struct ether_addr ea; /**< STA MAC or 0xFF... */
13649 #define WL_WDSIFTYPE_NONE 0x0 /**< The interface type is neither WDS nor DWDS. */
13650 #define WL_WDSIFTYPE_WDS 0x1 /**< The interface is WDS type. */
13651 #define WL_WDSIFTYPE_DWDS 0x2 /**< The interface is DWDS type. */
13694 WLC_AP_IOV_OP_DISABLE = 0,
13773 uint32 config; /**< MODE: AUTO (-1), Disable (0), Enable (1) */
13774 uint32 status; /**< Current state: Disabled (0), Enabled (1) */
13777 #define WLC_RSDB_MODE_AUTO_MASK 0x80
13853 #define WLC_API_VERSION_MINOR_MAX 0
13858 #define WL_PROXD_API_VERSION 0x0300 /**< version 3.0 */
13861 #define WL_PROXD_API_MIN_VERSION 0x0300
13865 WL_PROXD_METHOD_NONE = 0,
13876 WL_PROXD_FLAG_NONE = 0x00000000,
13877 WL_PROXD_FLAG_RX_ENABLED = 0x00000001, /**< respond to requests, per bss */
13878 WL_PROXD_FLAG_RX_RANGE_REQ = 0x00000002, /**< 11mc range requests enabled */
13879 WL_PROXD_FLAG_TX_LCI = 0x00000004, /**< tx lci, if known */
13880 WL_PROXD_FLAG_TX_CIVIC = 0x00000008, /**< tx civic, if known */
13881 WL_PROXD_FLAG_RX_AUTO_BURST = 0x00000010, /**< auto respond w/o host action */
13882 WL_PROXD_FLAG_TX_AUTO_BURST = 0x00000020, /**< continue tx w/o host action */
13883 WL_PROXD_FLAG_AVAIL_PUBLISH = 0x00000040, /**< publish availability */
13884 WL_PROXD_FLAG_AVAIL_SCHEDULE = 0x00000080, /**< schedule using availability */
13885 WL_PROXD_FLAG_ASAP_CAPABLE = 0x00000100, /* ASAP capable */
13886 WL_PROXD_FLAG_MBURST_FOLLOWUP = 0x00000200, /* new multi-burst algorithm */
13887 WL_PROXD_FLAG_SECURE = 0x00000400, /* per bsscfg option */
13888 WL_PROXD_FLAG_NO_TSF_SYNC = 0x00000800, /* disable tsf sync */
13889 WL_PROXD_FLAG_ALL = 0xffffffff
13898 WL_PROXD_SESSION_FLAG_NONE = 0x00000000, /**< no flags */
13899 WL_PROXD_SESSION_FLAG_INITIATOR = 0x00000001, /**< local device is initiator */
13900 WL_PROXD_SESSION_FLAG_TARGET = 0x00000002, /**< local device is target */
13901 WL_PROXD_SESSION_FLAG_ONE_WAY = 0x00000004, /**< (initiated) 1-way rtt */
13902 WL_PROXD_SESSION_FLAG_AUTO_BURST = 0x00000008, /**< created w/ rx_auto_burst */
13903 WL_PROXD_SESSION_FLAG_PERSIST = 0x00000010, /**< good until cancelled */
13904 WL_PROXD_SESSION_FLAG_RTT_DETAIL = 0x00000020, /**< rtt detail in results */
13905 WL_PROXD_SESSION_FLAG_SECURE = 0x00000040, /**< sessionis secure */
13906 WL_PROXD_SESSION_FLAG_AOA = 0x00000080, /**< AOA along w/ RTT */
13907 WL_PROXD_SESSION_FLAG_RX_AUTO_BURST = 0x00000100, /**< Same as proxd flags above */
13908 WL_PROXD_SESSION_FLAG_TX_AUTO_BURST = 0x00000200, /**< Same as proxd flags above */
13909 WL_PROXD_SESSION_FLAG_NAN_BSS = 0x00000400, /**< Use NAN BSS, if applicable */
13910 WL_PROXD_SESSION_FLAG_TS1 = 0x00000800, /**< e.g. FTM1 - ASAP-capable */
13911 WL_PROXD_SESSION_FLAG_REPORT_FAILURE = 0x00002000, /**< report failure to target */
13912 WL_PROXD_SESSION_FLAG_INITIATOR_RPT = 0x00004000, /**< report distance to target */
13913 WL_PROXD_SESSION_FLAG_NOCHANSWT = 0x00008000,
13914 WL_PROXD_SESSION_FLAG_NETRUAL = 0x00010000, /**< netrual mode */
13915 WL_PROXD_SESSION_FLAG_SEQ_EN = 0x00020000, /**< Toast */
13916 WL_PROXD_SESSION_FLAG_NO_PARAM_OVRD = 0x00040000, /**< no param override from target */
13917 WL_PROXD_SESSION_FLAG_ASAP = 0x00080000, /**< ASAP session */
13918 WL_PROXD_SESSION_FLAG_REQ_LCI = 0x00100000, /**< transmit LCI req */
13919 WL_PROXD_SESSION_FLAG_REQ_CIV = 0x00200000, /**< transmit civic loc req */
13920 WL_PROXD_SESSION_FLAG_PRE_SCAN = 0x00400000, /* enable pre-scan for asap=1 */
13921 WL_PROXD_SESSION_FLAG_AUTO_VHTACK = 0x00800000, /* use vhtack based on brcm ie */
13922 WL_PROXD_SESSION_FLAG_VHTACK = 0x01000000, /* vht ack is in use - output only */
13923 WL_PROXD_SESSION_FLAG_BDUR_NOPREF = 0x02000000, /* burst-duration: no preference */
13924 WL_PROXD_SESSION_FLAG_NUM_FTM_NOPREF = 0x04000000, /* num of FTM frames: no preference */
13925 WL_PROXD_SESSION_FLAG_FTM_SEP_NOPREF = 0x08000000, /* time btw FTM frams: no pref */
13926 WL_PROXD_SESSION_FLAG_NUM_BURST_NOPREF = 0x10000000, /* num of bursts: no pref */
13927 WL_PROXD_SESSION_FLAG_BURST_PERIOD_NOPREF = 0x20000000, /* burst period: no pref */
13928 WL_PROXD_SESSION_FLAG_MBURST_FOLLOWUP = 0x40000000, /* new mburst algo - reserved */
13929 WL_PROXD_SESSION_FLAG_MBURST_NODELAY = 0x80000000, /**< good until cancelled */
13930 WL_PROXD_SESSION_FLAG_ALL = 0xffffffff
13937 WL_PROXD_TMU_TU = 0, /**< 1024us */
13955 WL_PROXD_CMD_NONE = 0,
13983 * id 0 is reserved
13984 * ids 1..0x7fff - allocated by host/app
13985 * 0x8000-0xffff - allocated by firmware, used for auto/rx
13988 WL_PROXD_SESSION_ID_GLOBAL = 0
13992 #define WL_PROXD_SID_EXT_MAX 0x7fff
13993 #define WL_PROXD_SID_EXT_ALLOC(_sid) ((_sid) > 0 && (_sid) <= WL_PROXD_SID_EXT_MAX)
14051 WL_PROXD_E_OK = 0
14059 WL_PROXD_PHY_ERR_LB_CORR_THRESH = (1 << 0), /* Loopback Correlation threshold */
14073 WL_PROXD_SESSION_STATE_NONE = 0,
14090 WL_PROXD_RTT_SAMPLE_NONE = 0x00,
14091 WL_PROXD_RTT_SAMPLE_DISCARD = 0x01
14100 WL_PRXOD_RESULT_FLAG_NONE = 0x0000,
14101 WL_PROXD_RESULT_FLAG_NLOS = 0x0001, /**< LOS - if available */
14102 WL_PROXD_RESULT_FLAG_LOS = 0x0002, /**< NLOS - if available */
14103 WL_PROXD_RESULT_FLAG_FATAL = 0x0004, /**< Fatal error during burst */
14104 WL_PROXD_RESULT_FLAG_VHTACK = 0x0008, /* VHTACK or Legacy ACK used */
14105 WL_PROXD_REQUEST_SENT = 0x0010, /* FTM request was sent */
14106 WL_PROXD_REQUEST_ACKED = 0x0020, /* FTM request was acked */
14107 WL_PROXD_LTFSEQ_STARTED = 0x0040, /* LTF sequence started */
14108 WL_PROXD_RESULT_FLAG_ALL = 0xffff
14149 uint16 num_rtt; /* 0 if no detail */
14196 uint16 num_rtt; /* 0 if no detail */
14248 WL_PROXD_CAP_NONE = 0x0000,
14249 WL_PROXD_CAP_ALL = 0xffff
14255 WL_PROXD_FTM_CAP_NONE = 0x0000,
14256 WL_PROXD_FTM_CAP_FTM1 = 0x0001
14292 WL_PROXD_WAIT_NONE = 0x0000,
14293 WL_PROXD_WAIT_KEY = 0x0001,
14294 WL_PROXD_WAIT_SCHED = 0x0002,
14295 WL_PROXD_WAIT_TSF = 0x0004
14333 #define WL_PROXD_LCI_LAT_OFF 0
14339 _lat_err = (_lci)->data[(_off)] & 0x3f; \
14350 _long_err = (_lci)->data[(_off)] & 0x3f; \
14361 _alt_type = (_lci)->data[_off] & 0x0f; \
14363 _alt_err |= ((_lci)->data[(_off)+1] & 0x03) << 4; \
14376 WL_PROXD_AVAIL_NONE = 0,
14377 WL_PROXD_AVAIL_NAN_PUBLISHED = 0x0001,
14378 WL_PROXD_AVAIL_SCHEDULED = 0x0002 /**< scheduled by proxd */
14384 WL_PROXD_TREF_NONE = 0,
14410 #define WL_PROXD_AVAIL24_TIMESLOTS(_avail24) WL_PROXD_AVAIL24_TIMESLOT(_avail24, 0)
14413 (_num_slots) * sizeof(*WL_PROXD_AVAIL24_TIMESLOT(_avail24, 0)))
14426 #define WL_PROXD_AVAIL_TIMESLOTS(_avail) WL_PROXD_AVAIL_TIMESLOT(_avail, 0)
14429 (_num_slots) * sizeof(*WL_PROXD_AVAIL_TIMESLOT(_avail, 0)))
14435 WL_PROXD_DEBUG_NONE = 0x00000000,
14436 WL_PROXD_DEBUG_LOG = 0x00000001,
14437 WL_PROXD_DEBUG_IOV = 0x00000002,
14438 WL_PROXD_DEBUG_EVENT = 0x00000004,
14439 WL_PROXD_DEBUG_SESSION = 0x00000008,
14440 WL_PROXD_DEBUG_PROTO = 0x00000010,
14441 WL_PROXD_DEBUG_SCHED = 0x00000020,
14442 WL_PROXD_DEBUG_RANGING = 0x00000040,
14443 WL_PROXD_DEBUG_NAN = 0x00000080,
14444 WL_PROXD_DEBUG_PKT = 0x00000100,
14445 WL_PROXD_DEBUG_SEC = 0x00000200,
14446 WL_PROXD_DEBUG_EVENTLOG = 0x80000000, /* map/enable EVNET_LOG_TAG_PROXD_INFO */
14447 WL_PROXD_DEBUG_ALL = 0xffffffff
14453 WL_PROXD_TLV_ID_NONE = 0,
14542 WL_PROXD_EVENT_NONE = 0, /**< not an event, reserved */
14570 #define WL_PROXD_EVENT_MASK_ALL 0xfffffffe
14573 ((_mask) & WL_PROXD_EVENT_MASK_EVENT(_event_type)) != 0)
14587 WL_PROXD_RANGING_STATE_NONE = 0,
14596 WL_PROXD_RANGING_FLAG_NONE = 0x0000, /**< no flags */
14597 WL_PROXD_RANGING_FLAG_DEL_SESSIONS_ON_STOP = 0x0001,
14598 WL_PROXD_RANGING_FLAG_ALL = 0xffff
14656 * 0-10, 11-20, 21-30, 31-255. A WLC_E_BSS_LOAD event is generated each time
14665 * one per specified period (0 to disable rate limit).
14680 #define WL_ROAM_PROF_VER_0 0
14685 #define WL_ROAM_PROF_NONE (0 << 0)
14686 #define WL_ROAM_PROF_LAZY (1 << 0)
14699 #define WL_MAX_CHANNEL_USAGE 0x0FF
14700 #define WL_CU_PERCENTAGE_DISABLE 0
14706 #define WL_ESTM_LOW_TRIGGER_DISABLE 0
14815 uint16 weight; /* weightage for each type between 0 to 100 */
14834 #define WNM_BSS_SELECT_TYPE_RSSI 0
14861 * a Bit Mask. As of now only Bit 0 and Bit 1 are used as mentioned below.
14867 * Bit 0 of flags field is used to inform whether the interface requested to
14869 * 0 - Create a STA interface
14871 * NOTE: This Bit 0 is applicable for the WL_INTERFACE_CREATE_VER < 2
14873 #define WL_INTERFACE_CREATE_STA (0 << 0)
14874 #define WL_INTERFACE_CREATE_AP (1 << 0)
14877 * From revision >= 2 Bit 0 of flags field will not used be for STA or AP interface creation.
14881 WL_INTERFACE_TYPE_STA = 0,
14895 * 0 - Ignore mac_addr field
14898 #define WL_INTERFACE_MAC_DONT_USE (0 << 1)
14904 * 0 - Ignore wlc_index field
14907 #define WL_INTERFACE_WLC_INDEX_DONT_USE (0 << 2)
14912 * 0 - Ignore if_index field
14919 * 0 - Ignore bssid field
15014 PRIO_ROAM_MODE_OFF = 0, /* Prio_Roam feature disable */
15067 STATE_NONE = 0,
15127 TBOW_HO_MODE_START_GO = 0,
15131 TBOW_HO_MODE_STOP_GO = 0x10,
15139 #define BCNTRIMST_PER 0 /* Number of beacons to trim (0: disable) */
15182 #define WL_BCNTRIM_DISABLE_HOST 0x1 /* Host disabled bcntrim through bcntrim IOVar */
15183 #define WL_BCNTRIM_DISABLE_PHY_RATE 0x2 /* bcntrim disabled because beacon rx rate is
15186 #define WL_BCNTRIM_DISABLE_QUIET_IE 0x4 /* bcntrim disable when Quiet IE present */
15187 #define WL_BCNTRIM_DISABLE_QBSSLOAD_IE 0x8 /* bcntrim disable when QBSS Load IE present */
15188 #define WL_BCNTRIM_DISABLE_OPERMODE_IE 0x10 /* bcntrim dsiable when opermode IE is present */
15189 #define WL_BCNTRIM_DISABLE_CSA_IE 0x20 /* bcntrim dsiable when CSA IE is present */
15206 WL_BCNTRIM_CFG_SUBCMD_PHY_RATE_THRESH = 0, /* PHY rate threshold above
15245 #define TXPWRCAPCONFIG_WCI2 0u
15248 #define TXPWRCAPCONFIG_NONE 0xFFu
15251 #define TXPWRCAPSTATE_LOW_CAP 0
15253 #define TXPWRCAPSTATE_HOST_LOW_WCI2_LOW_CAP 0
15319 * The index into pwrs will be: 0: onbody-cck, 1: onbody-ofdm, 2:offbody-cck, 3:offbody-ofdm
15322 * The index into pwrs will be: 0: onbody, 1: offbody-ofdm
15325 #define CAP_ONOFF_BODY (0x1) /* on/off body only */
15326 #define CAP_CCK_OFDM (0x2) /* cck/ofdm capability only */
15327 #define CAP_LTE_CELL (0x4) /* cell on/off capability; required for iOS builds */
15328 #define CAP_HEAD_BODY (0x8) /* head/body capability */
15329 #define CAP_2G_DEPON_5G (0x10) /* 2G pwr caps depend on other slice 5G subband */
15330 #define CAP_SISO_MIMO (0x20) /* Siso/Mimo Separate Power Caps */
15331 #define CAP_ANT_TX (0x40) /* Separate Power Caps based on cell ant tx value */
15343 #define TXHDR_SEC_NONSDB_MAIN_2G 0
15460 OFFSETOF(ecounters_eventmsgs_ext_t, mask[0])
15463 OFFSETOF(ecounters_trigger_config_t, type[0])
15483 ECOUNTERS_TRIGGER_REASON_TIMER = 0,
15503 #define WL_LQM_CURRENT_BSS_VALID 0x1
15504 #define WL_LQM_TARGET_BSS_VALID 0x2
15537 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */
15538 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */
15595 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */
15596 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */
15719 #define ECOUNTERS_STATS_TYPES_FLAG_SLICE 0x1
15720 #define ECOUNTERS_STATS_TYPES_FLAG_IFACE 0x2
15721 #define ECOUNTERS_STATS_TYPES_FLAG_GLOBAL 0x4
15722 #define ECOUNTERS_STATS_TYPES_DEFAULT 0x8
15725 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE0 0x1
15726 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE1 0x2
15753 #define EVENT_ECOUNTERS_FLAGS_ADD (1 << 0) /* Add configuration for the event_id if set */
15765 * 0 - D2H and 1 - H2D
15793 #define DCTL_FLAGS_DISABLED 0 /**< default value: all features disabled */
15794 #define DCTL_FLAGS_DYNCTL (1 << 0) /**< 1 - enabled, 0 - legacy only */
15803 #define IS_DYNCTL_ON(prof) ((prof->flags & DCTL_FLAGS_DYNCTL) != 0)
15804 #define IS_DESENSE_ON(prof) ((prof->flags & DCTL_FLAGS_DESENSE) != 0)
15805 #define IS_MSWITCH_ON(prof) ((prof->flags & DCTL_FLAGS_MSWITCH) != 0)
15806 #define IS_PWRCTRL_ON(prof) ((prof->flags & DCTL_FLAGS_PWRCTRL) != 0)
15808 #define DESENSE_OFF 0
15826 #define DCTL_PROFILE_VER 0x01
15830 /* dynctl profile flags bit:0 - dynctl On, bit:1 dsns On, bit:2 mode sw On, */
15962 SVMP_SAMPCOL_TRIGGER_PKTPROC_TRANSITION = 0,
15968 SVMP_SAMPCOL_PHY1MUX_GPIOOUT = 0,
15983 SVMP_SAMPCOL_SAMPLERATE_1XBW = 0,
15988 SVMP_SAMPCOL_PACK_DUALCAP = 0,
15995 SVMP_SAMPCOL_PKTPROC_RESET = 0,
16051 #define WL_MU_GROUP_METHOD_MIN 0
16055 #define WL_MU_GROUP_METHOD_OLD 0
16056 #define WL_MU_GROUP_MODE_AUTO 0
16102 #define WL_MUPKTENG_PER_TX_START 0x10
16103 #define WL_MUPKTENG_PER_TX_STOP 0x20
16108 #define WL_MU_POLICY_DISABLED 0
16128 NAN_BAND_B = 0,
16131 NAN_BAND_INVALID = 0xFF
16137 ULB_MODE_DISABLED = 0,
16150 ULB_BW_DISABLED = 0,
16217 #define FBT_PARAM_CURRENT_VERSION 0
16230 #define WL_FBT_PARAM_TYPE_RSNIE 0
16231 #define WL_FBT_PARAM_TYPE_FTIE 0x1
16232 #define WL_FBT_PARAM_TYPE_SNONCE 0x2
16233 #define WL_FBT_PARAM_TYPE_MDE 0x3
16234 #define WL_FBT_PARAM_TYPE_PMK_R0_NAME 0x4
16235 #define WL_FBT_PARAM_TYPE_R0_KHID 0x5
16236 #define WL_FBT_PARAM_TYPE_R1_KHID 0x6
16237 #define WL_FBT_PARAM_TYPE_FIRST_INVALID 0x7
16240 #define WL_ASSOC_MGR_CURRENT_VERSION 0x0
16252 #define WL_ASSOC_MGR_CMD_PAUSE_ON_EVT 0 /* have assoc pause on certain events */
16255 #define WL_ASSOC_MGR_PARAMS_EVENT_NONE 0 /* use this to resume as well as clear */
16311 WL_MFP_NONE = 0,
16317 CHANSW_UNKNOWN = 0, /* channel switch due to unknown reason */
16363 #define ND_RA_OL_LIMITS_REL_TYPE 0 /* relative, percent of RA lifetime */
16399 * a Bit Mask. As of now only Bit 0 is used as mentioned below.
16402 /* Bit-0 in flags is used to indicate if the cores can operate synchronously
16404 * 0 - device can operate only in rsdb mode (eg: 4364)
16409 #define SYNCHRONOUS_OPERATION_TRUE (1 << 0)
16437 #define ALLOW_SIB_PARALLEL_SCAN (1 << 0)
16469 WL_RSDB_CMD_VER = 0,
16476 #define WL_RSDB_IOV_VERSION 0x1
16509 WL_SLOTTED_BSS_CMD_VER = 0,
16521 NO_SDB_SCHED = 0x1,
16522 SDB_TDM_SCHED = 0x2,
16523 SDB_SPLIT_BAND_SCHED = 0x4, /* default mode for 4357 */
16524 MAIN_ONLY = 0x8,
16525 AUX_ONLY = 0x10,
16553 uint8 slice_index; /* 0(Main) or 1 (Aux) */
16561 #define SLOTTED_BSS_AGGR_EN (1 << 0) /* Bitmap of mode */
16617 #define NAP_DISABLED_HOST 0x0001 /* Host has disabled through nap_enable */
16618 #define NAP_DISABLED_RSSI 0x0002 /* Disabled because of nap_rssi_threshold */
16619 #define NAP_DISABLED_SCAN 0x0004 /* Disabled because of scan */
16620 #define NAP_DISABLED_ASSOC 0x0008 /* Disabled because of association */
16621 #define NAP_DISABLED_LTE 0x0010 /* Disabled because of LTE */
16622 #define NAP_DISABLED_ACI 0x0020 /* Disabled because of ACI mitigation */
16625 #define NAP_HWCFG 0x01 /* State of NAP config bit in phy HW */
16626 #define NAP_NOCLK 0x80 /* No clock to read HW (e.g. core down) */
16632 #define NATOE_FLAGS_ENAB_MASK 0x1
16633 #define NATOE_FLAGS_ACTIVE_MASK 0x2
16634 #define NATOE_FLAGS_PUBNW_MASK 0x4
16635 #define NATOE_FLAGS_PVTNW_MASK 0x8
16636 #define NATOE_FLAGS_ENAB_SHFT_MASK 0
16799 WL_NATOE_CMD_MOD_VER = 0,
16812 WL_NATOE_XTLV_MOD_VER = 0,
16835 WL_IDAUTH_XTLV_AUTH_ENAB = 0x1,
16836 WL_IDAUTH_XTLV_GTK_ROTATION = 0x2,
16837 WL_IDAUTH_XTLV_EAPOL_COUNT = 0x3,
16838 WL_IDAUTH_XTLV_EAPOL_INTRVL = 0x4,
16839 WL_IDAUTH_XTLV_BLKLIST_COUNT = 0x5,
16840 WL_IDAUTH_XTLV_BLKLIST_AGE = 0x6,
16841 WL_IDAUTH_XTLV_PEERS_INFO = 0x7,
16842 WL_IDAUTH_XTLV_COUNTERS = 0x8
16845 WL_AUTH_PEER_STATE_AUTHORISED = 0x01,
16846 WL_AUTH_PEER_STATE_BLACKLISTED = 0x02,
16847 WL_AUTH_PEER_STATE_4WAY_HS_ONGOING = 0x03,
16863 #define WLC_UTRACE_READ_END 0
16879 #define WLC_REGVAL_READ_END 0
16885 #define WLC_REGVAL_DUMP_PHYREG 0
16904 * Number starts at 0x8000 to be out of the way for category specific IDs.
16907 WL_HC_XTLV_ID_ERR = 0x8000, /* for sub-command err return */
16908 WL_HC_XTLV_ID_IDLIST = 0x8001, /* container for uint16 IDs */
16942 PHY_HC_DD_ALL = 0,
16951 PHY_HC_DD_TEMP_FAIL = 0,
16960 WL_HC_DD_PCIE = 0, /* PCIe */
17007 WL_HE_CMD_ENAB = 0,
17041 WL_TWT_CMD_ENAB = 0,
17061 WL_HEB_CMD_ENAB = 0,
17128 uint8 flow_id; /* must be between 0 and 7. Set 0xFF for auto assignment */
17138 uint8 bid; /* must be between 0 and 31. Set 0xFF for auto assignment */
17149 #define WL_TWT_FLOW_FLAG_UNANNOUNCED (1u << 0u)
17160 #define WL_TWT_FLOW_FLAG_BROADCAST (1 << 0)
17167 #define WL_TWT_FLOW_FLAG_PROTECT (1u << 0u)
17172 #define WL_TWT_FLOW_ID_FID 0x07u /* flow id */
17173 #define WL_TWT_FLOW_ID_GID_MASK 0x70u /* group id - broadcast TWT only */
17176 #define WL_TWT_INV_BCAST_ID 0xFFu
17177 #define WL_TWT_INV_FLOW_ID 0xFFu
17180 #define WL_TWT_SETUP_FLOW_ID_AUTO 0xFFu
17182 #define WL_TWT_SETUP_BCAST_ID_AUTO 0xFFu
17184 #define WL_TWT_INFINITE_BTWT_PERSIST 0xFFFFFFFFu
17191 #define WL_TWT_TIME_TYPE_BSS 0u /* The time specified in wake_time_h/l is
17199 #define WL_TWT_SETUP_VER 0u
17207 struct ether_addr peer; /* leave it all 0s' for AP */
17218 #define WL_TWT_DIALOG_TOKEN_AUTO 0xFFFF
17220 #define WL_TWT_TEARDOWN_VER 0u
17225 uint8 flow_id; /* must be between 0 and 7 */
17226 uint8 bid; /* must be between 0 and 31 */
17227 uint8 alltwt; /* all twt teardown - 0 or 1 */
17236 struct ether_addr peer; /* leave it all 0s' for AP */
17259 #define WL_TWT_INFO_FLAG_ALL_TWT (1u << 0u) /* All TWT */
17260 #define WL_TWT_INFO_FLAG_RESUME (1u << 1u) /* 1 is TWT Resume, 0 is TWT Suspend */
17263 #define WL_TWT_INFO_FLAG_RESP_REQ (1 << 0) /* Response Requested */
17268 #define WL_TWT_INFO_VER 0u
17276 struct ether_addr peer; /* leave it all 0s' for AP */
17314 #define WL_TWT_STATS_CMD_FLAGS_RESET (1u << 0u)
17328 #define WL_TWT_RESP_CFG_VER 0u
17330 #define WL_TWT_CMD_RESP_CFG_TYPE_ALTERNATE 0u
17357 /* Input. 0-based antenna index */
17372 #define WLC_CLM_POWER_LIMITS_INPUT_FLAG_NO_SAR 0x00000001
17374 #define WLC_CLM_POWER_LIMITS_INPUT_FLAG_NO_BOARD 0x00000002
17376 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_PRODUCT_LIMITS 0x00000001
17378 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_WORLDWIDE_LIMITS 0x00000002
17380 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_DEFAULT_COUNTRY_LIMITS 0x00000004
17414 WL_MBO_XTLV_OPCLASS = 0x1,
17415 WL_MBO_XTLV_CHAN = 0x2,
17416 WL_MBO_XTLV_PREFERENCE = 0x3,
17417 WL_MBO_XTLV_REASON_CODE = 0x4,
17418 WL_MBO_XTLV_CELL_DATA_CAP = 0x5,
17419 WL_MBO_XTLV_COUNTERS = 0x6,
17420 WL_MBO_XTLV_ENABLE = 0x7,
17421 WL_MBO_XTLV_SUB_ELEM_TYPE = 0x8,
17422 WL_MBO_XTLV_BTQ_TRIG_START_OFFSET = 0x9,
17423 WL_MBO_XTLV_BTQ_TRIG_RSSI_DELTA = 0xa,
17424 WL_MBO_XTLV_ANQP_CELL_SUPP = 0xb,
17425 WL_MBO_XTLV_BIT_MASK = 0xc,
17426 WL_MBO_XTLV_ASSOC_DISALLOWED = 0xd
17430 #define MBO_EVT_BIT_MASK_CELLULAR_SWITCH 0x0001 /* Evt bit mask to enab cellular switch */
17431 #define MBO_EVT_BIT_MASK_BTM_REQ_RCVD 0x0002 /* Evt bit mask to enab BTM req rcvd */
17434 #define WL_MBO_ASSOC_DISALLOWED_MASK 0xff00
17436 #define WL_MBO_ASSOC_DISALLOWED_RC_MASK 0xff
17504 WL_FILS_XTLV_IND_IE = 0x1,
17505 WL_FILS_XTLV_AUTH_DATA = 0x2, /* Deprecated, kept to prevent ROM invalidation */
17506 WL_FILS_XTLV_HLP_IE = 0x3,
17507 WL_FILS_XTLV_ERP_USERNAME = 0x4,
17508 WL_FILS_XTLV_ERP_REALM = 0x5,
17509 WL_FILS_XTLV_ERP_RRK = 0x6,
17510 WL_FILS_XTLV_ERP_NEXT_SEQ_NUM = 0x7,
17511 WL_FILS_XTLV_KEK = 0x8,
17512 WL_FILS_XTLV_PMK = 0x9,
17513 WL_FILS_XTLV_TK = 0xa,
17514 WL_FILS_XTLV_PMKID = 0xb
17536 WL_OCE_XTLV_ENABLE = 0x1,
17537 WL_OCE_XTLV_PROBE_DEF_TIME = 0x2,
17538 WL_OCE_XTLV_FD_TX_PERIOD = 0x3,
17539 WL_OCE_XTLV_FD_TX_DURATION = 0x4,
17540 WL_OCE_XTLV_RSSI_TH = 0x5,
17541 WL_OCE_XTLV_RWAN_LINKS = 0x6,
17542 WL_OCE_XTLV_CU_TRIGGER = 0x7
17559 WL_ESP_XTLV_ENABLE = 0x1,
17560 WL_ESP_XTLV_STATIC_AC = 0x2, /* access category */
17561 WL_ESP_XTLV_STATIC_TYPE = 0x3, /* data type */
17562 WL_ESP_XTLV_STATIC_VAL = 0x4
17580 uint32 cmdtype; /* command type : 0 : read row data, 1 : ECC lock */
17588 #define WL_OTPECC_ROWS_CMD_READ 0
17591 #define WL_OTPECC_ARGIDX_CMDTYPE 0 /* command type */
17601 #define OTP_ECC_ENAB_MASK 0x7
17603 #define OTP_ECC_CORR_ST_MASK 0x1
17605 #define OTP_ECC_DBL_ERR_MASK 0x1
17607 #define OTP_ECC_DED_ST_MASK 0x1
17609 #define OTP_ECC_SEC_ST_MASK 0x1
17610 #define OTP_ECC_DATA_SHIFT 0
17611 #define OTP_ECC_DATA_MASK 0x7f
17615 #define OTP_NO_ECC_MODE 0
17625 #define WL_LEAKY_AP_STATS_GT_TYPE 0
17649 #define WL_LEAKED_GUARD_TIME_NONE 0 /* Not in any guard time */
17650 #define WL_LEAKED_GUARD_TIME_FRTS (0x01 << 0) /* Normal FRTS power save */
17651 #define WL_LEAKED_GUARD_TIME_SCAN (0x01 << 1) /* Channel switch due to scanning */
17652 #define WL_LEAKED_GUARD_TIME_AWDL_PSF (0x01 << 2) /* Channel switch due to AWDL PSF */
17653 #define WL_LEAKED_GUARD_TIME_AWDL_AW (0x01 << 3) /* Channel switch due to AWDL AW */
17654 #define WL_LEAKED_GUARD_TIME_INFRA_STA (0x01 << 4) /* generic type infra sta channel switch */
17655 #define WL_LEAKED_GUARD_TIME_TERMINATED (0x01 << 7) /* indicate a GT is terminated early */
17671 #define WAKE_TIMER_NOLIMIT 0xFFFF
17677 * 0-disable, 0xffff-indefinite, num_events otherwise
17733 #define SSSR_REG_INFO_VER 0
17874 #define WL_ADPS_IOV_MINOR_VER 0
17880 #define ADPS_RX 0
17883 #define WL_ADPS_IOV_MODE 0x0001
17884 #define WL_ADPS_IOV_RSSI 0x0002
17885 #define WL_ADPS_IOV_DUMP 0x0003
17886 #define WL_ADPS_IOV_DUMP_CLEAR 0x0004
17887 #define WL_ADPS_IOV_SUSPEND 0x0005
17890 #define ADPS_SUMMARY_STEP_LOW 0
17897 #define ADPS_RESUME 0u
17904 uint8 mode; /* operation mode, default = 0 (ADPS disable) */
17949 uint8 suspend; /* 1: suspend 0: resume */
17960 #define WLC_BTC_2GCHAIN_DIS_REASSOC 0x1
17961 #define WLC_BTC_2GCHAIN_DIS_VER1 0x1
17979 uint32 timeout; /* maximum timeout in ms (0: default) */
17983 #define WL_BTC_WIFI_PROT__DISABLE 0
18060 WL_IFSTATS_XTLV_WL_STA_INFO_ECOUNTERS = 0x100,
18066 WL_IFSTATS_XTLV_TX_AMPDU_STATS = 0x101,
18067 WL_IFSTATS_XTLV_RX_AMPDU_STATS = 0x102,
18069 WL_IFSTATS_XTLV_SCB_ECOUNTERS = 0x103,
18071 WL_IFSTATS_XTLV_NAN_STATS = 0x104,
18077 WL_IFSTATS_XTLV_WL_SLICE = 0x301,
18079 WL_IFSTATS_XTLV_WL_SLICE_TX_AMPDU_DUMP = 0x302,
18080 WL_IFSTATS_XTLV_WL_SLICE_RX_AMPDU_DUMP = 0x303,
18082 WL_IFSTATS_XTLV_WL_SLICE_BTCOEX = 0x304,
18084 WL_IFSTATS_XTLV_WL_SLICE_V11_WLCNTRS = 0x305,
18086 WL_IFSTATS_XTLV_WL_SLICE_V30_WLCNTRS = 0x306,
18088 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_PHY = 0x307,
18089 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_SCAN = 0x308,
18090 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_WAKE_V2 = 0x309,
18092 WL_IFSTATS_XTLV_WL_SLICE_LTECOEX = 0x30A,
18094 WL_IFSTATS_XTLV_WL_SLICE_TVPM = 0x30B,
18096 WL_IFSTATS_XTLV_WL_SLICE_TDMTX = 0x30C,
18098 WL_SLICESTATS_XTLV_PERIODIC_STATE = 0x30D,
18100 WL_IFSTATS_XTLV_WL_SLICE_BTCOEX_TSKDUR_STATS = 0x30E,
18103 WL_IFSTATS_XTLV_IF = 0x501,
18105 WL_IFSTATS_XTLV_GENERIC = 0x502,
18107 WL_IFSTATS_XTLV_INFRA_SPECIFIC = 0x503,
18109 WL_IFSTATS_XTLV_MGT_CNT = 0x504,
18111 WL_IFSTATS_XTLV_AMPDU_DUMP = 0x505,
18112 WL_IFSTATS_XTLV_IF_SPECIFIC = 0x506,
18113 WL_IFSTATS_XTLV_WL_PWRSTATS_AWDL = 0x507,
18114 WL_IFSTATS_XTLV_IF_LQM = 0x508,
18116 WL_IFSTATS_XTLV_IF_PERIODIC_STATE = 0x509,
18118 WL_IFSTATS_XTLV_IF_EVENT_STATS = 0x50A,
18121 WL_IFSTATS_XTLV_NAN_SLOT_STATS = 0x601
18244 #define CSA_EVT_CSA_RXED (1 << 0)
18258 WL_BCN_RPT_CMD_VER = 0,
18265 #define WL_BCN_RPT_CCX_IE_OVERRIDE (1u << 0)
18281 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_MAX (0xFFFFFFFF)
18284 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MIN (0)
18316 WL_TVPM_REQ_ENABLE, /* req_value: uint32, range 0...1 */
18327 int16 tx_power_backoff; /* 0...-6 */
18339 int16 tx_power_backoff; /* 0...-6 */
18485 #define WL_BTL_SUBCMD_ENABLE 0 /* enable/disable logging */
18490 uint8 enable; /* 1 - enable, 0 - disable */
18606 WL_RMC_RPT_CMD_VER = 0,
18612 WL_RMC_RPT_XTLV_VER = 0x0,
18613 WL_RMC_RPT_XTLV_BSS_INFO = 0x1,
18614 WL_RMC_RPT_XTLV_CANDIDATE_INFO = 0x2
18637 WL_FILTER_IE_CLEAR = 0, /* allow element id in packet.For suboption */
18662 #define EVENT_AGGR_DISABLED 0x0
18663 #define EVENT_AGGR_ENABLED 0x1
18674 uint16 flags; /* bit 0 to enable/disable the feature */
18801 #define ROAMSTATS_UNKNOWN_CNT 0xFFFFu
18812 WL_ROAMSTATS_XTLV_CMD_VER = 0,
18819 WL_ROAMSTATS_XTLV_VER = 0x0,
18820 WL_ROAMSTATS_XTLV_COUNTER_INFO = 0x1,
18821 WL_ROAMSTATS_XTLV_PREV_ROAM_EVENTS = 0x2,
18822 WL_ROAMSTATS_XTLV_REASON_INFO = 0x3
18857 * 8 LSB bits are reserved for: WARN (0), ERROR (1), and other levels
18860 #define HEALTH_CHECK_STATUS_OK 0
18862 #define HEALTH_CHECK_STATUS_WARN 0x1
18863 #define HEALTH_CHECK_STATUS_ERROR 0x2
18864 #define HEALTH_CHECK_STATUS_TRAP 0x4
18865 #define HEALTH_CHECK_STATUS_NOEVENT 0x8
18868 #define HEALTH_CHECK_STATUS_INFO_LOG_BUF 0x80
18869 #define HEALTH_CHECK_STATUS_MASK (0xFF)
18882 #define WL_RXSIG_IOV_GET_MINOR(x) (x & 0xFF)
18885 WL_RXSIG_MODE_DB = 0x0,
18886 WL_RXSIG_MODE_QDB = 0x1,
18892 WL_RXSIG_CMD_RSSI = 0x1, /**< combined rssi moving avg */
18893 WL_RXSIG_CMD_SNR = 0x2, /**< combined snr moving avg */
18894 WL_RXSIG_CMD_RSSIANT = 0x3, /**< rssi moving avg per-ant */
18895 WL_RXSIG_CMD_SNRANT = 0x4, /**< snr moving avg per-snr */
18896 WL_RXSIG_CMD_SMPLWIN = 0x5, /**< config for sampling window size */
18897 WL_RXSIG_CMD_SMPLGRP = 0x7, /**< config for grouping of pkt type */
18898 WL_RXSIG_CMD_STA_MA = 0x8,
18899 WL_RXSIG_CMD_MAMODE = 0x9,
18900 WL_RXSIG_CMD_MADIV = 0xa,
18901 WL_RXSIG_CMD_DUMP = 0xb,
18902 WL_RXSIG_CMD_DUMPWIN = 0xc,
18969 #define WL_CLM_TXBF 0x01 /**< Flag for Tx beam forming */
18970 #define WL_CLM_RED_EU 0x02 /* Flag for EU RED */
18971 #define WL_CLM_EDCRS_EU 0x04 /**< Use EU post-2015 energy detect */
18972 #define WL_CLM_DFS_TPC 0x08 /**< Flag for DFS TPC */
18973 #define WL_CLM_RADAR_TYPE_EU 0x10 /**< Flag for EU */
18979 WL_SC_CMD_DBG = 0,
19012 uint8 type; /* should be 0x7f */
19014 uint8 subtype; /* 221, 0xdd: proprietary ie */
19021 #define NSC_SUBTYPES_EOL 0xff
19024 #define WL_ALOE_AF_TYPE (0x7)
19025 #define WL_ALOE_CMD_PERIODIC (0x01)
19026 #define WL_ALOE_CMD_ONESHOT (0x02)
19073 /** Vendor specific: 0x7f */
19124 #define BCAST_ADDR_OCTET 0xff
19133 #define HE_TRIG_NON_HT_PPDU 0
19145 BW_20MHz = 0,
19153 MCS_0 = 0,
19175 NUM_HE_LTF_SYM0 = 0,
19185 STBC_DIS = 0, /* Disabled */
19191 PE0 = 0,
19198 DCM_DIS = 0, /* Disabled */
19203 TRIG_TX_DIS = 0, /* Fake trigger frame TX */
19209 CODING_BCC = 0, /* BCC Coding */
19215 MUMIMO_LTF_0 = 0, /* HE single stream pilot HE-LTF mode */