Lines Matching refs:BITFIELD_MASK
34 #define SPI_START_M BITFIELD_MASK(1) /* Bit [31] - Start Bit */
36 #define SPI_DIR_M BITFIELD_MASK(1) /* Bit [30] - Direction */
38 #define SPI_CMD_INDEX_M BITFIELD_MASK(6) /* Bits [29:24] - Command number */
40 #define SPI_RW_M BITFIELD_MASK(1) /* Bit [23] - Read=0, Write=1 */
42 #define SPI_FUNC_M BITFIELD_MASK(3) /* Bits [22:20] - Function Number */
44 #define SPI_RAW_M BITFIELD_MASK(1) /* Bit [19] - Read After Wr */
46 #define SPI_STUFF_M BITFIELD_MASK(1) /* Bit [18] - Stuff bit */
48 #define SPI_BLKMODE_M BITFIELD_MASK(1) /* Bit [19] - Blockmode 1=blk */
50 #define SPI_OPCODE_M BITFIELD_MASK(1) /* Bit [18] - OP Code */
52 #define SPI_ADDR_M BITFIELD_MASK(17) /* Bits [17:1] - Address */
54 #define SPI_STUFF0_M BITFIELD_MASK(1) /* Bit [0] - Stuff bit */
57 #define SPI_RSP_START_M BITFIELD_MASK(1) /* Bit [7] - Start Bit (always 0) */
59 #define SPI_RSP_PARAM_ERR_M BITFIELD_MASK(1) /* Bit [6] - Parameter Error */
61 #define SPI_RSP_RFU5_M BITFIELD_MASK(1) /* Bit [5] - RFU (Always 0) */
63 #define SPI_RSP_FUNC_ERR_M BITFIELD_MASK(1) /* Bit [4] - Function number error */
65 #define SPI_RSP_CRC_ERR_M BITFIELD_MASK(1) /* Bit [3] - COM CRC Error */
67 #define SPI_RSP_ILL_CMD_M BITFIELD_MASK(1) /* Bit [2] - Illegal Command error */
69 #define SPI_RSP_RFU1_M BITFIELD_MASK(1) /* Bit [1] - RFU (Always 0) */
71 #define SPI_RSP_IDLE_M BITFIELD_MASK(1) /* Bit [0] - In idle state */