Lines Matching full:transmit
38 * basic DMA register set is per channel(transmit or receive)
80 /* transmit channel control */
81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */
82 #define XC_SE ((uint32)1 << 1) /**< transmit suspend request */
134 /* transmit descriptor table pointer */
137 /* transmit channel status */
139 #define XS_XS_MASK 0xf000 /**< transmit state */
146 #define XS_XE_MASK 0xf0000 /**< transmit errors */
199 #define FA_SEL_XDD 0x00000 /**< transmit dma data */
200 #define FA_SEL_XDP 0x10000 /**< transmit dma pointers */
203 #define FA_SEL_XFD 0x80000 /**< transmit fifo data */
204 #define FA_SEL_XFP 0x90000 /**< transmit fifo pointers */
290 /* transmit channel control */
291 #define D64_XC_XE 0x00000001 /**< transmit enable */
292 #define D64_XC_SE 0x00000002 /**< transmit suspend request */
311 /* transmit descriptor table pointer */
314 /* transmit channel status */
316 #define D64_XS0_XS_MASK 0xf0000000 /**< transmit state */
325 #define D64_XS1_XE_MASK 0xf0000000 /**< transmit errors */
406 #define D64_FA_SEL_XDD 0x00000 /**< transmit dma data */
407 #define D64_FA_SEL_XDP 0x10000 /**< transmit dma pointers */
410 #define D64_FA_SEL_XFD 0x80000 /**< transmit fifo data */
411 #define D64_FA_SEL_XFP 0x90000 /**< transmit fifo pointers */