Lines Matching refs:uint16
59 uint16 len; /* Length of data excluding this header */
153 uint16 xtag;
154 uint16 version; /* version of the information following this */
161 uint16 i16_0x1a8; /* gated clock en */
162 uint16 i16_0x406; /* Rcv Fifo Ctrl */
163 uint16 i16_0x408; /* Rx ctrl 1 */
164 uint16 i16_0x41a; /* Rxe Status 1 */
165 uint16 i16_0x41c; /* Rxe Status 2 */
166 uint16 i16_0x424; /* rcv wrd count 0 */
167 uint16 i16_0x426; /* rcv wrd count 1 */
168 uint16 i16_0x456; /* RCV_LFIFO_STS */
169 uint16 i16_0x480; /* PSM_SLP_TMR */
170 uint16 i16_0x490; /* PSM BRC */
171 uint16 i16_0x500; /* TXE CTRL */
172 uint16 i16_0x50e; /* TXE Status */
173 uint16 i16_0x55e; /* TXE_xmtdmabusy */
174 uint16 i16_0x566; /* TXE_XMTfifosuspflush */
175 uint16 i16_0x690; /* IFS Stat */
176 uint16 i16_0x692; /* IFS_MEDBUSY_CTR */
177 uint16 i16_0x694; /* IFS_TX_DUR */
178 uint16 i16_0x6a0; /* SLow_CTL */
179 uint16 i16_0x838; /* TXE_AQM fifo Ready */
180 uint16 i16_0x8c0; /* Dagg ctrl */
181 uint16 shm_prewds_cnt;
182 uint16 shm_txtplufl_cnt;
183 uint16 shm_txphyerr_cnt;
184 uint16 pad;
188 uint16 xtag;
189 uint16 version; /* version of the information following this */
196 uint16 i16_0x4b8; /* psm_brwk_0 */
197 uint16 i16_0x4ba; /* psm_brwk_1 */
198 uint16 i16_0x4bc; /* psm_brwk_2 */
199 uint16 i16_0x4be; /* psm_brwk_2 */
200 uint16 i16_0x1a8; /* gated clock en */
201 uint16 i16_0x406; /* Rcv Fifo Ctrl */
202 uint16 i16_0x408; /* Rx ctrl 1 */
203 uint16 i16_0x41a; /* Rxe Status 1 */
204 uint16 i16_0x41c; /* Rxe Status 2 */
205 uint16 i16_0x424; /* rcv wrd count 0 */
206 uint16 i16_0x426; /* rcv wrd count 1 */
207 uint16 i16_0x456; /* RCV_LFIFO_STS */
208 uint16 i16_0x480; /* PSM_SLP_TMR */
209 uint16 i16_0x500; /* TXE CTRL */
210 uint16 i16_0x50e; /* TXE Status */
211 uint16 i16_0x55e; /* TXE_xmtdmabusy */
212 uint16 i16_0x566; /* TXE_XMTfifosuspflush */
213 uint16 i16_0x690; /* IFS Stat */
214 uint16 i16_0x692; /* IFS_MEDBUSY_CTR */
215 uint16 i16_0x694; /* IFS_TX_DUR */
216 uint16 i16_0x6a0; /* SLow_CTL */
217 uint16 i16_0x490; /* psm_brc */
218 uint16 i16_0x4da; /* psm_brc_1 */
219 uint16 i16_0x838; /* TXE_AQM fifo Ready */
220 uint16 i16_0x8c0; /* Dagg ctrl */
221 uint16 shm_prewds_cnt;
222 uint16 shm_txtplufl_cnt;
223 uint16 shm_txphyerr_cnt;
246 uint16 heap_histogm[HEAP_HISTOGRAM_DUMP_LEN * 2]; /* size/number */
247 uint16 max_sz_free_blk[HEAP_MAX_SZ_BLKS_LEN];
258 uint16 txqueue_len[MEM_TRAP_NUM_WLC_TX_QUEUES];
262 uint16 version;
263 uint16 pad;
268 uint16 txqueue_len[MEM_TRAP_NUM_WLC_TX_QUEUES];
280 uint16 txqueue_len[MEM_TRAP_NUM_WLC_TX_QUEUES];
284 uint16 d2h_queue_len;
285 uint16 d2h_req_queue_len;
307 uint16 index; /* Index of the DMA channel in system */
311 uint16 din; /* rxin / txin */
312 uint16 dout; /* rxout / txout */
319 uint16 length; /* length of whole structure */
331 uint16 xtag;
339 uint16 i16_0x41a; /* Rxe Status 1 */
340 uint16 i16_0x41c; /* Rxe Status 2 */
341 uint16 i16_0x490; /* PSM BRC */
342 uint16 i16_0x50e; /* TXE Status */
343 uint16 i16_0x55e; /* TXE_xmtdmabusy */
344 uint16 i16_0x566; /* TXE_XMTfifosuspflush */
345 uint16 i16_0x690; /* IFS Stat */
346 uint16 i16_0x692; /* IFS_MEDBUSY_CTR */
347 uint16 i16_0x694; /* IFS_TX_DUR */
348 uint16 i16_0x7c0; /* WEP CTL */
349 uint16 i16_0x838; /* TXE_AQM fifo Ready */
350 uint16 i16_0x880; /* MHP_status */
351 uint16 shm_prewds_cnt;
352 uint16 shm_ucode_dbgst;
357 uint16 xtag;
366 uint16 i16_0x1a8; /* gated clock en */
367 uint16 i16_0x480; /* PSM_SLP_TMR */
368 uint16 i16_0x490; /* PSM BRC */
369 uint16 i16_0x600; /* TSF CTL */
370 uint16 i16_0x690; /* IFS Stat */
371 uint16 i16_0x692; /* IFS_MEDBUSY_CTR */
372 uint16 i16_0x6a0; /* SLow_CTL */
373 uint16 i16_0x6a6; /* SLow_FRAC */
374 uint16 i16_0x6a8; /* fast power up delay */
375 uint16 i16_0x6aa; /* SLow_PER */
376 uint16 shm_ucode_dbgst;
377 uint16 PAD;
382 uint16 err;
383 uint16 RxFeStatus;
384 uint16 TxFIFOStatus0;
385 uint16 TxFIFOStatus1;
386 uint16 RfseqMode;
387 uint16 RfseqStatus0;
388 uint16 RfseqStatus1;
389 uint16 RfseqStatus_Ocl;
390 uint16 RfseqStatus_Ocl1;
391 uint16 OCLControl1;
392 uint16 TxError;
393 uint16 bphyTxError;
394 uint16 TxCCKError;
395 uint16 TxCtrlWrd0;
396 uint16 TxCtrlWrd1;
397 uint16 TxCtrlWrd2;
398 uint16 TxLsig0;
399 uint16 TxLsig1;
400 uint16 TxVhtSigA10;
401 uint16 TxVhtSigA11;
402 uint16 TxVhtSigA20;
403 uint16 TxVhtSigA21;
404 uint16 txPktLength;
405 uint16 txPsdulengthCtr;
406 uint16 gpioClkControl;
407 uint16 gpioSel;
408 uint16 pktprocdebug;
409 uint16 PAD;
421 uint16 reg_offset;
422 uint16 core_mask;
429 uint16 err;
430 uint16 RxFeStatus;
431 uint16 TxFIFOStatus0;
432 uint16 TxFIFOStatus1;
433 uint16 RfseqMode;
434 uint16 RfseqStatus0;
435 uint16 RfseqStatus1;
436 uint16 RfseqStatus_Ocl;
437 uint16 RfseqStatus_Ocl1;
438 uint16 OCLControl1;
439 uint16 TxError;
440 uint16 bphyTxError;
441 uint16 TxCCKError;
442 uint16 TxCtrlWrd0;
443 uint16 TxCtrlWrd1;
444 uint16 TxCtrlWrd2;
445 uint16 TxLsig0;
446 uint16 TxLsig1;
447 uint16 TxVhtSigA10;
448 uint16 TxVhtSigA11;
449 uint16 TxVhtSigA20;
450 uint16 TxVhtSigA21;
451 uint16 txPktLength;
452 uint16 txPsdulengthCtr;
453 uint16 gpioClkControl;
454 uint16 gpioSel;
455 uint16 pktprocdebug;
464 uint16 err;
465 uint16 RxFeStatus;
466 uint16 TxFIFOStatus0;
467 uint16 TxFIFOStatus1;
468 uint16 RfseqMode;
469 uint16 RfseqStatus0;
470 uint16 RfseqStatus1;
471 uint16 RfseqStatus_Ocl;
472 uint16 RfseqStatus_Ocl1;
473 uint16 OCLControl1;
474 uint16 TxError;
475 uint16 bphyTxError;
476 uint16 TxCCKError;
477 uint16 TxCtrlWrd0;
478 uint16 TxCtrlWrd1;
479 uint16 TxCtrlWrd2;
480 uint16 TxLsig0;
481 uint16 TxLsig1;
482 uint16 TxVhtSigA10;
483 uint16 TxVhtSigA11;
484 uint16 TxVhtSigA20;
485 uint16 TxVhtSigA21;
486 uint16 txPktLength;
487 uint16 txPsdulengthCtr;
488 uint16 gpioClkControl;
489 uint16 gpioSel;
490 uint16 pktprocdebug;
492 uint16 HESigURateFlagStatus;
493 uint16 HESigUsRateFlagStatus;
503 uint16 i16_0x63E; /* tsf_tmr_rx_ts */
504 uint16 i16_0x640; /* tsf_tmr_tx_ts */
505 uint16 i16_0x642; /* tsf_tmr_rx_end_ts */
506 uint16 i16_0x846; /* TDC_FrmLen0 */
507 uint16 i16_0x848; /* TDC_FrmLen1 */
508 uint16 i16_0x84a; /* TDC_Txtime */
509 uint16 i16_0xa5a; /* TXE_BytCntInTxFrmLo */
510 uint16 i16_0xa5c; /* TXE_BytCntInTxFrmHi */
511 uint16 i16_0x856; /* TDC_VhtPsduLen0 */
512 uint16 i16_0x858; /* TDC_VhtPsduLen1 */
513 uint16 i16_0x490; /* psm_brc */
514 uint16 i16_0x4d8; /* psm_brc_1 */
515 uint16 shm_txerr_reason;
516 uint16 shm_pctl0;
517 uint16 shm_pctl1;
518 uint16 shm_pctl2;
519 uint16 shm_lsig0;
520 uint16 shm_lsig1;
521 uint16 shm_plcp0;
522 uint16 shm_plcp1;
523 uint16 shm_plcp2;
524 uint16 shm_vht_sigb0;
525 uint16 shm_vht_sigb1;
526 uint16 shm_tx_tst;
527 uint16 shm_txerr_tm;
528 uint16 shm_curchannel;
529 uint16 shm_crx_rxtsf_pos;
530 uint16 shm_lasttx_tsf;
531 uint16 shm_s_rxtsftmrval;
532 uint16 i16_0x29; /* Phy indirect address */
533 uint16 i16_0x2a; /* Phy indirect address */
539 uint16 i16_0x63E; /* tsf_tmr_rx_ts */
540 uint16 i16_0x640; /* tsf_tmr_tx_ts */
541 uint16 i16_0x642; /* tsf_tmr_rx_end_ts */
542 uint16 i16_0x846; /* TDC_FrmLen0 */
543 uint16 i16_0x848; /* TDC_FrmLen1 */
544 uint16 i16_0x84a; /* TDC_Txtime */
545 uint16 i16_0xa5a; /* TXE_BytCntInTxFrmLo */
546 uint16 i16_0xa5c; /* TXE_BytCntInTxFrmHi */
547 uint16 i16_0x856; /* TDC_VhtPsduLen0 */
548 uint16 i16_0x858; /* TDC_VhtPsduLen1 */
549 uint16 i16_0x490; /* psm_brc */
550 uint16 i16_0x4d8; /* psm_brc_1 */
551 uint16 shm_txerr_reason;
552 uint16 shm_pctl0;
553 uint16 shm_pctl1;
554 uint16 shm_pctl2;
555 uint16 shm_lsig0;
556 uint16 shm_lsig1;
557 uint16 shm_plcp0;
558 uint16 shm_plcp1;
559 uint16 shm_plcp2;
560 uint16 shm_vht_sigb0;
561 uint16 shm_vht_sigb1;
562 uint16 shm_tx_tst;
563 uint16 shm_txerr_tm;
564 uint16 shm_curchannel;
565 uint16 shm_crx_rxtsf_pos;
566 uint16 shm_lasttx_tsf;
567 uint16 shm_s_rxtsftmrval;
568 uint16 i16_0x29; /* Phy indirect address */
569 uint16 i16_0x2a; /* Phy indirect address */
572 uint16 pad;