infineon/include/bcmsdstd.h

117 struct sdioh_info {  struct
118 	uint cfg_bar;				/* pci cfg address for bar */
119 	uint32 caps;				/* cached value of capabilities reg */
120 	uint32 curr_caps;			/* max current capabilities reg */
122 	osl_t		*osh;			/* osh handler */
123 	volatile char	*mem_space;		/* pci device memory va */
124 	uint		lockcount;		/* nest count of sdstd_lock() calls */
125 	bool		client_intr_enabled;	/* interrupt connnected flag */
126 	bool		intr_handler_valid;	/* client driver interrupt handler valid */
127 	sdioh_cb_fn_t	intr_handler;		/* registered interrupt handler */
128 	void		*intr_handler_arg;	/* argument to call interrupt handler */
129 	bool		initialized;		/* card initialized */
130 	uint		target_dev;		/* Target device ID */
131 	uint16		intmask;		/* Current active interrupts */
132 	void		*sdos_info;		/* Pointer to per-OS private data */
133 	void		*bcmsdh;		/* handler to upper layer stack (bcmsdh) */
135 	uint32		controller_type;	/* Host controller type */
136 	uint8		version;		/* Host Controller Spec Compliance Version */
137 	uint		irq;			/* Client irq */
138 	int		intrcount;		/* Client interrupts */
139 	int		local_intrcount;	/* Controller interrupts */
140 	bool		host_init_done;		/* Controller initted */
141 	bool		card_init_done;		/* Client SDIO interface initted */
142 	bool		polled_mode;		/* polling for command completion */
144 	bool		sd_blockmode;		/* sd_blockmode == FALSE => 64 Byte Cmd 53s. */
146 	bool		use_client_ints;	/* If this is false, make sure to restore */
148 	int		adapter_slot;		/* Maybe dealing with multiple slots/controllers */
149 	int		sd_mode;		/* SD1/SD4/SPI */
150 	int		client_block_size[SDIOD_MAX_IOFUNCS];		/* Blocksize */
151 	uint32		data_xfer_count;	/* Current transfer */
152 	uint16		card_rca;		/* Current Address */
153 	int8		sd_dma_mode;		/* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */
154 	uint8		num_funcs;		/* Supported funcs on client */
155 	uint32		com_cis_ptr;
156 	uint32		func_cis_ptr[SDIOD_MAX_IOFUNCS];
157 	void		*dma_buf;		/* DMA Buffer virtual address */
158 	ulong		dma_phys;		/* DMA Buffer physical address */
159 	void		*adma2_dscr_buf;	/* ADMA2 Descriptor Buffer virtual address */
160 	ulong		adma2_dscr_phys;	/* ADMA2 Descriptor Buffer physical address */
163 	void		*dma_start_buf;
164 	ulong		dma_start_phys;
165 	uint		alloced_dma_size;
166 	void		*adma2_dscr_start_buf;
167 	ulong		adma2_dscr_start_phys;
168 	uint		alloced_adma2_dscr_size;
170 	int		r_cnt;			/* rx count */
171 	int		t_cnt;			/* tx_count */
172 	bool		got_hcint;		/* local interrupt flag */
173 	uint16		last_intrstatus;	/* to cache intrstatus */
174 	int	host_UHSISupported;		/* whether UHSI is supported for HC. */
175 	int	card_UHSI_voltage_Supported;	/* whether UHSI is supported for
178 	int	global_UHSI_Supp;	/* type of UHSI support in both host and card.
183 	volatile int	sd3_dat_state;		/* data transfer state used for retuning check */
184 	volatile int	sd3_tun_state;		/* tuning state used for retuning check */
185 	bool	sd3_tuning_reqd;	/* tuning requirement parameter */
186 	bool	sd3_tuning_disable;	/* tuning disable due to bus sleeping */
187 	uint32	caps3;			/* cached value of 32 MSbits capabilities reg (SDIO 3.0) */
189 	glom_buf_t glom_info;		/* pkt information used for glomming */
190 	uint	txglom_mode;		/* Txglom mode: 0 - copy, 1 - multi-descriptor */