Lines Matching refs:sih
103 si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength) in si_sdiod_drive_strength_init() argument
114 UNUSED_PARAMETER(sih); in si_sdiod_drive_strength_init()
120 si_switch_pmu_dependency(si_t *sih, uint mode) in si_switch_pmu_dependency() argument
123 osl_t *osh = si_osh(sih); in si_switch_pmu_dependency()
133 origidx = si_coreidx(sih); in si_switch_pmu_dependency()
134 if (AOB_ENAB(sih)) { in si_switch_pmu_dependency()
135 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_switch_pmu_dependency()
136 cc = si_setcore(sih, CC_CORE_ID, 0); in si_switch_pmu_dependency()
138 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_switch_pmu_dependency()
139 cc = si_setcoreidx(sih, SI_CC_IDX); in si_switch_pmu_dependency()
150 if (CHIPID(sih->chip) == BCM4364_CHIP_ID) { in si_switch_pmu_dependency()
175 if (CHIPID(sih->chip) == BCM4364_CHIP_ID) { in si_switch_pmu_dependency()
207 if (CHIPID(sih->chip) == BCM4364_CHIP_ID) { in si_switch_pmu_dependency()
238 si_pmu_resdeptbl_upd(sih, osh, pmu, pmu_res_depend_table, pmu_res_depend_table_sz); in si_switch_pmu_dependency()
241 si_pmu_wait_for_steady_state(sih, osh, pmu); in si_switch_pmu_dependency()
244 si_setcoreidx(sih, origidx); in si_switch_pmu_dependency()
251 si_pmu_ulp_register(si_t *sih) in si_pmu_ulp_register() argument
253 return ulp_p1_module_register(ULP_MODULE_ID_PMU, &ulp_pmu_ctx, (void *)sih); in si_pmu_ulp_register()
286 si_pmu_ulp_chipconfig(si_t *sih, osl_t *osh) in si_pmu_ulp_chipconfig() argument
292 if (CHIPID(sih->chip) == BCM43012_CHIP_ID) { in si_pmu_ulp_chipconfig()
294 si_pmu_chipcontrol(sih, PMU_CHIPCTL14, ~0x0, in si_pmu_ulp_chipconfig()
305 CHIPC_REG(sih, clk_ctl_st, CCS_SFLASH_CLKREQ | CCS_HQCLKREQ, CCS_HQCLKREQ); in si_pmu_ulp_chipconfig()
307 reg_val = PMU_REG(sih, min_res_mask, ~0x0, ULP_MIN_RES_MASK); in si_pmu_ulp_chipconfig()
311 si_pmu_chipcontrol(sih, PMU_CHIPCTL2, in si_pmu_ulp_chipconfig()
319 si_pmu_ulp_ilp_config(si_t *sih, osl_t *osh, uint32 ilp_period) in si_pmu_ulp_ilp_config() argument
322 pmu = si_setcoreidx(sih, si_findcoreidx(sih, PMU_CORE_ID, 0)); in si_pmu_ulp_ilp_config()
324 si_lhl_ilp_config(sih, osh, ilp_period); in si_pmu_ulp_ilp_config()
329 si_pmu_ds1_res_init(si_t *sih, osl_t *osh) in si_pmu_ds1_res_init() argument
337 origidx = si_coreidx(sih); in si_pmu_ds1_res_init()
338 if (AOB_ENAB(sih)) { in si_pmu_ds1_res_init()
339 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmu_ds1_res_init()
341 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmu_ds1_res_init()
345 switch (CHIPID(sih->chip)) { in si_pmu_ds1_res_init()
368 si_setcoreidx(sih, origidx); in si_pmu_ds1_res_init()
374 si_pmu_wake_bit_offset(si_t *sih) in si_pmu_wake_bit_offset() argument
378 switch (CHIPID(sih->chip)) { in si_pmu_wake_bit_offset()
391 void si_pmu_set_min_res_mask(si_t *sih, osl_t *osh, uint min_res_mask) in si_pmu_set_min_res_mask() argument
397 origidx = si_coreidx(sih); in si_pmu_set_min_res_mask()
398 if (AOB_ENAB(sih)) { in si_pmu_set_min_res_mask()
399 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmu_set_min_res_mask()
402 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmu_set_min_res_mask()
410 si_setcoreidx(sih, origidx); in si_pmu_set_min_res_mask()
414 si_pmu_cap_fast_lpo(si_t *sih) in si_pmu_cap_fast_lpo() argument
416 return (PMU_REG(sih, core_cap_ext, 0, 0) & PCAP_EXT_USE_MUXED_ILP_CLK_MASK) ? TRUE : FALSE; in si_pmu_cap_fast_lpo()
420 si_pmu_fast_lpo_disable(si_t *sih) in si_pmu_fast_lpo_disable() argument
422 if (!si_pmu_cap_fast_lpo(sih)) { in si_pmu_fast_lpo_disable()
427 PMU_REG(sih, pmucontrol_ext, in si_pmu_fast_lpo_disable()
479 si_pmustatstimer_int_enable(si_t *sih) in si_pmustatstimer_int_enable() argument
483 osl_t *osh = si_osh(sih); in si_pmustatstimer_int_enable()
486 origidx = si_coreidx(sih); in si_pmustatstimer_int_enable()
487 if (AOB_ENAB(sih)) { in si_pmustatstimer_int_enable()
488 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_int_enable()
490 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_int_enable()
497 si_setcoreidx(sih, origidx); in si_pmustatstimer_int_enable()
501 si_pmustatstimer_int_disable(si_t *sih) in si_pmustatstimer_int_disable() argument
505 osl_t *osh = si_osh(sih); in si_pmustatstimer_int_disable()
508 origidx = si_coreidx(sih); in si_pmustatstimer_int_disable()
509 if (AOB_ENAB(sih)) { in si_pmustatstimer_int_disable()
510 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_int_disable()
512 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_int_disable()
519 si_setcoreidx(sih, origidx); in si_pmustatstimer_int_disable()
523 si_pmustatstimer_init(si_t *sih) in si_pmustatstimer_init() argument
527 osl_t *osh = si_osh(sih); in si_pmustatstimer_init()
533 origidx = si_coreidx(sih); in si_pmustatstimer_init()
534 if (AOB_ENAB(sih)) { in si_pmustatstimer_init()
535 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_init()
537 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_init()
552 si_setcoreidx(sih, origidx); in si_pmustatstimer_init()
556 si_pmustatstimer_dump(si_t *sih) in si_pmustatstimer_dump() argument
560 osl_t *osh = si_osh(sih); in si_pmustatstimer_dump()
568 origidx = si_coreidx(sih); in si_pmustatstimer_dump()
569 if (AOB_ENAB(sih)) { in si_pmustatstimer_dump()
570 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_dump()
572 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_dump()
596 pmuintmask0, pmuintstatus, PMUREV(sih->pmurev))); in si_pmustatstimer_dump()
607 si_setcoreidx(sih, origidx); in si_pmustatstimer_dump()
611 si_pmustatstimer_start(si_t *sih, uint8 timerid) in si_pmustatstimer_start() argument
615 osl_t *osh = si_osh(sih); in si_pmustatstimer_start()
618 origidx = si_coreidx(sih); in si_pmustatstimer_start()
619 if (AOB_ENAB(sih)) { in si_pmustatstimer_start()
620 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_start()
622 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_start()
632 si_setcoreidx(sih, origidx); in si_pmustatstimer_start()
636 si_pmustatstimer_stop(si_t *sih, uint8 timerid) in si_pmustatstimer_stop() argument
640 osl_t *osh = si_osh(sih); in si_pmustatstimer_stop()
643 origidx = si_coreidx(sih); in si_pmustatstimer_stop()
644 if (AOB_ENAB(sih)) { in si_pmustatstimer_stop()
645 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_stop()
647 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_stop()
657 si_setcoreidx(sih, origidx); in si_pmustatstimer_stop()
661 si_pmustatstimer_clear(si_t *sih, uint8 timerid) in si_pmustatstimer_clear() argument
665 osl_t *osh = si_osh(sih); in si_pmustatstimer_clear()
668 origidx = si_coreidx(sih); in si_pmustatstimer_clear()
669 if (AOB_ENAB(sih)) { in si_pmustatstimer_clear()
670 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_clear()
672 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_clear()
680 si_setcoreidx(sih, origidx); in si_pmustatstimer_clear()
684 si_pmustatstimer_clear_overflow(si_t *sih) in si_pmustatstimer_clear_overflow() argument
692 osl_t *osh = si_osh(sih); in si_pmustatstimer_clear_overflow()
695 origidx = si_coreidx(sih); in si_pmustatstimer_clear_overflow()
696 if (AOB_ENAB(sih)) { in si_pmustatstimer_clear_overflow()
697 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_clear_overflow()
699 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_clear_overflow()
711 si_pmustatstimer_clear(sih, i); in si_pmustatstimer_clear_overflow()
716 si_setcoreidx(sih, origidx); in si_pmustatstimer_clear_overflow()
720 si_pmustatstimer_read(si_t *sih, uint8 timerid) in si_pmustatstimer_read() argument
724 osl_t *osh = si_osh(sih); in si_pmustatstimer_read()
728 origidx = si_coreidx(sih); in si_pmustatstimer_read()
729 if (AOB_ENAB(sih)) { in si_pmustatstimer_read()
730 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_read()
732 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_read()
740 si_setcoreidx(sih, origidx); in si_pmustatstimer_read()
746 si_pmustatstimer_cfg_src_num(si_t *sih, uint8 src_num, uint8 timerid) in si_pmustatstimer_cfg_src_num() argument
750 osl_t *osh = si_osh(sih); in si_pmustatstimer_cfg_src_num()
753 origidx = si_coreidx(sih); in si_pmustatstimer_cfg_src_num()
754 if (AOB_ENAB(sih)) { in si_pmustatstimer_cfg_src_num()
755 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_cfg_src_num()
757 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_cfg_src_num()
765 si_setcoreidx(sih, origidx); in si_pmustatstimer_cfg_src_num()
769 si_pmustatstimer_cfg_cnt_mode(si_t *sih, uint8 cnt_mode, uint8 timerid) in si_pmustatstimer_cfg_cnt_mode() argument
773 osl_t *osh = si_osh(sih); in si_pmustatstimer_cfg_cnt_mode()
776 origidx = si_coreidx(sih); in si_pmustatstimer_cfg_cnt_mode()
777 if (AOB_ENAB(sih)) { in si_pmustatstimer_cfg_cnt_mode()
778 pmu = si_setcore(sih, PMU_CORE_ID, 0); in si_pmustatstimer_cfg_cnt_mode()
780 pmu = si_setcoreidx(sih, SI_CC_IDX); in si_pmustatstimer_cfg_cnt_mode()
788 si_setcoreidx(sih, origidx); in si_pmustatstimer_cfg_cnt_mode()