136 	gciregs_t *gciregs;  in si_lhl_set_lpoclk()  local
141 	gciregs = si_setcore(sih, GCI_CORE_ID, 0);  in si_lhl_set_lpoclk()
143 	ASSERT(gciregs != NULL);  in si_lhl_set_lpoclk()
188 		((R_REG(osh, &gciregs->lhl_clk_det_ctl_adr) & LHL_CLK_DET_CNT) >>  in si_lhl_set_lpoclk()
193 		((R_REG(osh, &gciregs->lhl_clk_det_ctl_adr) & LHL_CLK_DET_CNT) >>  in si_lhl_set_lpoclk()
206 		((R_REG(osh, &gciregs->lhl_clk_det_ctl_adr) & LHL_CLK_DET_CNT) >>  in si_lhl_set_lpoclk()
213 		((R_REG(osh, &gciregs->lhl_clk_det_ctl_adr) & LHL_CLK_DET_CNT) >>  in si_lhl_set_lpoclk()
228 	status = ((R_REG(osh, &gciregs->lhl_clk_status_adr) & LHL_MAIN_CTL_ADR_FINAL_CLK_SEL) ==  in si_lhl_set_lpoclk()
234 		((R_REG(osh, &gciregs->lhl_clk_status_adr) & LHL_MAIN_CTL_ADR_FINAL_CLK_SEL) ==  in si_lhl_set_lpoclk()
356 	 gciregs_t *gciregs;  in si_lhl_ilp_config()  local
358 		gciregs = si_setcore(sih, GCI_CORE_ID, 0);  in si_lhl_ilp_config()
359 		ASSERT(gciregs != NULL);  in si_lhl_ilp_config()
360 		W_REG(osh, &gciregs->lhl_wl_ilp_val_adr, ilp_period);  in si_lhl_ilp_config()
379 	gciregs_t *gciregs;  in si_lhl_enable_sdio_wakeup()  local
381 	gciregs = si_setcore(sih, GCI_CORE_ID, 0);  in si_lhl_enable_sdio_wakeup()
382 	ASSERT(gciregs != NULL);  in si_lhl_enable_sdio_wakeup()
389 		OR_REG(osh, &gciregs->gpio_ctrl_iocfg_p_adr[ULP_SDIO_CMD_PIN],  in si_lhl_enable_sdio_wakeup()
394 		OR_REG(osh, &gciregs->gpio_int_st_port_adr[0], 1 << ULP_SDIO_CMD_PIN);  in si_lhl_enable_sdio_wakeup()
398 		OR_REG(osh, &gciregs->gpio_int_en_port_adr[0], 1 << ULP_SDIO_CMD_PIN);  in si_lhl_enable_sdio_wakeup()
401 		OR_REG(osh, &gciregs->gci_intstat, GCI_INTSTATUS_LHLWLWAKE);  in si_lhl_enable_sdio_wakeup()
403 		OR_REG(osh, &gciregs->gci_intmask, GCI_INTMASK_LHLWLWAKE);  in si_lhl_enable_sdio_wakeup()
404 		OR_REG(osh, &gciregs->gci_wakemask, GCI_WAKEMASK_LHLWLWAKE);  in si_lhl_enable_sdio_wakeup()