Lines Matching +full:tcam +full:- +full:based
6 * Copyright (C) 1999-2017, Broadcom Corporation
27 * <<Broadcom-WL-IPTag/Open:>>
29 * $Id: dhd_sdio.c 701844 2017-05-26 18:56:40Z $
107 #define FCHI (QLEN - 10)
204 #define PKTFREE2() if ((bus->bus != SPI_BUS) || bus->usebufpool) \
205 PKTFREE(bus->dhd->osh, pkt, FALSE);
228 #define REMAP_ENAB(bus) ((bus)->remap)
229 #define REMAP_ISADDR(bus, a) (((a) >= ((bus)->orig_ramsize)) && ((a) < ((bus)->ramsize)))
230 #define KSO_ENAB(bus) ((bus)->kso)
231 #define SR_ENAB(bus) ((bus)->_srenab)
232 #define SLPAUTO_ENAB(bus) ((SR_ENAB(bus)) && ((bus)->_slpauto))
240 #define OOB_WAKEUP_ENAB(bus) ((bus)->_oobwakeup)
287 uint32 sbaddr; /* Current SB window pointer (-1, invalid) */
303 bool fcstate; /* State of dongle flow-control */
316 struct pktq txq; /* Queue length used for flow-control */
373 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
375 int32 txinrx_thres; /* num of in-queued pkts */
421 uint fc_rcvd; /* Number of flow-control events received */
422 uint fc_xoff; /* Number which turned on flow-control */
423 uint fc_xon; /* Number which turned off flow-control */
447 * Remap region not DMA-able
490 #define NO_OTHER_ACTIVE_BUS_USER(bus) (bus->bt_use_count == 0)
597 datalign = ROUNDUP(datalign, (align)) - datalign; \
615 (((uint8)(bus->tx_max - bus->tx_seq) > TXCTL_CREDITS) && \
616 (((uint8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
620 (((uint8)(bus->tx_max - bus->tx_seq) != 0) && \
621 (((uint8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
625 ((uint8)(bus->tx_max - bus->tx_seq) - 1)
633 regvar = R_REG(bus->dhd->osh, regaddr); \
634 } while (bcmsdh_regfail(bus->sdh) && (++retryvar <= retry_limit)); \
636 bus->regfails += (retryvar-1); \
649 W_REG(bus->dhd->osh, regaddr, regval); \
650 } while (bcmsdh_regfail(bus->sdh) && (++retryvar <= retry_limit)); \
652 bus->regfails += (retryvar-1); \
661 bus->idlecount = 0; \
662 if ((bus)->sleeping) \
697 /* check packet-available-interrupt in piggybacked dstatus */
698 #define PKT_AVAILABLE(bus, intstatus) (bcmsdh_get_dstatus(bus->sdh) & STATUS_F2_PKT_AVAILABLE)
704 uint32 dstatussw = bcmsdh_get_dstatus((void *)bus->sdh); \
705 uint32 dstatushw = bcmsdh_cfg_read_word(bus->sdh, SDIO_FUNC_0, SPID_STATUS_REG, NULL); \
709 R_SDREG(intstatuserr, &bus->regs->intstatus, retries); \
713 bus->nextlen = 0; \
720 ((bus->rxint_mode == SDIO_DEVICE_HMB_RXINT) ? I_HMB_FRAME_IND : I_XMTDATA_AVAIL)
832 if (bus->sih->buscorerev >= 15) { in dhdsdio_tune_fifoparam()
834 if (bus->blocksize == 512) { in dhdsdio_tune_fifoparam()
838 mes = bus->blocksize/4; in dhdsdio_tune_fifoparam()
839 wm = bus->blocksize/4; in dhdsdio_tune_fifoparam()
846 bus->sih->buscorerev)); in dhdsdio_tune_fifoparam()
852 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK, wm, &err); in dhdsdio_tune_fifoparam()
854 devctl = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, &err); in dhdsdio_tune_fifoparam()
856 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, devctl, &err); in dhdsdio_tune_fifoparam()
861 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_MESBUSYCTRL, in dhdsdio_tune_fifoparam()
866 bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, &err), in dhdsdio_tune_fifoparam()
867 bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK, &err), in dhdsdio_tune_fifoparam()
868 bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_MESBUSYCTRL, &err))); in dhdsdio_tune_fifoparam()
879 (dhd_dongle_ramsize < (int32)bus->orig_ramsize)) in dhd_dongle_setramsize()
880 bus->ramsize = dhd_dongle_ramsize; in dhd_dongle_setramsize()
887 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW, in dhdsdio_set_siaddr_window()
890 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRMID, in dhdsdio_set_siaddr_window()
893 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRHIGH, in dhdsdio_set_siaddr_window()
904 bcmsdh_info_t *sdh = bus->sdh; in dhdsdio_wkwlan()
906 if (bus->sih->buscoretype == SDIOD_CORE_ID) { in dhdsdio_wkwlan()
927 bcmsdh_gpioouten(bus->sdh, GPIO_DEV_WAKEUP); in dhdsdio_oobwakeup_init()
929 addr = SI_ENUM_BASE(bus->sih) + OFFSETOF(chipcregs_t, chipcontrol_addr); in dhdsdio_oobwakeup_init()
930 data = SI_ENUM_BASE(bus->sih) + OFFSETOF(chipcregs_t, chipcontrol_data); in dhdsdio_oobwakeup_init()
933 bcmsdh_reg_write(bus->sdh, addr, 4, 2); in dhdsdio_oobwakeup_init()
934 val = bcmsdh_reg_read(bus->sdh, data, 4); in dhdsdio_oobwakeup_init()
936 bcmsdh_reg_write(bus->sdh, data, 4, val); in dhdsdio_oobwakeup_init()
938 bus->_oobwakeup = TRUE; in dhdsdio_oobwakeup_init()
954 if (si_findcoreidx(bus->sih, SR_CORE_ID, 0) != BADIDX) { in dhdsdio_sr_cap()
955 if (bus->sih->chip == CYW55500_CHIP_ID || in dhdsdio_sr_cap()
956 bus->sih->chip == CYW55560_CHIP_ID) { in dhdsdio_sr_cap()
961 if (bus->sih->chip == BCM43430_CHIP_ID || in dhdsdio_sr_cap()
962 bus->sih->chip == BCM43018_CHIP_ID) { in dhdsdio_sr_cap()
964 addr = SI_ENUM_BASE(bus->sih) + OFFSETOF(chipcregs_t, sr_control1); in dhdsdio_sr_cap()
965 if (bcmsdh_reg_read(bus->sdh, addr, 4) != 0) in dhdsdio_sr_cap()
973 } else if ((bus->sih->chip == BCM4335_CHIP_ID) || in dhdsdio_sr_cap()
974 (bus->sih->chip == BCM4339_CHIP_ID) || in dhdsdio_sr_cap()
975 BCM4345_CHIP(bus->sih->chip) || in dhdsdio_sr_cap()
976 (bus->sih->chip == BCM4354_CHIP_ID) || in dhdsdio_sr_cap()
977 (bus->sih->chip == BCM4358_CHIP_ID) || in dhdsdio_sr_cap()
978 (BCM4349_CHIP(bus->sih->chip)) || in dhdsdio_sr_cap()
979 (bus->sih->chip == BCM4350_CHIP_ID) || in dhdsdio_sr_cap()
981 (bus->sih->chip == BCM4362_CHIP_ID) || in dhdsdio_sr_cap()
983 (bus->sih->chip == BCM43012_CHIP_ID) || in dhdsdio_sr_cap()
984 (bus->sih->chip == BCM43014_CHIP_ID) || in dhdsdio_sr_cap()
985 (bus->sih->chip == BCM43751_CHIP_ID) || in dhdsdio_sr_cap()
986 (bus->sih->chip == BCM4373_CHIP_ID)) { in dhdsdio_sr_cap()
989 core_capext = bcmsdh_reg_read(bus->sdh, in dhdsdio_sr_cap()
990 si_get_pmu_reg_addr(bus->sih, OFFSETOF(chipcregs_t, core_cap_ext)), in dhdsdio_sr_cap()
998 if ((bus->sih->chip == BCM4335_CHIP_ID) || in dhdsdio_sr_cap()
999 (bus->sih->chip == BCM4339_CHIP_ID) || in dhdsdio_sr_cap()
1000 BCM4345_CHIP(bus->sih->chip) || in dhdsdio_sr_cap()
1001 (bus->sih->chip == BCM4354_CHIP_ID) || in dhdsdio_sr_cap()
1002 (bus->sih->chip == BCM4358_CHIP_ID) || in dhdsdio_sr_cap()
1003 (bus->sih->chip == BCM4350_CHIP_ID)) { in dhdsdio_sr_cap()
1005 addr = SI_ENUM_BASE(bus->sih) + OFFSETOF(chipcregs_t, chipcontrol_addr); in dhdsdio_sr_cap()
1006 data = SI_ENUM_BASE(bus->sih) + OFFSETOF(chipcregs_t, chipcontrol_data); in dhdsdio_sr_cap()
1007 bcmsdh_reg_write(bus->sdh, addr, 4, CC_PMUCC3); in dhdsdio_sr_cap()
1008 enabval = bcmsdh_reg_read(bus->sdh, data, 4); in dhdsdio_sr_cap()
1010 if ((bus->sih->chip == BCM4350_CHIP_ID) || in dhdsdio_sr_cap()
1011 BCM4345_CHIP(bus->sih->chip) || in dhdsdio_sr_cap()
1012 (bus->sih->chip == BCM4354_CHIP_ID) || in dhdsdio_sr_cap()
1013 (bus->sih->chip == BCM4358_CHIP_ID)) in dhdsdio_sr_cap()
1019 data = bcmsdh_reg_read(bus->sdh, in dhdsdio_sr_cap()
1020 si_get_pmu_reg_addr(bus->sih, OFFSETOF(chipcregs_t, retention_ctl)), in dhdsdio_sr_cap()
1035 if (bus->sih->chip == BCM43012_CHIP_ID || in dhdsdio_sr_init()
1036 bus->sih->chip == CYW55500_CHIP_ID || in dhdsdio_sr_init()
1037 bus->sih->chip == CYW55560_CHIP_ID) { in dhdsdio_sr_init()
1038 val = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_WAKEUPCTRL, NULL); in dhdsdio_sr_init()
1040 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_WAKEUPCTRL, in dhdsdio_sr_init()
1042 val = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_WAKEUPCTRL, NULL); in dhdsdio_sr_init()
1044 val = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_WAKEUPCTRL, NULL); in dhdsdio_sr_init()
1046 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_WAKEUPCTRL, in dhdsdio_sr_init()
1048 val = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_WAKEUPCTRL, NULL); in dhdsdio_sr_init()
1057 if (CHIPID(bus->sih->chip) == BCM43430_CHIP_ID || in dhdsdio_sr_init()
1058 CHIPID(bus->sih->chip) == BCM43018_CHIP_ID || in dhdsdio_sr_init()
1059 CHIPID(bus->sih->chip) == BCM4339_CHIP_ID || in dhdsdio_sr_init()
1060 CHIPID(bus->sih->chip) == BCM43012_CHIP_ID || in dhdsdio_sr_init()
1061 CHIPID(bus->sih->chip) == CYW55500_CHIP_ID || in dhdsdio_sr_init()
1062 CHIPID(bus->sih->chip) == CYW55560_CHIP_ID || in dhdsdio_sr_init()
1064 CHIPID(bus->sih->chip) == BCM4362_CHIP_ID || in dhdsdio_sr_init()
1066 CHIPID(bus->sih->chip) == BCM43014_CHIP_ID || in dhdsdio_sr_init()
1067 CHIPID(bus->sih->chip) == BCM43751_CHIP_ID || in dhdsdio_sr_init()
1075 if (bus->sih->chip == BCM43012_CHIP_ID || in dhdsdio_sr_init()
1076 bus->sih->chip == CYW55500_CHIP_ID || in dhdsdio_sr_init()
1077 bus->sih->chip == CYW55560_CHIP_ID) { in dhdsdio_sr_init()
1078 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, in dhdsdio_sr_init()
1081 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, in dhdsdio_sr_init()
1084 bus->_slpauto = dhd_slpauto ? TRUE : FALSE; in dhdsdio_sr_init()
1086 bus->_srenab = TRUE; in dhdsdio_sr_init()
1102 bus->kso = TRUE; in dhdsdio_clk_kso_init()
1108 val = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SLEEPCSR, NULL); in dhdsdio_clk_kso_init()
1111 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SLEEPCSR, val, &err); in dhdsdio_clk_kso_init()
1140 struct sdioh_info *sd = (struct sdioh_info *)(bus->sdh->sdioh); in dhdsdio_clk_kso_enab()
1141 struct sdio_func *func = sd->func[1]; in dhdsdio_clk_kso_enab()
1142 struct mmc_host *host = func->card->host; in dhdsdio_clk_kso_enab()
1165 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err); in dhdsdio_clk_kso_enab()
1171 if ((!on) && (bus->sih->chip == BCM43012_CHIP_ID || in dhdsdio_clk_kso_enab()
1172 bus->sih->chip == CYW55500_CHIP_ID || in dhdsdio_clk_kso_enab()
1173 bus->sih->chip == CYW55560_CHIP_ID)) { in dhdsdio_clk_kso_enab()
1190 rd_val = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SLEEPCSR, &err); in dhdsdio_clk_kso_enab()
1201 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err); in dhdsdio_clk_kso_enab()
1243 bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, in dhdsdio_clk_kso_iovar()
1250 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_kso_iovar()
1261 bus->kso = on; in dhdsdio_clk_kso_iovar()
1273 val = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SLEEPCSR, &err); in dhdsdio_sleepcsr_get()
1283 return bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_BRCM_CARDCAP, NULL); in dhdsdio_devcap_get()
1291 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_BRCM_CARDCAP, cap, &err); in dhdsdio_devcap_set()
1309 * so we can wake-up with clk request already set in dhdsdio_clk_devsleep_iovar()
1315 val = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, &err); in dhdsdio_clk_devsleep_iovar()
1321 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, in dhdsdio_clk_devsleep_iovar()
1324 bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, in dhdsdio_clk_devsleep_iovar()
1330 bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, in dhdsdio_clk_devsleep_iovar()
1333 err = bcmsdh_sleep(bus->sdh, TRUE); in dhdsdio_clk_devsleep_iovar()
1335 if ((SLPAUTO_ENAB(bus)) && (bus->idleclock == DHD_IDLE_STOP)) { in dhdsdio_clk_devsleep_iovar()
1345 err = bcmsdh_gpioout(bus->sdh, GPIO_DEV_WAKEUP, FALSE); /* GPIO_1 is off */ in dhdsdio_clk_devsleep_iovar()
1349 if ((SLPAUTO_ENAB(bus)) && (bus->idleclock != DHD_IDLE_ACTIVE)) { in dhdsdio_clk_devsleep_iovar()
1357 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_devsleep_iovar()
1362 err = bcmsdh_sleep(bus->sdh, FALSE); in dhdsdio_clk_devsleep_iovar()
1368 err = bcmsdh_sleep(bus->sdh, TRUE); in dhdsdio_clk_devsleep_iovar()
1370 err = bcmsdh_sleep(bus->sdh, FALSE); in dhdsdio_clk_devsleep_iovar()
1377 err = bcmsdh_sleep(bus->sdh, TRUE); in dhdsdio_clk_devsleep_iovar()
1379 err = bcmsdh_sleep(bus->sdh, FALSE); in dhdsdio_clk_devsleep_iovar()
1382 DHD_ERROR(("%s: FATAL: Device non-response!\n", in dhdsdio_clk_devsleep_iovar()
1391 err = bcmsdh_gpioout(bus->sdh, GPIO_DEV_WAKEUP, TRUE); /* GPIO_1 is on */ in dhdsdio_clk_devsleep_iovar()
1406 if ((SLPAUTO_ENAB(bus)) && (bus->idleclock == DHD_IDLE_STOP)) { in dhdsdio_clk_devsleep_iovar()
1407 dhdsdio_set_sdmode(bus, bus->sd_mode); in dhdsdio_clk_devsleep_iovar()
1414 /* Wait for device ready during transition to wake-up */ in dhdsdio_clk_devsleep_iovar()
1429 (((csr = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, in dhdsdio_clk_devsleep_iovar()
1444 bus->kso = on ? FALSE : TRUE; in dhdsdio_clk_devsleep_iovar()
1447 __FUNCTION__, bus->kso, on, err)); in dhdsdio_clk_devsleep_iovar()
1449 bus->kso = FALSE; in dhdsdio_clk_devsleep_iovar()
1468 sdh = bus->sdh; in dhdsdio_htclk()
1474 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()
1480 clkreq = bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ; in dhdsdio_htclk()
1495 bus->dhd->hang_reason = HANG_REASON_HT_AVAIL_ERROR; in dhdsdio_htclk()
1496 dhd_os_send_hang_message(bus->dhd); in dhdsdio_htclk()
1513 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) { in dhdsdio_htclk()
1514 /* Allow only clock-available interrupt */ in dhdsdio_htclk()
1525 bus->clkstate = CLK_PENDING; in dhdsdio_htclk()
1530 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()
1531 /* Cancel CA-only interrupt filter */ in dhdsdio_htclk()
1539 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { in dhdsdio_htclk()
1543 !SBSDIO_CLKAV(clkctl, bus->alp_only)), PMU_MAX_TRANSITION_DLY); in dhdsdio_htclk()
1549 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { in dhdsdio_htclk()
1556 bus->clkstate = CLK_AVAIL; in dhdsdio_htclk()
1560 if (bus->alp_only == TRUE) { in dhdsdio_htclk()
1573 bus->activity = TRUE; in dhdsdio_htclk()
1575 bus->idlecount = 0; in dhdsdio_htclk()
1580 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()
1581 /* Cancel CA-only interrupt filter */ in dhdsdio_htclk()
1587 bus->clkstate = CLK_SDONLY; in dhdsdio_htclk()
1610 err = bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0, in dhdsdio_set_sdmode()
1631 if (bus->idleclock == DHD_IDLE_STOP) { in dhdsdio_sdclk()
1634 err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0, in dhdsdio_sdclk()
1642 } else if (bus->idleclock != DHD_IDLE_ACTIVE) { in dhdsdio_sdclk()
1644 iovalue = bus->sd_divisor; in dhdsdio_sdclk()
1645 err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, in dhdsdio_sdclk()
1653 bus->clkstate = CLK_SDONLY; in dhdsdio_sdclk()
1656 if ((bus->sd_divisor == -1) || (bus->sd_mode == -1)) { in dhdsdio_sdclk()
1658 __FUNCTION__, bus->sd_divisor, bus->sd_mode)); in dhdsdio_sdclk()
1661 if (bus->idleclock == DHD_IDLE_STOP) { in dhdsdio_sdclk()
1663 err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0, in dhdsdio_sdclk()
1670 } else if (bus->idleclock != DHD_IDLE_ACTIVE) { in dhdsdio_sdclk()
1672 iovalue = bus->idleclock; in dhdsdio_sdclk()
1673 err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, in dhdsdio_sdclk()
1681 bus->clkstate = CLK_NONE; in dhdsdio_sdclk()
1695 uint oldstate = bus->clkstate; in dhdsdio_clkctl()
1701 if (bus->clkstate == target) { in dhdsdio_clkctl()
1703 dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms); in dhdsdio_clkctl()
1704 bus->activity = TRUE; in dhdsdio_clkctl()
1706 bus->idlecount = 0; in dhdsdio_clkctl()
1715 if (bus->clkstate == CLK_NONE) in dhdsdio_clkctl()
1720 dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms); in dhdsdio_clkctl()
1721 bus->activity = TRUE; in dhdsdio_clkctl()
1723 bus->idlecount = 0; in dhdsdio_clkctl()
1738 if (bus->bt_use_count != 0) { in dhdsdio_clkctl()
1740 __FUNCTION__, bus->bt_use_count)); in dhdsdio_clkctl()
1742 dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms); in dhdsdio_clkctl()
1751 if (bus->clkstate == CLK_NONE) in dhdsdio_clkctl()
1753 else if (bus->clkstate == CLK_AVAIL) in dhdsdio_clkctl()
1756 DHD_ERROR(("dhdsdio_clkctl: request for %d -> %d\n", in dhdsdio_clkctl()
1757 bus->clkstate, target)); in dhdsdio_clkctl()
1759 dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms); in dhdsdio_clkctl()
1773 if (bus->bt_use_count != 0) { in dhdsdio_clkctl()
1775 __FUNCTION__, bus->bt_use_count)); in dhdsdio_clkctl()
1785 if (bus->clkstate == CLK_AVAIL) in dhdsdio_clkctl()
1790 if (bus->dhd->dhd_console_ms == 0) in dhdsdio_clkctl()
1792 if (bus->poll == 0) in dhdsdio_clkctl()
1793 dhd_os_wd_timer(bus->dhd, 0); in dhdsdio_clkctl()
1797 DHD_INFO(("dhdsdio_clkctl: %d -> %d\n", oldstate, bus->clkstate)); in dhdsdio_clkctl()
1807 bcmsdh_info_t *sdh = bus->sdh; in dhdsdio_bussleep()
1808 sdpcmd_regs_t *regs = bus->regs; in dhdsdio_bussleep()
1816 (bus->sleeping ? "SLEEP" : "WAKE"))); in dhdsdio_bussleep()
1818 if (bus->dhd->hang_was_sent) in dhdsdio_bussleep()
1822 if (sleep == bus->sleeping) in dhdsdio_bussleep()
1829 if (bus->dpc_sched || bus->rxskip || pktq_n_pkts_tot(&bus->txq) || in dhdsdio_bussleep()
1830 bus->readframes || bus->ctrl_frame_stat) in dhdsdio_bussleep()
1832 if (bus->dpc_sched || bus->rxskip || pktq_n_pkts_tot(&bus->txq)) in dhdsdio_bussleep()
1838 * The following is the assumption based on which the hook is placed. in dhdsdio_bussleep()
1841 * actively using the bus, we will return BCME_BUSY from here, but the bus->sleeping in dhdsdio_bussleep()
1850 if (bus->bt_use_count != 0) { in dhdsdio_bussleep()
1858 bcmsdh_intr_disable(bus->sdh); in dhdsdio_bussleep()
1864 W_SDREG(SMB_USE_OOB, ®s->tosbmailbox, retries); in dhdsdio_bussleep()
1885 bus->sleeping = TRUE; in dhdsdio_bussleep()
1888 err = bcmsdh_iovar_op(bus->sdh, "sd3_tuning_disable", NULL, 0, in dhdsdio_bussleep()
1892 wake_up(&bus->bus_sleep); in dhdsdio_bussleep()
1907 W_SDREG(0, ®s->tosbmailboxdata, retries); in dhdsdio_bussleep()
1909 W_SDREG(SMB_DEV_INT, ®s->tosbmailbox, retries); in dhdsdio_bussleep()
1918 if (bus->intr && (bus->dhd->busstate == DHD_BUS_DATA)) { in dhdsdio_bussleep()
1919 bus->intdis = FALSE; in dhdsdio_bussleep()
1920 bcmsdh_intr_enable(bus->sdh); in dhdsdio_bussleep()
1927 dhd_pub_t *dhd = bus->dhd; in dhdsdio_bussleep()
1943 bus->sleeping = FALSE; in dhdsdio_bussleep()
1946 err = bcmsdh_iovar_op(bus->sdh, "sd3_tuning_disable", NULL, 0, in dhdsdio_bussleep()
1959 * bus - Pointer to the dhd_bus handle
1960 * can_wait - TRUE if the caller can wait until the clock becomes ready
1969 bus->bt_use_count++; in __dhdsdio_clk_enable()
1981 * CLK_AVAIL - Turn On both SD & HT clock in __dhdsdio_clk_enable()
1986 bus->bt_use_count)); in __dhdsdio_clk_enable()
1993 * bus - Pointer to the dhd_bus handle
1994 * can_wait - TRUE if the caller can wait until the clock becomes ready
2004 if (bus->bt_use_count == 0) { in __dhdsdio_clk_disable()
2010 bus->bt_use_count--; in __dhdsdio_clk_disable()
2023 bus->bt_use_count)); in __dhdsdio_clk_disable()
2030 bus->bt_use_count = 0; in dhdsdio_reset_bt_use_count()
2070 bcmsdh_intr_enable(bus->sdh); in dhd_enable_oob_intr()
2072 bcmsdh_enable_hw_oob_intr(bus->sdh, enable); in dhd_enable_oob_intr()
2074 sdpcmd_regs_t *regs = bus->regs; in dhd_enable_oob_intr()
2081 W_SDREG(SMB_USE_OOB, ®s->tosbmailbox, retries); in dhd_enable_oob_intr()
2087 W_SDREG(0, ®s->tosbmailboxdata, retries); in dhd_enable_oob_intr()
2089 W_SDREG(SMB_DEV_INT, ®s->tosbmailbox, retries); in dhd_enable_oob_intr()
2113 osh = bus->dhd->osh; in dhd_bus_txdata()
2118 if (bus->ext_loop) { in dhd_bus_txdata()
2123 *data++ = (uint8)bus->loopid++; in dhd_bus_txdata()
2133 dhd_ulp_set_path(bus->dhd, DHD_ULP_TX_DATA); in dhd_bus_txdata()
2143 for (i = 0; i < (datalen - 4); i++) { in dhd_bus_txdata()
2155 if (bus->dhd->aifsn_reverse) { in dhd_bus_txdata()
2165 /* Check for existing queue, current flow-control, pending event, or pending clock */ in dhd_bus_txdata()
2166 if (dhd_deferred_tx || bus->fcstate || pktq_n_pkts_tot(&bus->txq) || bus->dpc_sched || in dhd_bus_txdata()
2167 (!DATAOK(bus)) || (bus->flowcontrol & NBITVAL(prec)) || in dhd_bus_txdata()
2168 (bus->clkstate != CLK_AVAIL)) { in dhd_bus_txdata()
2173 pktq_n_pkts_tot(&bus->txq))); in dhd_bus_txdata()
2174 bus->fcqueued++; in dhd_bus_txdata()
2176 /* Priority based enq */ in dhd_bus_txdata()
2177 dhd_os_sdlock_txq(bus->dhd); in dhd_bus_txdata()
2178 deq_ret = dhd_prec_enq(bus->dhd, &bus->txq, pkt, prec); in dhd_bus_txdata()
2179 dhd_os_sdunlock_txq(bus->dhd); in dhd_bus_txdata()
2187 if (dhd_tcpack_check_xmit(bus->dhd, pkt) == BCME_ERROR) { in dhd_bus_txdata()
2190 dhd_tcpack_suppress_set(bus->dhd, TCPACK_SUP_OFF); in dhd_bus_txdata()
2193 dhd_txcomplete(bus->dhd, pkt, FALSE); in dhd_bus_txdata()
2200 dhd_os_sdlock_txq(bus->dhd); in dhd_bus_txdata()
2201 pkq_len = pktq_n_pkts_tot(&bus->txq); in dhd_bus_txdata()
2202 dhd_os_sdunlock_txq(bus->dhd); in dhd_bus_txdata()
2206 wlfc_enabled = (dhd_wlfc_flowcontrol(bus->dhd, ON, FALSE) != in dhd_bus_txdata()
2210 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, ON); in dhd_bus_txdata()
2215 dhd_os_sdlock_txq(bus->dhd); in dhd_bus_txdata()
2216 if (pktqprec_n_pkts(&bus->txq, prec) > qcount[prec]) in dhd_bus_txdata()
2217 qcount[prec] = pktqprec_n_pkts(&bus->txq, prec); in dhd_bus_txdata()
2218 dhd_os_sdunlock_txq(bus->dhd); in dhd_bus_txdata()
2222 if (dhd_deferred_tx && !bus->dpc_sched) { in dhd_bus_txdata()
2223 bus->dpc_sched = TRUE; in dhd_bus_txdata()
2224 dhd_sched_dpc(bus->dhd); in dhd_bus_txdata()
2230 chan = (bus->ext_loop ? SDPCM_TEST_CHANNEL : SDPCM_DATA_CHANNEL); in dhd_bus_txdata()
2233 dhd_os_sdlock(bus->dhd); in dhd_bus_txdata()
2243 bus->dhd->tx_errors++; in dhd_bus_txdata()
2245 bus->dhd->dstats.tx_bytes += datalen; in dhd_bus_txdata()
2247 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched && in dhd_bus_txdata()
2249 bus->activity = FALSE; in dhd_bus_txdata()
2254 dhd_os_sdunlock(bus->dhd); in dhd_bus_txdata()
2260 /* align packet data pointer and packet length to n-byte boundary, process packet headers,
2271 * return: positive value - length of the packet, including head and tail padding
2272 * negative value - errors
2287 uint8 sdpcm_hdrlen = bus->txglom_enable ? SDPCM_HDRLEN_TXGLOM : SDPCM_HDRLEN; in dhdsdio_txpkt_preprocess()
2290 osh = bus->dhd->osh; in dhdsdio_txpkt_preprocess()
2293 if (dhd_tcpack_check_xmit(bus->dhd, pkt) == BCME_ERROR) { in dhdsdio_txpkt_preprocess()
2296 dhd_tcpack_suppress_set(bus->dhd, TCPACK_SUP_OFF); in dhdsdio_txpkt_preprocess()
2320 /* gSPI expects that hw-header-len is equal to spi-command-len */ in dhdsdio_txpkt_preprocess()
2327 tail_padding = modulo > 0 ? (DHD_SDALIGN - modulo) : 0; in dhdsdio_txpkt_preprocess()
2335 * 2-1. This chain is of multiple pkts, or in dhdsdio_txpkt_preprocess()
2336 * 2-2. This is a single pkt whose size is longer than one block size. in dhdsdio_txpkt_preprocess()
2340 if (last_chained_pkt && bus->blocksize != 0 && in dhdsdio_txpkt_preprocess()
2341 (cur_chain_total_len > (int)bus->blocksize || prev_chain_total_len > 0)) { in dhdsdio_txpkt_preprocess()
2342 modulo = cur_chain_total_len % bus->blocksize; in dhdsdio_txpkt_preprocess()
2343 chain_tail_padding = modulo > 0 ? (bus->blocksize - modulo) : 0; in dhdsdio_txpkt_preprocess()
2350 bus->tx_tailpad_pktget++; in dhdsdio_txpkt_preprocess()
2357 if (bus->pad_pkt) { in dhdsdio_txpkt_preprocess()
2359 bus->tx_tailpad_chain++; in dhdsdio_txpkt_preprocess()
2362 bus->tx_tailpad_pktget++; in dhdsdio_txpkt_preprocess()
2393 if (last_chained_pkt && bus->blocksize != 0 && in dhdsdio_txpkt_preprocess()
2394 (cur_total_len > (int)bus->blocksize || prev_chain_total_len > 0)) { in dhdsdio_txpkt_preprocess()
2395 modulo = cur_total_len % bus->blocksize; in dhdsdio_txpkt_preprocess()
2396 tail_padding = modulo > 0 ? (bus->blocksize - modulo) : 0; in dhdsdio_txpkt_preprocess()
2399 tail_padding = modulo > 0 ? (DHD_SDALIGN - modulo) : 0; in dhdsdio_txpkt_preprocess()
2402 newpkt_size = PKTLEN(osh, pkt) + bus->blocksize + DHD_SDALIGN; in dhdsdio_txpkt_preprocess()
2403 bus->dhd->tx_realloc++; in dhdsdio_txpkt_preprocess()
2423 * 4-byte HW frame tag: length, ~length (for glom this is the total length) in dhdsdio_txpkt_preprocess()
2425 * 8-byte HW extesion flags (glom mode only) as the following: in dhdsdio_txpkt_preprocess()
2426 * 2-byte packet length, excluding HW tag and padding in dhdsdio_txpkt_preprocess()
2427 * 2-byte frame channel and frame flags (e.g. next frame following) in dhdsdio_txpkt_preprocess()
2428 * 2-byte header length in dhdsdio_txpkt_preprocess()
2429 * 2-byte tail padding size in dhdsdio_txpkt_preprocess()
2431 * 8-byte SW frame tags as the following in dhdsdio_txpkt_preprocess()
2432 * 4-byte flags: host tx seq, channel, data offset in dhdsdio_txpkt_preprocess()
2433 * 4-byte flags: TBD in dhdsdio_txpkt_preprocess()
2440 * in tx-glom mode, dongle only checks the hardware frame tag in the first in dhdsdio_txpkt_preprocess()
2445 * in non tx-glom mode, PKTLEN still need to include tail padding as to be in dhdsdio_txpkt_preprocess()
2454 if (bus->txglom_enable) { in dhdsdio_txpkt_preprocess()
2459 hwheader1 = (pkt_len - SDPCM_FRAMETAG_LEN - tail_padding) | in dhdsdio_txpkt_preprocess()
2483 int swhdr_offset = SDPCM_FRAMETAG_LEN + (bus->txglom_enable ? SDPCM_HWEXT_LEN : 0); in dhdsdio_txpkt_postprocess()
2486 osh = bus->dhd->osh; in dhdsdio_txpkt_postprocess()
2497 if (bus->txglom_enable) { in dhdsdio_txpkt_postprocess()
2500 PKTSETLEN(osh, pkt, PKTLEN(osh, pkt) - tail_padding); in dhdsdio_txpkt_postprocess()
2504 /* non-txglom pkts have head_padding + original pkt length in HW frame tag. in dhdsdio_txpkt_postprocess()
2509 DHD_INFO((" non-txglom pkt: HW frame tag len %d after PKTLEN %d\n", in dhdsdio_txpkt_postprocess()
2540 if (bus->dhd->dongle_reset) in dhdsdio_txpkt()
2546 sdh = bus->sdh; in dhdsdio_txpkt()
2547 osh = bus->dhd->osh; in dhdsdio_txpkt()
2558 last_pkt = (i == num_pkt - 1); in dhdsdio_txpkt()
2559 pkt_len = dhdsdio_txpkt_preprocess(bus, pkt, chan, bus->tx_seq + i, in dhdsdio_txpkt()
2577 if (bus->txglom_enable) { in dhdsdio_txpkt()
2590 PKTSETLEN(osh, bus->pad_pkt, pad_pkt_len); in dhdsdio_txpkt()
2591 PKTSETNEXT(osh, pkt, bus->pad_pkt); in dhdsdio_txpkt()
2603 bus->tx_seq = (bus->tx_seq + num_pkt) % SDPCM_SEQUENCE_WRAP; in dhdsdio_txpkt()
2626 wlfc_enabled = (dhd_wlfc_txcomplete(bus->dhd, pkt, ret == 0) != in dhdsdio_txpkt()
2632 dhd_txcomplete(bus->dhd, pkt, ret != 0); in dhdsdio_txpkt()
2654 dhd_pub_t *dhd = bus->dhd; in dhdsdio_sendfromq()
2655 sdpcmd_regs_t *regs = bus->regs; in dhdsdio_sendfromq()
2672 osh = dhd->osh; in dhdsdio_sendfromq()
2673 tx_prec_map = ~bus->flowcontrol; in dhdsdio_sendfromq()
2675 tx_prec_map &= dhd->dequeue_prec_map; in dhdsdio_sendfromq()
2683 dhd_os_sdlock_txq(bus->dhd); in dhdsdio_sendfromq()
2684 if (bus->txglom_enable) { in dhdsdio_sendfromq()
2685 uint32 glomlimit = (uint32)bus->txglomsize; in dhdsdio_sendfromq()
2687 if (bus->blocksize == 64) { in dhdsdio_sendfromq()
2688 glomlimit = MIN((uint32)bus->txglomsize, BLK_64_MAXTXGLOM); in dhdsdio_sendfromq()
2694 num_pkt = MIN(num_pkt, pktq_mlen(&bus->txq, tx_prec_map)); in dhdsdio_sendfromq()
2696 pkts[i] = pktq_mdeq(&bus->txq, tx_prec_map, &prec_out); in dhdsdio_sendfromq()
2698 DHD_ERROR(("%s: pktq_mlen non-zero when no pkt\n", in dhdsdio_sendfromq()
2708 data_offset = bdc_header->dataOffset; in dhdsdio_sendfromq()
2712 if (eh->ether_type == hton16(ETHER_TYPE_802_1X)) { in dhdsdio_sendfromq()
2717 PKTSETPRIO(pkts[i], dhd->prio_8021x); in dhdsdio_sendfromq()
2720 bdc_header->priority = in dhdsdio_sendfromq()
2721 (dhd->prio_8021x & BDC_PRIORITY_MASK); in dhdsdio_sendfromq()
2729 dhd_os_sdunlock_txq(bus->dhd); in dhdsdio_sendfromq()
2734 dhd->tx_errors++; in dhdsdio_sendfromq()
2736 dhd->dstats.tx_bytes += datalen; in dhdsdio_sendfromq()
2740 if (!bus->intr && cnt) in dhdsdio_sendfromq()
2743 R_SDREG(intstatus, ®s->intstatus, retries); in dhdsdio_sendfromq()
2744 bus->f2txdata++; in dhdsdio_sendfromq()
2745 if (bcmsdh_regfail(bus->sdh)) in dhdsdio_sendfromq()
2747 if (intstatus & bus->hostintmask) in dhdsdio_sendfromq()
2748 bus->ipend = TRUE; in dhdsdio_sendfromq()
2753 dhd_os_sdlock_txq(bus->dhd); in dhdsdio_sendfromq()
2754 txpktqlen = pktq_n_pkts_tot(&bus->txq); in dhdsdio_sendfromq()
2755 dhd_os_sdunlock_txq(bus->dhd); in dhdsdio_sendfromq()
2757 /* Do flow-control if needed */ in dhdsdio_sendfromq()
2758 if (dhd->up && (dhd->busstate == DHD_BUS_DATA) && (txpktqlen < FCLOW)) { in dhdsdio_sendfromq()
2763 if (!wlfc_enabled && dhd_doflow && dhd->txoff) { in dhdsdio_sendfromq()
2774 bcmsdh_info_t *sdh = bus->sdh; in dhdsdio_sendpendctl()
2776 uint8* frame_seq = bus->ctrl_frame_buf + SDPCM_FRAMETAG_LEN; in dhdsdio_sendpendctl()
2778 if (bus->txglom_enable) in dhdsdio_sendpendctl()
2781 if (*frame_seq != bus->tx_seq) { in dhdsdio_sendpendctl()
2783 " frm_seq:%d != bus->tx_seq:%d, corrected\n", in dhdsdio_sendpendctl()
2784 __FUNCTION__, *frame_seq, bus->tx_seq)); in dhdsdio_sendpendctl()
2785 *frame_seq = bus->tx_seq; in dhdsdio_sendpendctl()
2789 (uint8 *)bus->ctrl_frame_buf, (uint32)bus->ctrl_frame_len, in dhdsdio_sendpendctl()
2792 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP; in dhdsdio_sendpendctl()
2794 bus->ctrl_frame_stat = FALSE; in dhdsdio_sendpendctl()
2795 dhd_wait_event_wakeup(bus->dhd); in dhdsdio_sendpendctl()
2806 int ret = -1; in dhd_bus_txctl()
2807 uint8 sdpcm_hdrlen = bus->txglom_enable ? SDPCM_HDRLEN_TXGLOM : SDPCM_HDRLEN; in dhd_bus_txctl()
2811 if (bus->dhd->dongle_reset) in dhd_bus_txctl()
2812 return -EIO; in dhd_bus_txctl()
2815 frame = msg - sdpcm_hdrlen; in dhd_bus_txctl()
2821 frame -= doff; in dhd_bus_txctl()
2832 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) { in dhd_bus_txctl()
2833 uint16 pad = bus->blocksize - (len % bus->blocksize); in dhd_bus_txctl()
2834 if ((pad <= bus->roundup) && (pad < bus->blocksize)) in dhd_bus_txctl()
2837 len += DHD_SDALIGN - (len % DHD_SDALIGN); in dhd_bus_txctl()
2841 /* Satisfy length-alignment requirements */ in dhd_bus_txctl()
2842 if (forcealign && (len & (ALIGNMENT - 1))) in dhd_bus_txctl()
2848 dhd_os_sdlock(bus->dhd); in dhd_bus_txctl()
2859 if (bus->txglom_enable) { in dhd_bus_txctl()
2863 | bus->tx_seq in dhd_bus_txctl()
2869 hwheader1 = (msglen - SDPCM_FRAMETAG_LEN) | (1 << 24); in dhd_bus_txctl()
2870 hwheader2 = (len - (msglen)) << 16; in dhd_bus_txctl()
2879 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK); in dhd_bus_txctl()
2885 dhd_ulp_set_path(bus->dhd, DHD_ULP_TX_CTRL); in dhd_bus_txctl()
2887 if (!TXCTLOK(bus) || !dhd_ulp_f2_ready(bus->dhd, bus->sdh)) in dhd_bus_txctl()
2892 DHD_INFO(("%s: No bus credit bus->tx_max %d, bus->tx_seq %d\n", in dhd_bus_txctl()
2893 __FUNCTION__, bus->tx_max, bus->tx_seq)); in dhd_bus_txctl()
2894 bus->ctrl_frame_stat = TRUE; in dhd_bus_txctl()
2896 bus->ctrl_frame_buf = frame; in dhd_bus_txctl()
2897 bus->ctrl_frame_len = len; in dhd_bus_txctl()
2899 if (!bus->dpc_sched) { in dhd_bus_txctl()
2900 bus->dpc_sched = TRUE; in dhd_bus_txctl()
2901 dhd_sched_dpc(bus->dhd); in dhd_bus_txctl()
2903 if (bus->ctrl_frame_stat) { in dhd_bus_txctl()
2904 dhd_wait_for_event(bus->dhd, &bus->ctrl_frame_stat); in dhd_bus_txctl()
2907 if (bus->ctrl_frame_stat == FALSE) { in dhd_bus_txctl()
2911 bus->dhd->txcnt_timeout++; in dhd_bus_txctl()
2912 if (!bus->dhd->hang_was_sent) { in dhd_bus_txctl()
2915 R_SDREG(status, &bus->regs->intstatus, retry); in dhd_bus_txctl()
2919 __FUNCTION__, bus->tx_max, bus->tx_seq, bus->clkstate)); in dhd_bus_txctl()
2922 __FUNCTION__, bus->dhd->txcnt_timeout)); in dhd_bus_txctl()
2926 if ((bus->dhd->memdump_enabled) && in dhd_bus_txctl()
2927 (bus->dhd->txcnt_timeout >= MAX_CNTL_TX_TIMEOUT)) { in dhd_bus_txctl()
2929 bus->dhd->memdump_type = DUMP_TYPE_RESUMED_ON_TIMEOUT_TX; in dhd_bus_txctl()
2930 dhd_os_sdunlock(bus->dhd); in dhd_bus_txctl()
2931 dhd_bus_mem_dump(bus->dhd); in dhd_bus_txctl()
2932 dhd_os_sdlock(bus->dhd); in dhd_bus_txctl()
2935 ret = -1; in dhd_bus_txctl()
2936 bus->ctrl_frame_stat = FALSE; in dhd_bus_txctl()
2941 bus->dhd->txcnt_timeout = 0; in dhd_bus_txctl()
2942 bus->ctrl_frame_stat = TRUE; in dhd_bus_txctl()
2944 if (ret == -1) { in dhd_bus_txctl()
2954 bus->ctrl_frame_stat = FALSE; in dhd_bus_txctl()
2956 dhd_ulp_enable_cached_sbwad(bus->dhd, bus->sdh); in dhd_bus_txctl()
2960 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched && in dhd_bus_txctl()
2962 bus->activity = FALSE; in dhd_bus_txctl()
2967 dhd_os_sdunlock(bus->dhd); in dhd_bus_txctl()
2970 bus->dhd->tx_ctlerrs++; in dhd_bus_txctl()
2972 bus->dhd->tx_ctlpkts++; in dhd_bus_txctl()
2974 if (bus->dhd->txcnt_timeout >= MAX_CNTL_TX_TIMEOUT) { in dhd_bus_txctl()
2977 return -BCME_ERROR; in dhd_bus_txctl()
2979 return -ETIMEDOUT; in dhd_bus_txctl()
2982 return -ETIMEDOUT; in dhd_bus_txctl()
2990 return ret ? err_nodevice >= ERROR_BCME_NODEVICE_MAX ? -ETIMEDOUT : -EIO : 0; in dhd_bus_txctl()
3001 if (bus->dhd->dongle_reset) in dhd_bus_rxctl()
3002 return -EIO; in dhd_bus_rxctl()
3005 timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen); in dhd_bus_rxctl()
3007 dhd_os_sdlock(bus->dhd); in dhd_bus_rxctl()
3008 rxlen = bus->rxlen; in dhd_bus_rxctl()
3009 bcopy(bus->rxctl, msg, MIN(msglen, rxlen)); in dhd_bus_rxctl()
3010 bus->rxlen = 0; in dhd_bus_rxctl()
3011 dhd_os_sdunlock(bus->dhd); in dhd_bus_rxctl()
3020 R_SDREG(status, &bus->regs->intstatus, retry); in dhd_bus_rxctl()
3026 if (!bus->dhd->dongle_trap_occured) { in dhd_bus_rxctl()
3028 bus->dhd->memdump_type = DUMP_TYPE_RESUMED_ON_TIMEOUT; in dhd_bus_rxctl()
3030 dhd_os_sdlock(bus->dhd); in dhd_bus_rxctl()
3032 dhd_os_sdunlock(bus->dhd); in dhd_bus_rxctl()
3036 if (!bus->dhd->dongle_trap_occured) { in dhd_bus_rxctl()
3038 bus->dhd->memdump_type = DUMP_TYPE_RESUMED_UNKNOWN; in dhd_bus_rxctl()
3040 dhd_os_sdlock(bus->dhd); in dhd_bus_rxctl()
3042 dhd_os_sdunlock(bus->dhd); in dhd_bus_rxctl()
3047 if (bus->dhd->memdump_enabled && !bus->dhd->dongle_trap_occured) in dhd_bus_rxctl()
3053 bus->dhd->rxcnt_timeout++; in dhd_bus_rxctl()
3055 bus->dhd->rxcnt_timeout, rxlen)); in dhd_bus_rxctl()
3058 if (bus->dhd->memdump_enabled) { in dhd_bus_rxctl()
3059 bus->dhd->memdump_type = DUMP_TYPE_RESUMED_ON_TIMEOUT_RX; in dhd_bus_rxctl()
3060 dhd_bus_mem_dump(bus->dhd); in dhd_bus_rxctl()
3064 bus->dhd->rxcnt_timeout = 0; in dhd_bus_rxctl()
3068 bus->dhd->rx_ctlpkts++; in dhd_bus_rxctl()
3070 bus->dhd->rx_ctlerrs++; in dhd_bus_rxctl()
3072 if (bus->dhd->rxcnt_timeout >= MAX_CNTL_RX_TIMEOUT) { in dhd_bus_rxctl()
3075 return -BCME_ERROR; in dhd_bus_rxctl()
3077 return -ETIMEDOUT; in dhd_bus_rxctl()
3080 return -ETIMEDOUT; in dhd_bus_rxctl()
3083 if (bus->dhd->dongle_trap_occured) in dhd_bus_rxctl()
3084 return -EREMOTEIO; in dhd_bus_rxctl()
3086 return rxlen ? (int)rxlen : -EIO; in dhd_bus_rxctl()
3218 q2 = (100 * (num - (q1 * div))) / div; in dhd_dump_pct()
3226 dhd_bus_t *bus = dhdp->bus; in dhd_bus_dump()
3233 bus->hostintmask, bus->intstatus, bus->sdpcm_ver); in dhd_bus_dump()
3235 bus->fcstate, pktq_n_pkts_tot(&bus->txq), bus->tx_seq, bus->tx_max, bus->rxskip, in dhd_bus_dump()
3236 bus->rxlen, bus->rx_seq); in dhd_bus_dump()
3238 bus->intr, bus->intrcount, bus->lastintrs, bus->spurious); in dhd_bus_dump()
3242 bcmsdh_get_total_wake(bus->sdh), bus->wake_counts.rxwake, in dhd_bus_dump()
3243 bus->wake_counts.rcwake); in dhd_bus_dump()
3246 bus->wake_counts.rx_ucast, bus->wake_counts.rx_mcast, in dhd_bus_dump()
3247 bus->wake_counts.rx_bcast, bus->wake_counts.rx_arp); in dhd_bus_dump()
3249 bus->wake_counts.rx_multi_ipv4, bus->wake_counts.rx_multi_ipv6, in dhd_bus_dump()
3250 bus->wake_counts.rx_icmpv6, bus->wake_counts.rx_multi_other); in dhd_bus_dump()
3252 bus->wake_counts.rx_icmpv6_ra, bus->wake_counts.rx_icmpv6_na, in dhd_bus_dump()
3253 bus->wake_counts.rx_icmpv6_ns); in dhd_bus_dump()
3257 if (bus->wake_counts.rc_event[i] != 0) in dhd_bus_dump()
3259 bus->wake_counts.rc_event[i]); in dhd_bus_dump()
3265 bus->pollrate, bus->pollcnt, bus->regfails); in dhd_bus_dump()
3270 bus->tx_tailpad_chain, bus->tx_tailpad_pktget); in dhd_bus_dump()
3273 bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong, in dhd_bus_dump()
3274 bus->rxc_errors); in dhd_bus_dump()
3276 bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq); in dhd_bus_dump()
3278 bus->fc_rcvd, bus->fc_xoff, bus->fc_xon); in dhd_bus_dump()
3280 bus->rxglomfail, bus->rxglomframes, bus->rxglompkts); in dhd_bus_dump()
3282 (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs, bus->f2rxdata, in dhd_bus_dump()
3283 bus->f2txdata, bus->f1regdata); in dhd_bus_dump()
3285 dhd_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->dhd->rx_packets, in dhd_bus_dump()
3286 (bus->f2rxhdrs + bus->f2rxdata)); in dhd_bus_dump()
3287 dhd_dump_pct(strbuf, ", pkts/f1sd", bus->dhd->rx_packets, bus->f1regdata); in dhd_bus_dump()
3288 dhd_dump_pct(strbuf, ", pkts/sd", bus->dhd->rx_packets, in dhd_bus_dump()
3289 (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata)); in dhd_bus_dump()
3290 dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->rx_packets, bus->intrcount); in dhd_bus_dump()
3293 dhd_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts), in dhd_bus_dump()
3294 bus->dhd->rx_packets); in dhd_bus_dump()
3295 dhd_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts, bus->rxglomframes); in dhd_bus_dump()
3298 dhd_dump_pct(strbuf, "Tx: pkts/f2wr", bus->dhd->tx_packets, bus->f2txdata); in dhd_bus_dump()
3299 dhd_dump_pct(strbuf, ", pkts/f1sd", bus->dhd->tx_packets, bus->f1regdata); in dhd_bus_dump()
3300 dhd_dump_pct(strbuf, ", pkts/sd", bus->dhd->tx_packets, in dhd_bus_dump()
3301 (bus->f2txdata + bus->f1regdata)); in dhd_bus_dump()
3302 dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->tx_packets, bus->intrcount); in dhd_bus_dump()
3306 (bus->dhd->tx_packets + bus->dhd->rx_packets), in dhd_bus_dump()
3307 (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata)); in dhd_bus_dump()
3309 (bus->dhd->tx_packets + bus->dhd->rx_packets), bus->f1regdata); in dhd_bus_dump()
3311 (bus->dhd->tx_packets + bus->dhd->rx_packets), in dhd_bus_dump()
3312 (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata)); in dhd_bus_dump()
3314 (bus->dhd->tx_packets + bus->dhd->rx_packets), bus->intrcount); in dhd_bus_dump()
3319 if (bus->pktgen_count) { in dhd_bus_dump()
3322 bus->pktgen_freq, bus->pktgen_count, bus->pktgen_print, in dhd_bus_dump()
3323 bus->pktgen_total, bus->pktgen_minlen, bus->pktgen_maxlen); in dhd_bus_dump()
3325 bus->pktgen_sent, bus->pktgen_rcvd, bus->pktgen_fail); in dhd_bus_dump()
3330 bus->dpc_sched, (bcmsdh_intr_pending(bus->sdh) ? " " : " not ")); in dhd_bus_dump()
3331 bcm_bprintf(strbuf, "blocksize %u roundup %u\n", bus->blocksize, bus->roundup); in dhd_bus_dump()
3334 bus->clkstate, bus->activity, bus->idletime, bus->idlecount, bus->sleeping); in dhd_bus_dump()
3340 dhd_bus_t *bus = (dhd_bus_t *)dhdp->bus; in dhd_bus_clearcounts()
3342 bus->intrcount = bus->lastintrs = bus->spurious = bus->regfails = 0; in dhd_bus_clearcounts()
3343 bus->rxrtx = bus->rx_toolong = bus->rxc_errors = 0; in dhd_bus_clearcounts()
3344 bus->rx_hdrfail = bus->rx_badhdr = bus->rx_badseq = 0; in dhd_bus_clearcounts()
3346 bus->tx_tailpad_chain = bus->tx_tailpad_pktget = 0; in dhd_bus_clearcounts()
3348 bus->tx_sderrs = bus->fc_rcvd = bus->fc_xoff = bus->fc_xon = 0; in dhd_bus_clearcounts()
3349 bus->rxglomfail = bus->rxglomframes = bus->rxglompkts = 0; in dhd_bus_clearcounts()
3350 bus->f2rxhdrs = bus->f2rxdata = bus->f2txdata = bus->f1regdata = 0; in dhd_bus_clearcounts()
3360 pktgen.freq = bus->pktgen_freq; in dhdsdio_pktgen_get()
3361 pktgen.count = bus->pktgen_count; in dhdsdio_pktgen_get()
3362 pktgen.print = bus->pktgen_print; in dhdsdio_pktgen_get()
3363 pktgen.total = bus->pktgen_total; in dhdsdio_pktgen_get()
3364 pktgen.minlen = bus->pktgen_minlen; in dhdsdio_pktgen_get()
3365 pktgen.maxlen = bus->pktgen_maxlen; in dhdsdio_pktgen_get()
3366 pktgen.numsent = bus->pktgen_sent; in dhdsdio_pktgen_get()
3367 pktgen.numrcvd = bus->pktgen_rcvd; in dhdsdio_pktgen_get()
3368 pktgen.numfail = bus->pktgen_fail; in dhdsdio_pktgen_get()
3369 pktgen.mode = bus->pktgen_mode; in dhdsdio_pktgen_get()
3370 pktgen.stop = bus->pktgen_stop; in dhdsdio_pktgen_get()
3387 oldcnt = bus->pktgen_count; in dhdsdio_pktgen_set()
3388 oldmode = bus->pktgen_mode; in dhdsdio_pktgen_set()
3390 bus->pktgen_freq = pktgen.freq; in dhdsdio_pktgen_set()
3391 bus->pktgen_count = pktgen.count; in dhdsdio_pktgen_set()
3392 bus->pktgen_print = pktgen.print; in dhdsdio_pktgen_set()
3393 bus->pktgen_total = pktgen.total; in dhdsdio_pktgen_set()
3394 bus->pktgen_minlen = pktgen.minlen; in dhdsdio_pktgen_set()
3395 bus->pktgen_maxlen = pktgen.maxlen; in dhdsdio_pktgen_set()
3396 bus->pktgen_mode = pktgen.mode; in dhdsdio_pktgen_set()
3397 bus->pktgen_stop = pktgen.stop; in dhdsdio_pktgen_set()
3399 bus->pktgen_tick = bus->pktgen_ptick = 0; in dhdsdio_pktgen_set()
3400 bus->pktgen_prev_time = jiffies; in dhdsdio_pktgen_set()
3401 bus->pktgen_len = MAX(bus->pktgen_len, bus->pktgen_minlen); in dhdsdio_pktgen_set()
3402 bus->pktgen_len = MIN(bus->pktgen_len, bus->pktgen_maxlen); in dhdsdio_pktgen_set()
3405 if (bus->pktgen_count && (!oldcnt || oldmode != bus->pktgen_mode)) { in dhdsdio_pktgen_set()
3406 bus->pktgen_sent = bus->pktgen_prev_sent = bus->pktgen_rcvd = 0; in dhdsdio_pktgen_set()
3407 bus->pktgen_prev_rcvd = bus->pktgen_fail = 0; in dhdsdio_pktgen_set()
3419 si_socdevram(bus->sih, FALSE, &enable, &protect, &remap); in dhdsdio_devram_remap()
3421 si_socdevram(bus->sih, TRUE, &enable, &protect, &remap); in dhdsdio_devram_remap()
3436 address -= bus->orig_ramsize; in dhdsdio_membytes()
3443 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr); in dhdsdio_membytes()
3474 memcpy(bus->membuf, pdata, nbytes); in dhdsdio_membytes()
3477 if ((bcmerror = bcmsdh_rwdata(bus->sdh, write, offset, bus->membuf, nbytes))) { in dhdsdio_membytes()
3483 memcpy(pdata, bus->membuf, nbytes); in dhdsdio_membytes()
3488 remain -= nbytes; in dhdsdio_membytes()
3495 if ((bcmerror = bcmsdh_rwdata(bus->sdh, write, sdaddr, data, dsize))) { in dhdsdio_membytes()
3502 if ((size -= dsize)) { in dhdsdio_membytes()
3516 if (dhdsdio_set_siaddr_window(bus, bcmsdh_cur_sbwad(bus->sdh))) { in dhdsdio_membytes()
3518 bcmsdh_cur_sbwad(bus->sdh))); in dhdsdio_membytes()
3536 if (bus->sih == NULL) { in dhdsdio_readshared()
3537 if (bus->dhd && bus->dhd->dongle_reset) { in dhdsdio_readshared()
3541 ASSERT(bus->dhd); in dhdsdio_readshared()
3542 ASSERT(bus->sih); in dhdsdio_readshared()
3547 if ((CHIPID(bus->sih->chip) == BCM43430_CHIP_ID || in dhdsdio_readshared()
3548 CHIPID(bus->sih->chip) == BCM43018_CHIP_ID) && !dhdsdio_sr_cap(bus)) in dhdsdio_readshared()
3549 bus->srmemsize = 0; in dhdsdio_readshared()
3551 shaddr = bus->dongle_ram_base + bus->ramsize - 4; in dhdsdio_readshared()
3567 if ((bus->srmemsize > 0) && (i++ == 0)) { in dhdsdio_readshared()
3568 shaddr -= bus->srmemsize; in dhdsdio_readshared()
3583 sh->flags = ltoh32(sh->flags); in dhdsdio_readshared()
3584 sh->trap_addr = ltoh32(sh->trap_addr); in dhdsdio_readshared()
3585 sh->assert_exp_addr = ltoh32(sh->assert_exp_addr); in dhdsdio_readshared()
3586 sh->assert_file_addr = ltoh32(sh->assert_file_addr); in dhdsdio_readshared()
3587 sh->assert_line = ltoh32(sh->assert_line); in dhdsdio_readshared()
3588 sh->console_addr = ltoh32(sh->console_addr); in dhdsdio_readshared()
3589 sh->msgtrace_addr = ltoh32(sh->msgtrace_addr); in dhdsdio_readshared()
3591 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) == 3 && SDPCM_SHARED_VERSION == 1) in dhdsdio_readshared()
3594 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) { in dhdsdio_readshared()
3598 sh->flags & SDPCM_SHARED_VERSION_MASK)); in dhdsdio_readshared()
3615 if ((CHIPID(bus->sih->chip) == BCM43430_CHIP_ID || in dhdsdio_readshared_console()
3616 CHIPID(bus->sih->chip) == BCM43018_CHIP_ID) && !dhdsdio_sr_cap(bus)) { in dhdsdio_readshared_console()
3617 bus->srmemsize = 0; in dhdsdio_readshared_console()
3620 shaddr = bus->dongle_ram_base + bus->ramsize - 4; in dhdsdio_readshared_console()
3637 if ((bus->srmemsize > 0) && (i++ == 0)) { in dhdsdio_readshared_console()
3638 shaddr -= bus->srmemsize; in dhdsdio_readshared_console()
3656 sh->console_addr = ltoh32(sh->console_addr); in dhdsdio_readshared_console()
3658 bus->console_addr = sh->console_addr; in dhdsdio_readshared_console()
3669 dhd_console_t *c = &bus->console; in dhdsdio_readconsole()
3678 if (bus->console_addr == 0) in dhdsdio_readconsole()
3685 addr = bus->console_addr + OFFSETOF(hnd_cons_t, log); in dhdsdio_readconsole()
3689 if (c->log_addr != addr) { in dhdsdio_readconsole()
3691 c->last = 0; in dhdsdio_readconsole()
3692 /* Re-allocate memory if console address changes */ in dhdsdio_readconsole()
3693 if (c->buf) { in dhdsdio_readconsole()
3694 MFREE(bus->dhd->osh, c->buf, c->bufsize); in dhdsdio_readconsole()
3695 c->buf = NULL; in dhdsdio_readconsole()
3698 c->log_addr = addr; in dhdsdio_readconsole()
3701 if ((rv = dhdsdio_membytes(bus, FALSE, addr, (uint8 *)&c->log, sizeof(c->log))) < 0) in dhdsdio_readconsole()
3705 if (c->buf == NULL) { in dhdsdio_readconsole()
3706 c->bufsize = ltoh32(c->log.buf_size); in dhdsdio_readconsole()
3707 if ((c->buf = MALLOC(bus->dhd->osh, c->bufsize)) == NULL) in dhdsdio_readconsole()
3711 idx = ltoh32(c->log.idx); in dhdsdio_readconsole()
3714 if (idx > c->bufsize) in dhdsdio_readconsole()
3718 if (idx == c->last) in dhdsdio_readconsole()
3721 DHD_ERROR(("conlog: addr=0x%x, idx=0x%x, last=0x%x \n", c->log.buf, in dhdsdio_readconsole()
3722 idx, c->last)); in dhdsdio_readconsole()
3725 addr = ltoh32(c->log.buf); in dhdsdio_readconsole()
3726 if ((rv = dhdsdio_membytes(bus, FALSE, addr, c->buf, c->bufsize)) < 0) in dhdsdio_readconsole()
3729 while (c->last != idx) { in dhdsdio_readconsole()
3730 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) { in dhdsdio_readconsole()
3731 if (c->last == idx) { in dhdsdio_readconsole()
3735 if (c->last >= n) in dhdsdio_readconsole()
3736 c->last -= n; in dhdsdio_readconsole()
3738 c->last = c->bufsize - n; in dhdsdio_readconsole()
3741 ch = c->buf[c->last]; in dhdsdio_readconsole()
3742 c->last = (c->last + 1) % c->bufsize; in dhdsdio_readconsole()
3749 if (line[n - 1] == '\r') in dhdsdio_readconsole()
3750 n--; in dhdsdio_readconsole()
3754 dhd_sendup_log(bus->dhd, line, n); in dhdsdio_readconsole()
3791 mbuffer = data = MALLOC(bus->dhd->osh, msize); in dhdsdio_checkdied()
3799 if ((str = MALLOC(bus->dhd->osh, maxstrlen)) == NULL) { in dhdsdio_checkdied()
3814 /* NOTE: Misspelled assert is intentional - DO NOT FIX. in dhdsdio_checkdied()
3821 /* NOTE: Misspelled assert is intentional - DO NOT FIX. in dhdsdio_checkdied()
3838 str[maxstrlen - 1] = '\0'; in dhdsdio_checkdied()
3849 str[maxstrlen - 1] = '\0'; in dhdsdio_checkdied()
3857 trap_t *tr = &bus->dhd->last_trap_info; in dhdsdio_checkdied()
3858 bus->dhd->dongle_trap_occured = TRUE; in dhdsdio_checkdied()
3864 bus->dongle_trap_addr = ltoh32(l_sdpcm_shared.trap_addr); in dhdsdio_checkdied()
3888 !(console_buffer = MALLOC(bus->dhd->osh, console_size))) in dhdsdio_checkdied()
3896 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) { in dhdsdio_checkdied()
3904 if (line[n - 1] == '\r') in dhdsdio_checkdied()
3905 n--; in dhdsdio_checkdied()
3925 if (bus->dhd->memdump_enabled && (l_sdpcm_shared.flags & SDPCM_SHARED_TRAP)) { in dhdsdio_checkdied()
3927 bus->dhd->memdump_type = DUMP_TYPE_DONGLE_TRAP; in dhdsdio_checkdied()
3928 dhd_os_sdunlock(bus->dhd); in dhdsdio_checkdied()
3930 dhd_os_sdlock(bus->dhd); in dhdsdio_checkdied()
3936 MFREE(bus->dhd->osh, mbuffer, msize); in dhdsdio_checkdied()
3938 MFREE(bus->dhd->osh, str, maxstrlen); in dhdsdio_checkdied()
3940 MFREE(bus->dhd->osh, console_buffer, console_size); in dhdsdio_checkdied()
3949 dhd_bus_t *bus = dhdp->bus; in dhd_bus_mem_dump()
3950 if (dhdp->busstate == DHD_BUS_SUSPEND) { in dhd_bus_mem_dump()
3965 return dhdsdio_get_mem_dump(dhdp->bus); in dhd_bus_get_mem_dump()
3972 int size = bus->ramsize; /* Full mem size */ in dhdsdio_get_mem_dump()
3973 uint32 start = bus->dongle_ram_base; /* Start address */ in dhdsdio_get_mem_dump()
3978 p_buf = dhd_get_fwdump_buf(bus->dhd, size); in dhdsdio_get_mem_dump()
3985 dhd_os_sdlock(bus->dhd); in dhdsdio_get_mem_dump()
4002 size -= read_size; in dhdsdio_get_mem_dump()
4007 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched && in dhdsdio_get_mem_dump()
4009 bus->activity = FALSE; in dhdsdio_get_mem_dump()
4013 dhd_os_sdunlock(bus->dhd); in dhdsdio_get_mem_dump()
4024 dhdp = bus->dhd; in dhdsdio_mem_dump()
4038 dhd_schedule_memdump(dhdp, dhdp->soc_ram, dhdp->soc_ram_length); in dhdsdio_mem_dump()
4052 return -1; in dhd_socram_dump()
4063 if (bus->dhd->up && in dhdsdio_downloadvars()
4065 (DHD_ULP_DISABLED == dhd_ulp_get_ulp_state(bus->dhd)) && in dhdsdio_downloadvars()
4077 if (bus->vars) in dhdsdio_downloadvars()
4078 MFREE(bus->dhd->osh, bus->vars, bus->varsz); in dhdsdio_downloadvars()
4080 bus->vars = MALLOC(bus->dhd->osh, len); in dhdsdio_downloadvars()
4081 bus->varsz = bus->vars ? len : 0; in dhdsdio_downloadvars()
4082 if (bus->vars == NULL) { in dhdsdio_downloadvars()
4087 /* Copy the passed variables, which should include the terminating double-null */ in dhdsdio_downloadvars()
4088 bcopy(arg, bus->vars, bus->varsz); in dhdsdio_downloadvars()
4100 addr = SI_ENUM_BASE(bus->sih) + OFFSETOF(chipcregs_t, chipcontrol_addr); in dhd_serialconsole()
4101 data = SI_ENUM_BASE(bus->sih) + OFFSETOF(chipcregs_t, chipcontrol_data); in dhd_serialconsole()
4104 bcmsdh_reg_write(bus->sdh, addr, 4, 1); in dhd_serialconsole()
4105 if (bcmsdh_regfail(bus->sdh)) { in dhd_serialconsole()
4107 return -1; in dhd_serialconsole()
4109 int_val = bcmsdh_reg_read(bus->sdh, data, 4); in dhd_serialconsole()
4110 if (bcmsdh_regfail(bus->sdh)) { in dhd_serialconsole()
4112 return -1; in dhd_serialconsole()
4121 bcmsdh_reg_write(bus->sdh, data, 4, int_val); in dhd_serialconsole()
4122 if (bcmsdh_regfail(bus->sdh)) { in dhd_serialconsole()
4124 return -1; in dhd_serialconsole()
4151 dhd_os_sdlock(bus->dhd); in dhdsdio_doiovar()
4154 if (bus->dhd->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) || in dhdsdio_doiovar()
4161 * Special handling for keepSdioOn: New SDIO Wake-up Mechanism in dhdsdio_doiovar()
4163 if ((vi->varid == IOV_KSO) && (IOV_ISSET(actionid))) { in dhdsdio_doiovar()
4166 } else if ((vi->varid == IOV_DEVSLEEP) && (IOV_ISSET(actionid))) { in dhdsdio_doiovar()
4169 if (!SLPAUTO_ENAB(bus) && (bool_val == FALSE) && (bus->ipend)) { in dhdsdio_doiovar()
4171 bus->dpc_sched)); in dhdsdio_doiovar()
4172 if (!bus->dpc_sched) { in dhdsdio_doiovar()
4173 bus->dpc_sched = TRUE; in dhdsdio_doiovar()
4174 dhd_sched_dpc(bus->dhd); in dhdsdio_doiovar()
4182 if (vi->varid == IOV_SLEEP) { in dhdsdio_doiovar()
4186 int_val = (int32)bus->sleeping; in dhdsdio_doiovar()
4193 if (!bus->dhd->dongle_reset) { in dhdsdio_doiovar()
4200 int_val = (int32)bus->intr; in dhdsdio_doiovar()
4205 bus->intr = bool_val; in dhdsdio_doiovar()
4206 bus->intdis = FALSE; in dhdsdio_doiovar()
4207 if (bus->dhd->up) { in dhdsdio_doiovar()
4208 if (bus->intr) { in dhdsdio_doiovar()
4210 bcmsdh_intr_enable(bus->sdh); in dhdsdio_doiovar()
4213 bcmsdh_intr_disable(bus->sdh); in dhdsdio_doiovar()
4219 int_val = (int32)bus->pollrate; in dhdsdio_doiovar()
4224 bus->pollrate = (uint)int_val; in dhdsdio_doiovar()
4225 bus->poll = (bus->pollrate != 0); in dhdsdio_doiovar()
4229 int_val = bus->idletime; in dhdsdio_doiovar()
4237 bus->idletime = int_val; in dhdsdio_doiovar()
4242 int_val = (int32)bus->idleclock; in dhdsdio_doiovar()
4247 bus->idleclock = int_val; in dhdsdio_doiovar()
4282 dsize = set ? plen - (2 * sizeof(int)) : len; in dhdsdio_doiovar()
4294 if (si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) { in dhdsdio_doiovar()
4299 if (set && address == bus->dongle_ram_base) { in dhdsdio_doiovar()
4300 bus->resetinstr = *(((uint32*)params) + 2); in dhdsdio_doiovar()
4304 if ((bus->orig_ramsize) && in dhdsdio_doiovar()
4305 ((address > bus->orig_ramsize) || (address + size > bus->orig_ramsize))) in dhdsdio_doiovar()
4308 si_socdevram(bus->sih, FALSE, &enable, &protect, &remap); in dhdsdio_doiovar()
4311 __FUNCTION__, bus->orig_ramsize, size, address)); in dhdsdio_doiovar()
4319 uint32 devramsize = si_socdevram_size(bus->sih); in dhdsdio_doiovar()
4330 address -= SOCDEVRAM_ARM_ADDR; in dhdsdio_doiovar()
4357 int_val = (int32)bus->ramsize; in dhdsdio_doiovar()
4362 int_val = (int32)bus->dongle_ram_base; in dhdsdio_doiovar()
4373 si_sdiod_drive_strength_init(bus->sih, bus->dhd->osh, dhd_sdiod_drive_strength); in dhdsdio_doiovar()
4395 bus->nextlen = 0; in dhdsdio_doiovar()
4400 int_val = (int32)bus->use_rxchain; in dhdsdio_doiovar()
4405 if (bool_val && !bus->sd_rxchain) in dhdsdio_doiovar()
4408 bus->use_rxchain = bool_val; in dhdsdio_doiovar()
4428 if (bus->varsz < (uint)len) in dhdsdio_doiovar()
4429 bcopy(bus->vars, arg, bus->varsz); in dhdsdio_doiovar()
4444 addr = ((uintptr)bus->regs + sd_ptr->offset); in dhdsdio_doiovar()
4445 size = sd_ptr->func; in dhdsdio_doiovar()
4446 int_val = (int32)bcmsdh_reg_read(bus->sdh, addr, size); in dhdsdio_doiovar()
4447 if (bcmsdh_regfail(bus->sdh)) in dhdsdio_doiovar()
4461 addr = ((uintptr)bus->regs + sd_ptr->offset); in dhdsdio_doiovar()
4462 size = sd_ptr->func; in dhdsdio_doiovar()
4463 bcmsdh_reg_write(bus->sdh, addr, size, sd_ptr->value); in dhdsdio_doiovar()
4464 if (bcmsdh_regfail(bus->sdh)) in dhdsdio_doiovar()
4477 addr = SI_ENUM_BASE(bus->sih) + sdreg.offset; in dhdsdio_doiovar()
4479 int_val = (int32)bcmsdh_reg_read(bus->sdh, addr, size); in dhdsdio_doiovar()
4480 if (bcmsdh_regfail(bus->sdh)) in dhdsdio_doiovar()
4493 addr = SI_ENUM_BASE(bus->sih) + sdreg.offset; in dhdsdio_doiovar()
4495 bcmsdh_reg_write(bus->sdh, addr, size, sdreg.value); in dhdsdio_doiovar()
4496 if (bcmsdh_regfail(bus->sdh)) in dhdsdio_doiovar()
4506 bcmsdh_cis_read(bus->sdh, 0x10, (uint8 *)arg + strlen(arg), SBSDIO_CIS_SIZE_LIMIT); in dhdsdio_doiovar()
4508 bcmsdh_cis_read(bus->sdh, 0x11, (uint8 *)arg + strlen(arg), SBSDIO_CIS_SIZE_LIMIT); in dhdsdio_doiovar()
4510 bcmsdh_cis_read(bus->sdh, 0x12, (uint8 *)arg + strlen(arg), SBSDIO_CIS_SIZE_LIMIT); in dhdsdio_doiovar()
4568 int_val = (int32)bus->ext_loop; in dhdsdio_doiovar()
4573 bus->ext_loop = bool_val; in dhdsdio_doiovar()
4595 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK, (uint8)watermark, NULL); in dhdsdio_doiovar()
4608 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_MESBUSYCTRL, in dhdsdio_doiovar()
4614 int_val = bus->dhd->dongle_isolation; in dhdsdio_doiovar()
4619 bus->dhd->dongle_isolation = bool_val; in dhdsdio_doiovar()
4624 __FUNCTION__, bool_val, bus->dhd->dongle_reset, in dhdsdio_doiovar()
4625 bus->dhd->busstate)); in dhdsdio_doiovar()
4627 ASSERT(bus->dhd->osh); in dhdsdio_doiovar()
4628 /* ASSERT(bus->cl_devid); */ in dhdsdio_doiovar()
4631 dhd_os_sdunlock(bus->dhd); in dhdsdio_doiovar()
4632 dhd_bus_devreset(bus->dhd, (uint8)bool_val); in dhdsdio_doiovar()
4633 dhd_os_sdlock(bus->dhd); in dhdsdio_doiovar()
4643 int_val = (bool) bus->dhd->dongle_reset; in dhdsdio_doiovar()
4662 int_val = (int32)bus->txglomsize; in dhdsdio_doiovar()
4670 bus->txglomsize = (uint)int_val; in dhdsdio_doiovar()
4674 bus->dhd->hang_report = bool_val; in dhdsdio_doiovar()
4675 DHD_ERROR(("%s: Set hang_report as %d\n", __FUNCTION__, bus->dhd->hang_report)); in dhdsdio_doiovar()
4679 int_val = (int32)bus->dhd->hang_report; in dhdsdio_doiovar()
4684 int_val = bus->txinrx_thres; in dhdsdio_doiovar()
4691 bus->txinrx_thres = int_val; in dhdsdio_doiovar()
4696 int_val = (bus->dhd->busstate == DHD_BUS_SUSPEND) ? 1 : 0; in dhdsdio_doiovar()
4712 debugger_init((void *) bus, &bus_ops, int_val, SI_ENUM_BASE(bus->sih)); in dhdsdio_doiovar()
4725 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched && in dhdsdio_doiovar()
4727 bus->activity = FALSE; in dhdsdio_doiovar()
4732 dhd_os_sdunlock(bus->dhd); in dhdsdio_doiovar()
4751 varsize = bus->varsz ? ROUNDUP(bus->varsz, 4) : 0; in dhdsdio_write_vars()
4752 varaddr = bus->ramsize - varsize - TOKENSIZE; in dhdsdio_write_vars()
4753 varaddr += bus->dongle_ram_base; in dhdsdio_write_vars()
4755 if (bus->vars) { in dhdsdio_write_vars()
4756 if ((bus->sih->buscoretype == SDIOD_CORE_ID) && (bus->sdpcmrev == 7)) { in dhdsdio_write_vars()
4760 varaddr -= 4; in dhdsdio_write_vars()
4764 vbuffer = (uint8 *)MALLOC(bus->dhd->osh, varsize + TOKENSIZE); in dhdsdio_write_vars()
4769 bcopy(bus->vars, vbuffer, bus->varsz); in dhdsdio_write_vars()
4773 * Varsize, converted to words, in lower 16-bits, checksum in upper 16-bits. in dhdsdio_write_vars()
4794 nvram_ularray = (uint8*)MALLOC(bus->dhd->osh, varsize); in dhdsdio_write_vars()
4796 MFREE(bus->dhd->osh, vbuffer, varsize + TOKENSIZE); in dhdsdio_write_vars()
4816 MFREE(bus->dhd->osh, nvram_ularray, varsize); in dhdsdio_write_vars()
4818 MFREE(bus->dhd->osh, vbuffer, varsize + TOKENSIZE); in dhdsdio_write_vars()
4822 phys_size = REMAP_ENAB(bus) ? bus->ramsize : bus->orig_ramsize; in dhdsdio_write_vars()
4824 phys_size += bus->dongle_ram_base; in dhdsdio_write_vars()
4828 phys_size, bus->ramsize)); in dhdsdio_write_vars()
4838 return MULTIBP_CAP(bus->sih); in dhd_bus_is_multibp_capable()
4849 if (!bus->sih) in dhdsdio_download_state()
4852 if (bus->secureboot) { in dhdsdio_download_state()
4865 bus->alp_only = TRUE; in dhdsdio_download_state()
4867 if (!(si_setcore(bus->sih, ARM7S_CORE_ID, 0)) && in dhdsdio_download_state()
4868 !(si_setcore(bus->sih, ARMCM3_CORE_ID, 0))) { in dhdsdio_download_state()
4869 if (si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) { in dhdsdio_download_state()
4879 si_core_disable(bus->sih, 0); in dhdsdio_download_state()
4880 if (bcmsdh_regfail(bus->sdh)) { in dhdsdio_download_state()
4885 if (!(si_setcore(bus->sih, SOCRAM_CORE_ID, 0))) { in dhdsdio_download_state()
4891 si_core_reset(bus->sih, 0, 0); in dhdsdio_download_state()
4892 if (bcmsdh_regfail(bus->sdh)) { in dhdsdio_download_state()
4900 if (REMAP_ENAB(bus) && si_socdevram_remap_isenb(bus->sih)) in dhdsdio_download_state()
4903 if (CHIPID(bus->sih->chip) == BCM43430_CHIP_ID || in dhdsdio_download_state()
4904 CHIPID(bus->sih->chip) == BCM43018_CHIP_ID) { in dhdsdio_download_state()
4906 si_socram_set_bankpda(bus->sih, 0x3, 0x0); in dhdsdio_download_state()
4910 if (bus->ramsize) { in dhdsdio_download_state()
4912 if (dhdsdio_membytes(bus, TRUE, bus->ramsize - 4, in dhdsdio_download_state()
4927 if (bus->secureboot) { in dhdsdio_download_state()
4947 /* Console buffer read - First pass */ in dhdsdio_download_state()
4955 si_core_reset(bus->sih, SICF_CPUHALT, SICF_CPUHALT); in dhdsdio_download_state()
4959 if (!si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) { in dhdsdio_download_state()
4960 if (!(si_setcore(bus->sih, SOCRAM_CORE_ID, 0))) { in dhdsdio_download_state()
4966 if (!si_iscoreup(bus->sih)) { in dhdsdio_download_state()
4980 if (REMAP_ENAB(bus) && !si_socdevram_remap_isenb(bus->sih)) in dhdsdio_download_state()
4983 if (!si_setcore(bus->sih, CC_CORE_ID, 0)) { in dhdsdio_download_state()
4989 if (!si_setcore(bus->sih, PCMCIA_CORE_ID, 0) && in dhdsdio_download_state()
4990 !si_setcore(bus->sih, SDIOD_CORE_ID, 0)) { in dhdsdio_download_state()
4996 W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries); in dhdsdio_download_state()
4998 if (!(si_setcore(bus->sih, ARM7S_CORE_ID, 0)) && in dhdsdio_download_state()
4999 !(si_setcore(bus->sih, ARMCM3_CORE_ID, 0))) { in dhdsdio_download_state()
5005 if (bus->secureboot) { in dhdsdio_download_state()
5007 /* Console buffer read - Second pass */ in dhdsdio_download_state()
5045 if (!si_setcore(bus->sih, CC_CORE_ID, 0)) { in dhdsdio_download_state()
5051 if (!si_setcore(bus->sih, PCMCIA_CORE_ID, 0) && in dhdsdio_download_state()
5052 !si_setcore(bus->sih, SDIOD_CORE_ID, 0)) { in dhdsdio_download_state()
5058 W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries); in dhdsdio_download_state()
5061 if (!(si_setcore(bus->sih, ARMCR4_CORE_ID, 0))) { in dhdsdio_download_state()
5068 if (!bus->secureboot) { in dhdsdio_download_state()
5070 (uint8 *)&bus->resetinstr, sizeof(bus->resetinstr)); in dhdsdio_download_state()
5079 if (bcmerror == BCME_OK && tmp != bus->resetinstr) { in dhdsdio_download_state()
5081 __FUNCTION__, bus->resetinstr)); in dhdsdio_download_state()
5092 if (bus->secureboot) { in dhdsdio_download_state()
5094 /* Console buffer read - Final pass */ in dhdsdio_download_state()
5109 si_core_reset(bus->sih, 0, 0); in dhdsdio_download_state()
5111 if (bcmsdh_regfail(bus->sdh)) { in dhdsdio_download_state()
5118 bus->alp_only = FALSE; in dhdsdio_download_state()
5120 bus->dhd->busstate = DHD_BUS_LOAD; in dhdsdio_download_state()
5125 if (bus->secureboot) { in dhdsdio_download_state()
5143 if (!si_setcore(bus->sih, PCMCIA_CORE_ID, 0)) in dhdsdio_download_state()
5144 si_setcore(bus->sih, SDIOD_CORE_ID, 0); in dhdsdio_download_state()
5155 addr->d2h = (uint32 *)SDIO_FN1_MSG_D2H_REG0; in dhdsdio_dongle_host_get_handshake_address()
5156 addr->h2d = (uint32 *)SDIO_FN1_MSG_H2D_REG0; in dhdsdio_dongle_host_get_handshake_address()
5169 bcmerror = dhdsdio_handshake_msg_reg_write(bus, addr->h2d, &h2d_reg); in dhdsdio_wait_bootloader_ready()
5174 bcmerror = dhdsdio_dongle_host_handshake_spinwait(bus, addr->d2h, in dhdsdio_wait_bootloader_ready()
5189 bcmerror = dhdsdio_handshake_msg_reg_write(bus, addr->h2d, &h2d_reg); in dhdsdio_dongle_host_pre_handshake()
5205 bcmerror = dhdsdio_handshake_msg_reg_write(bus, addr->h2d, &h2d_reg); in dhdsdio_dongle_host_post_handshake()
5210 bcmerror = dhdsdio_dongle_host_handshake_spinwait(bus, addr->d2h, in dhdsdio_dongle_host_post_handshake()
5215 dhdsdio_handshake_msg_reg_read(bus, addr->h2d, &h2d_reg); in dhdsdio_dongle_host_post_handshake()
5217 dhdsdio_handshake_msg_reg_write(bus, addr->h2d, &h2d_reg); in dhdsdio_dongle_host_post_handshake()
5232 bcmerror = dhdsdio_dongle_host_handshake_spinwait(bus, addr->d2h, in dhdsdio_dongle_host_chk_validation()
5236 bcmerror = dhdsdio_handshake_msg_reg_read(bus, addr->d2h, &d2h_reg); in dhdsdio_dongle_host_chk_validation()
5253 dhdsdio_handshake_msg_reg_read(bus, addr->h2d, &h2d_reg); in dhdsdio_dongle_host_chk_validation()
5255 dhdsdio_handshake_msg_reg_write(bus, addr->h2d, &h2d_reg); in dhdsdio_dongle_host_chk_validation()
5270 bcmerror = dhdsdio_handshake_msg_reg_write(bus, addr->h2d, &h2d_reg); in dhdsdio_dongle_host_post_varswrite()
5319 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, offset, ((*buffer) >> 0) in dhdsdio_cfg_write_buffer()
5322 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, offset+1, ((*buffer) >> 8) in dhdsdio_cfg_write_buffer()
5326 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, offset+2, ((*buffer) >> 16) in dhdsdio_cfg_write_buffer()
5330 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, offset+3, ((*buffer) >> 24) in dhdsdio_cfg_write_buffer()
5340 *buffer = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, offset+0, NULL) << 0; in dhdsdio_cfg_read_buffer()
5341 *buffer = *buffer | bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, offset+1, NULL) << 8; in dhdsdio_cfg_read_buffer()
5342 *buffer = *buffer | bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, offset+2, NULL) << 16; in dhdsdio_cfg_read_buffer()
5343 *buffer = *buffer | bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, offset+3, NULL) << 24; in dhdsdio_cfg_read_buffer()
5356 for (countdown_ = (us) + (HS_POLL_PERIOD_MS - 1U); countdown_ >= HS_POLL_PERIOD_MS; in dhdsdio_dongle_host_handshake_spinwait()
5357 countdown_ -= HS_POLL_PERIOD_MS) { in dhdsdio_dongle_host_handshake_spinwait()
5384 dhd_bus_t *bus = dhdp->bus; in dhd_bus_iovar_op()
5403 dhd_os_sdlock(bus->dhd); in dhd_bus_iovar_op()
5410 bcmerror = bcmsdh_iovar_op(bus->sdh, name, params, plen, arg, len, set); in dhd_bus_iovar_op()
5416 if (bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, in dhd_bus_iovar_op()
5417 &bus->sd_divisor, sizeof(int32), FALSE) != BCME_OK) { in dhd_bus_iovar_op()
5418 bus->sd_divisor = -1; in dhd_bus_iovar_op()
5422 __FUNCTION__, name, bus->sd_divisor)); in dhd_bus_iovar_op()
5427 if (bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0, in dhd_bus_iovar_op()
5428 &bus->sd_mode, sizeof(int32), FALSE) != BCME_OK) { in dhd_bus_iovar_op()
5429 bus->sd_mode = -1; in dhd_bus_iovar_op()
5433 __FUNCTION__, name, bus->sd_mode)); in dhd_bus_iovar_op()
5439 if (bcmsdh_iovar_op(bus->sdh, "sd_blocksize", &fnum, sizeof(int32), in dhd_bus_iovar_op()
5440 &bus->blocksize, sizeof(int32), FALSE) != BCME_OK) { in dhd_bus_iovar_op()
5441 bus->blocksize = 0; in dhd_bus_iovar_op()
5446 __FUNCTION__, fnum, "sd_blocksize", bus->blocksize)); in dhd_bus_iovar_op()
5451 bus->roundup = MIN(max_roundup, bus->blocksize); in dhd_bus_iovar_op()
5453 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched && in dhd_bus_iovar_op()
5455 bus->activity = FALSE; in dhd_bus_iovar_op()
5460 dhd_os_sdunlock(bus->dhd); in dhd_bus_iovar_op()
5475 if (vi->type == IOVT_VOID) in dhd_bus_iovar_op()
5477 else if (vi->type == IOVT_BUFFER) in dhd_bus_iovar_op()
5483 actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid); in dhd_bus_iovar_op()
5501 if (!bus->dhd) in dhd_bus_stop()
5504 osh = bus->dhd->osh; in dhd_bus_stop()
5507 bcmsdh_waitlockfree(bus->sdh); in dhd_bus_stop()
5510 dhd_os_sdlock(bus->dhd); in dhd_bus_stop()
5512 if ((bus->dhd->busstate == DHD_BUS_DOWN) || bus->dhd->hang_was_sent) { in dhd_bus_stop()
5515 bus->dhd->busstate = DHD_BUS_DOWN; in dhd_bus_stop()
5516 bus->hostintmask = 0; in dhd_bus_stop()
5517 bcmsdh_intr_disable(bus->sdh); in dhd_bus_stop()
5528 W_SDREG(0, &bus->regs->hostintmask, retries); in dhd_bus_stop()
5529 local_hostintmask = bus->hostintmask; in dhd_bus_stop()
5530 bus->hostintmask = 0; in dhd_bus_stop()
5533 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags); in dhd_bus_stop()
5535 bus->dhd->busstate = DHD_BUS_DOWN; in dhd_bus_stop()
5536 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags); in dhd_bus_stop()
5539 saveclk = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, &err); in dhd_bus_stop()
5541 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, in dhd_bus_stop()
5551 bcmsdh_intr_disable(bus->sdh); in dhd_bus_stop()
5553 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, SDIO_FUNC_ENABLE_1, NULL); in dhd_bus_stop()
5557 W_SDREG(local_hostintmask, &bus->regs->intstatus, retries); in dhd_bus_stop()
5565 wlfc_enabled = (dhd_wlfc_cleanup_txq(bus->dhd, NULL, 0) != WLFC_UNSUPPORTED); in dhd_bus_stop()
5572 dhd_tcpack_info_tbl_clean(bus->dhd); in dhd_bus_stop()
5574 dhd_os_sdlock_txq(bus->dhd); in dhd_bus_stop()
5576 pktq_flush(osh, &bus->txq, TRUE); in dhd_bus_stop()
5577 dhd_os_sdunlock_txq(bus->dhd); in dhd_bus_stop()
5581 if (bus->glomd) in dhd_bus_stop()
5582 PKTFREE(osh, bus->glomd, FALSE); in dhd_bus_stop()
5584 if (bus->glom) in dhd_bus_stop()
5585 PKTFREE(osh, bus->glom, FALSE); in dhd_bus_stop()
5587 bus->glom = bus->glomd = NULL; in dhd_bus_stop()
5590 bus->rxlen = 0; in dhd_bus_stop()
5591 dhd_os_ioctl_resp_wake(bus->dhd); in dhd_bus_stop()
5594 bus->rxskip = FALSE; in dhd_bus_stop()
5595 bus->tx_seq = bus->rx_seq = 0; in dhd_bus_stop()
5597 bus->tx_max = 4; in dhd_bus_stop()
5600 dhd_os_sdunlock(bus->dhd); in dhd_bus_stop()
5613 dhd_bus_t *bus = dhdp->bus; in dhd_txglom_enable()
5630 bus->txglom_enable = TRUE; in dhd_txglom_enable()
5635 bus->txglom_enable = FALSE; in dhd_txglom_enable()
5639 bus->txglom_enable = FALSE; in dhd_txglom_enable()
5645 dhd_bus_t *bus = dhdp->bus; in dhd_bus_init()
5651 uint32 dstatus = 0; /* gSPI device-status bits */ in dhd_bus_init()
5658 ASSERT(bus->dhd); in dhd_bus_init()
5659 if (!bus->dhd) in dhd_bus_init()
5675 dhd_os_sdlock(bus->dhd); in dhd_bus_init()
5679 if (bus->clkstate != CLK_AVAIL) { in dhd_bus_init()
5680 DHD_ERROR(("%s: clock state is wrong. state = %d\n", __FUNCTION__, bus->clkstate)); in dhd_bus_init()
5681 ret = -1; in dhd_bus_init()
5686 /* fake "ready" for spi, wake-wlan would have already enabled F1 and F2 */ in dhd_bus_init()
5693 dstatus = bcmsdh_cfg_read_word(bus->sdh, SDIO_FUNC_0, SPID_STATUS_REG, NULL); in dhd_bus_init()
5702 DHD_ERROR(("dstatus when timed out on f2-fifo not ready = 0x%x\n", dstatus)); in dhd_bus_init()
5704 ret = -1; in dhd_bus_init()
5710 saveclk = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, &err); in dhd_bus_init()
5713 if (bus->sih->chip == BCM43012_CHIP_ID || in dhd_bus_init()
5714 bus->sih->chip == CYW55500_CHIP_ID || in dhd_bus_init()
5715 bus->sih->chip == CYW55560_CHIP_ID) { in dhd_bus_init()
5716 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, in dhd_bus_init()
5719 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, in dhd_bus_init()
5726 ret = -1; in dhd_bus_init()
5732 &bus->regs->tosbmailboxdata, retries); in dhd_bus_init()
5735 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable, NULL); in dhd_bus_init()
5742 ready = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IORDY, NULL); in dhd_bus_init()
5753 bus->regs = si_setcore(bus->sih, CC_CORE_ID, 0); in dhd_bus_init()
5754 ASSERT(bus->regs != NULL); in dhd_bus_init()
5756 if (!(bus->regs = si_setcore(bus->sih, PCMCIA_CORE_ID, 0))) in dhd_bus_init()
5757 bus->regs = si_setcore(bus->sih, SDIOD_CORE_ID, 0); in dhd_bus_init()
5758 ASSERT(bus->regs != NULL); in dhd_bus_init()
5761 bus->hostintmask = HOSTINTMASK; in dhd_bus_init()
5764 if ((bus->sih->buscoretype == SDIOD_CORE_ID) && (bus->sdpcmrev == 4) && in dhd_bus_init()
5765 (bus->rxint_mode != SDIO_DEVICE_HMB_RXINT)) { in dhd_bus_init()
5766 bus->hostintmask &= ~I_HMB_FRAME_IND; in dhd_bus_init()
5767 bus->hostintmask |= I_XMTDATA_AVAIL; in dhd_bus_init()
5771 W_SDREG(bus->hostintmask, &bus->regs->hostintmask, retries); in dhd_bus_init()
5773 if (bus->sih->buscorerev < 15) { in dhd_bus_init()
5774 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK, in dhd_bus_init()
5779 dhdp->busstate = DHD_BUS_DATA; in dhd_bus_init()
5784 * It would be cleaner to use the ->sdh->block_sz[fno] instead of in dhd_bus_init()
5788 /* bcmsdh_intr_unmask(bus->sdh); */ in dhd_bus_init()
5790 bus->intdis = FALSE; in dhd_bus_init()
5791 if (bus->intr) { in dhd_bus_init()
5794 bcmsdh_intr_enable(bus->sdh); in dhd_bus_init()
5798 bcmsdh_intr_disable(bus->sdh); in dhd_bus_init()
5808 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable, NULL); in dhd_bus_init()
5812 if (bus->dhd->memdump_enabled && tcm_dump_enable) { in dhd_bus_init()
5814 dhd_bus_mem_dump(bus->dhd); in dhd_bus_init()
5821 bus->hostintmask &= ~I_CHIPACTIVE; in dhd_bus_init()
5822 W_SDREG(bus->hostintmask, &bus->regs->hostintmask, retries); in dhd_bus_init()
5824 __FUNCTION__, bus->hostintmask)); in dhd_bus_init()
5826 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, in dhd_bus_init()
5834 bus->hostintmask &= ~I_CHIPACTIVE; in dhd_bus_init()
5835 W_SDREG(bus->hostintmask, &bus->regs->hostintmask, retries); in dhd_bus_init()
5837 __FUNCTION__, bus->hostintmask)); in dhd_bus_init()
5843 if (dhdp->busstate != DHD_BUS_DATA) in dhd_bus_init()
5848 dhd_os_sdunlock(bus->dhd); in dhd_bus_init()
5856 bcmsdh_info_t *sdh = bus->sdh; in dhdsdio_rxfail()
5857 sdpcmd_regs_t *regs = bus->regs; in dhdsdio_rxfail()
5880 bus->f1regdata++; in dhdsdio_rxfail()
5883 for (lastrbc = retries = 0xffff; retries > 0; retries--) { in dhdsdio_rxfail()
5891 bus->f1regdata += 2; in dhdsdio_rxfail()
5906 DHD_INFO(("%s: flush took %d iterations\n", __FUNCTION__, (0xffff - retries))); in dhdsdio_rxfail()
5910 bus->rxrtx++; in dhdsdio_rxfail()
5911 W_SDREG(SMB_NAK, ®s->tosbmailbox, retries); in dhdsdio_rxfail()
5912 bus->f1regdata++; in dhdsdio_rxfail()
5914 bus->rxskip = TRUE; in dhdsdio_rxfail()
5919 bus->nextlen = 0; in dhdsdio_rxfail()
5925 bus->dhd->busstate = DHD_BUS_DOWN; in dhdsdio_rxfail()
5932 bcmsdh_info_t *sdh = bus->sdh; in dhdsdio_read_control()
5940 if ((bus->bus == SPI_BUS) && (!bus->usebufpool)) in dhdsdio_read_control()
5943 ASSERT(bus->rxbuf); in dhdsdio_read_control()
5945 bus->rxctl = bus->rxbuf; in dhdsdio_read_control()
5947 bus->rxctl += firstread; in dhdsdio_read_control()
5948 if ((pad = ((uintptr)bus->rxctl % DHD_SDALIGN))) in dhdsdio_read_control()
5949 bus->rxctl += (DHD_SDALIGN - pad); in dhdsdio_read_control()
5950 bus->rxctl -= firstread; in dhdsdio_read_control()
5952 ASSERT(bus->rxctl >= bus->rxbuf); in dhdsdio_read_control()
5954 /* Copy the already-read portion over */ in dhdsdio_read_control()
5955 bcopy(hdr, bus->rxctl, firstread); in dhdsdio_read_control()
5960 if (bus->bus == SPI_BUS) { in dhdsdio_read_control()
5961 bcopy(hdr, bus->rxctl, len); in dhdsdio_read_control()
5966 rdlen = len - firstread; in dhdsdio_read_control()
5967 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) { in dhdsdio_read_control()
5968 pad = bus->blocksize - (rdlen % bus->blocksize); in dhdsdio_read_control()
5969 if ((pad <= bus->roundup) && (pad < bus->blocksize) && in dhdsdio_read_control()
5970 ((len + pad) < bus->dhd->maxctl)) in dhdsdio_read_control()
5973 rdlen += DHD_SDALIGN - (rdlen % DHD_SDALIGN); in dhdsdio_read_control()
5976 /* Satisfy length-alignment requirements */ in dhdsdio_read_control()
5977 if (forcealign && (rdlen & (ALIGNMENT - 1))) in dhdsdio_read_control()
5981 if ((rdlen + firstread) > bus->dhd->maxctl) { in dhdsdio_read_control()
5982 DHD_ERROR(("%s: %d-byte control read exceeds %d-byte buffer\n", in dhdsdio_read_control()
5983 __FUNCTION__, rdlen, bus->dhd->maxctl)); in dhdsdio_read_control()
5984 bus->dhd->rx_errors++; in dhdsdio_read_control()
5989 if ((len - doff) > bus->dhd->maxctl) { in dhdsdio_read_control()
5990 DHD_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n", in dhdsdio_read_control()
5991 __FUNCTION__, len, (len - doff), bus->dhd->maxctl)); in dhdsdio_read_control()
5992 bus->dhd->rx_errors++; bus->rx_toolong++; in dhdsdio_read_control()
5999 (bus->rxctl + firstread), rdlen, NULL, NULL, NULL); in dhdsdio_read_control()
6000 bus->f2rxdata++; in dhdsdio_read_control()
6006 bus->rxc_errors++; /* dhd.rx_ctlerrs is higher level */ in dhdsdio_read_control()
6015 prhex("RxCtrl", bus->rxctl, len); in dhdsdio_read_control()
6020 bus->rxctl += doff; in dhdsdio_read_control()
6021 bus->rxlen = len - doff; in dhdsdio_read_control()
6025 dhd_os_ioctl_resp_wake(bus->dhd); in dhdsdio_read_control()
6042 osl_t *osh = bus->dhd->osh; in dhdsdio_rxglom()
6051 bool usechain = bus->use_rxchain; in dhdsdio_rxglom()
6056 DHD_TRACE(("dhdsdio_rxglom: start: glomd %p glom %p\n", bus->glomd, bus->glom)); in dhdsdio_rxglom()
6059 if (bus->glomd) { in dhdsdio_rxglom()
6060 dhd_os_sdlock_rxq(bus->dhd); in dhdsdio_rxglom()
6063 dlen = (uint16)PKTLEN(osh, bus->glomd); in dhdsdio_rxglom()
6064 dptr = PKTDATA(osh, bus->glomd); in dhdsdio_rxglom()
6074 dlen -= sizeof(uint16); in dhdsdio_rxglom()
6092 sublen += (ROUNDUP(totlen, bus->blocksize) - totlen); in dhdsdio_rxglom()
6093 totlen = ROUNDUP(totlen, bus->blocksize); in dhdsdio_rxglom()
6118 DHD_GLOM(("%s: allocated %d-byte packet chain for %d subframes\n", in dhdsdio_rxglom()
6120 if (DHD_GLOM_ON() && bus->nextlen) { in dhdsdio_rxglom()
6121 if (totlen != bus->nextlen) { in dhdsdio_rxglom()
6123 "rxseq %d\n", __FUNCTION__, bus->nextlen, in dhdsdio_rxglom()
6127 bus->glom = pfirst; in dhdsdio_rxglom()
6132 bus->glom = NULL; in dhdsdio_rxglom()
6137 PKTFREE(osh, bus->glomd, FALSE); in dhdsdio_rxglom()
6138 bus->glomd = NULL; in dhdsdio_rxglom()
6139 bus->nextlen = 0; in dhdsdio_rxglom()
6141 dhd_os_sdunlock_rxq(bus->dhd); in dhdsdio_rxglom()
6144 /* Ok -- either we just generated a packet chain, or had one from before */ in dhdsdio_rxglom()
6145 if (bus->glom) { in dhdsdio_rxglom()
6148 for (pnext = bus->glom; pnext; pnext = PKTNEXT(osh, pnext)) { in dhdsdio_rxglom()
6155 pfirst = bus->glom; in dhdsdio_rxglom()
6164 bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2, in dhdsdio_rxglom()
6167 } else if (bus->dataptr) { in dhdsdio_rxglom()
6169 bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2, in dhdsdio_rxglom()
6170 F2SYNC, bus->dataptr, in dhdsdio_rxglom()
6172 sublen = (uint16)pktfrombuf(osh, pfirst, 0, dlen, bus->dataptr); in dhdsdio_rxglom()
6176 errcode = -1; in dhdsdio_rxglom()
6181 DHD_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n", dlen)); in dhdsdio_rxglom()
6182 errcode = -1; in dhdsdio_rxglom()
6184 bus->f2rxdata++; in dhdsdio_rxglom()
6191 bus->dhd->rx_errors++; in dhdsdio_rxglom()
6193 if (bus->glomerr++ < 3) { in dhdsdio_rxglom()
6196 bus->glomerr = 0; in dhdsdio_rxglom()
6198 dhd_os_sdlock_rxq(bus->dhd); in dhdsdio_rxglom()
6199 PKTFREE(osh, bus->glom, FALSE); in dhdsdio_rxglom()
6200 dhd_os_sdunlock_rxq(bus->dhd); in dhdsdio_rxglom()
6201 bus->rxglomfail++; in dhdsdio_rxglom()
6202 bus->glom = NULL; in dhdsdio_rxglom()
6221 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET]; in dhdsdio_rxglom()
6222 if ((bus->nextlen << 4) > MAX_RX_DATASZ) { in dhdsdio_rxglom()
6224 __FUNCTION__, bus->nextlen, seq)); in dhdsdio_rxglom()
6225 bus->nextlen = 0; in dhdsdio_rxglom()
6234 errcode = -1; in dhdsdio_rxglom()
6235 } else if (ROUNDUP(sublen, bus->blocksize) != dlen) { in dhdsdio_rxglom()
6237 __FUNCTION__, sublen, ROUNDUP(sublen, bus->blocksize), dlen)); in dhdsdio_rxglom()
6238 errcode = -1; in dhdsdio_rxglom()
6242 errcode = -1; in dhdsdio_rxglom()
6245 errcode = -1; in dhdsdio_rxglom()
6247 (doff > (PKTLEN(osh, pfirst) - SDPCM_HDRLEN))) { in dhdsdio_rxglom()
6251 errcode = -1; in dhdsdio_rxglom()
6258 bus->rx_badseq++; in dhdsdio_rxglom()
6263 if ((uint8)(txmax - bus->tx_seq) > 0x70) { in dhdsdio_rxglom()
6265 __FUNCTION__, txmax, bus->tx_seq)); in dhdsdio_rxglom()
6266 txmax = bus->tx_max; in dhdsdio_rxglom()
6268 bus->tx_max = txmax; in dhdsdio_rxglom()
6293 errcode = -1; in dhdsdio_rxglom()
6298 errcode = -1; in dhdsdio_rxglom()
6303 errcode = -1; in dhdsdio_rxglom()
6307 errcode = -1; in dhdsdio_rxglom()
6313 if (bus->glomerr++ < 3) { in dhdsdio_rxglom()
6318 bus->glomerr = 0; in dhdsdio_rxglom()
6320 dhd_os_sdlock_rxq(bus->dhd); in dhdsdio_rxglom()
6321 PKTFREE(osh, bus->glom, FALSE); in dhdsdio_rxglom()
6322 dhd_os_sdunlock_rxq(bus->dhd); in dhdsdio_rxglom()
6323 bus->rxglomfail++; in dhdsdio_rxglom()
6324 bus->glom = NULL; in dhdsdio_rxglom()
6326 bus->nextlen = 0; in dhdsdio_rxglom()
6330 /* Basic SD framing looks ok - process each packet (header) */ in dhdsdio_rxglom()
6331 bus->glom = NULL; in dhdsdio_rxglom()
6334 dhd_os_sdlock_rxq(bus->dhd); in dhdsdio_rxglom()
6354 bus->rx_badseq++; in dhdsdio_rxglom()
6370 PKTFREE(bus->dhd->osh, pfirst, FALSE); in dhdsdio_rxglom()
6372 } else if (dhd_prot_hdrpull(bus->dhd, &ifidx, pfirst, reorder_info_buf, in dhdsdio_rxglom()
6375 bus->dhd->rx_errors++; in dhdsdio_rxglom()
6385 dhd_process_pkt_reorder_info(bus->dhd, reorder_info_buf, in dhdsdio_rxglom()
6429 dhd_os_sdunlock_rxq(bus->dhd); in dhdsdio_rxglom()
6441 dhd_os_sdunlock(bus->dhd); in dhdsdio_rxglom()
6442 dhd_rx_frame(bus->dhd, idx, list_head[idx], cnt, 0); in dhdsdio_rxglom()
6443 dhd_os_sdlock(bus->dhd); in dhdsdio_rxglom()
6447 bus->rxglomframes++; in dhdsdio_rxglom()
6448 bus->rxglompkts += num; in dhdsdio_rxglom()
6457 osl_t *osh = bus->dhd->osh;
6458 bcmsdh_info_t *sdh = bus->sdh;
6475 bool len_consistent; /* Result of comparing readahead len and len from hw-hdr */
6488 bus->readframes = TRUE;
6492 bus->readframes = FALSE;
6500 if (bus->pktgen_count && (bus->pktgen_mode == DHD_PKTGEN_RECV)) {
6501 maxframes = bus->pktgen_count;
6511 if (bus->bus == SPI_BUS) {
6512 /* Peek in dstatus bits and find out size to do rx-read. */
6513 dstatus = bcmsdh_get_dstatus(bus->sdh);
6519 DHD_TRACE(("Device status from bit-reconstruction = 0x%x\n",
6520 bcmsdh_get_dstatus((void *)bus->sdh)));
6523 bus->nextlen = ((dstatus & STATUS_F2_PKT_LEN_MASK) >>
6525 /* '0' size with pkt-available interrupt is eqvt to 2048 bytes */
6526 bus->nextlen = (bus->nextlen == 0) ? SPI_MAX_PKT_LEN : bus->nextlen;
6527 if (bus->dwordmode)
6528 bus->nextlen = bus->nextlen << 2;
6530 __FUNCTION__, bus->nextlen));
6535 DHD_ERROR(("False pkt-available intr.\n"));
6537 return (maxframes - rxleft);
6542 for (rxseq = bus->rx_seq, rxleft = maxframes;
6543 !bus->rxskip && rxleft && bus->dhd->busstate != DHD_BUS_DOWN;
6544 rxseq++, rxleft--) {
6546 if (bus->dhd->tcpack_sup_mode != TCPACK_SUP_DELAYTX) {
6547 if (bus->dotxinrx == FALSE)
6549 __FUNCTION__, __LINE__, bus->dhd->tcpack_sup_mode));
6552 else if (pktq_mlen(&bus->txq, ~bus->flowcontrol) > 0) {
6553 tack_tbl.cnt[bus->dotxinrx ? 6 : 7]++;
6558 if (TXCTLOK(bus) && bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL)) {
6560 } else if (bus->dotxinrx && (bus->clkstate == CLK_AVAIL) &&
6561 !bus->fcstate && DATAOK(bus) &&
6562 (pktq_mlen(&bus->txq, ~bus->flowcontrol) > bus->txinrx_thres)) {
6570 bus->dotxinrx = (bus->dhd->tcpack_sup_mode == TCPACK_SUP_DELAYTX) ?
6576 if (bus->glom || bus->glomd) {
6579 __FUNCTION__, bus->glomd, bus->glom));
6582 rxseq += cnt - 1;
6583 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
6588 if (dhd_readahead && bus->nextlen) {
6589 uint16 nextlen = bus->nextlen;
6590 bus->nextlen = 0;
6592 if (bus->bus == SPI_BUS) {
6598 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
6599 pad = bus->blocksize - (rdlen % bus->blocksize);
6600 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
6604 rdlen += DHD_SDALIGN - (rdlen % DHD_SDALIGN);
6608 /* We use bus->rxctl buffer in WinXP for initial control pkt receives.
6609 * Later we use buffer-poll for data as well as control packets.
6612 * or non-data frame.
6615 dhd_os_sdlock_rxq(bus->dhd);
6617 if (bus->bus == SPI_BUS) {
6618 bus->usebufpool = FALSE;
6619 bus->rxctl = bus->rxbuf;
6621 bus->rxctl += firstread;
6622 if ((pad = ((uintptr)bus->rxctl % DHD_SDALIGN)))
6623 bus->rxctl += (DHD_SDALIGN - pad);
6624 bus->rxctl -= firstread;
6626 ASSERT(bus->rxctl >= bus->rxbuf);
6627 rxbuf = bus->rxctl;
6634 bus->f2rxdata++;
6638 if (bcmsdh_get_dstatus((void *)bus->sdh) &
6640 bus->nextlen = 0;
6646 bus->rxc_errors++;
6647 dhd_os_sdunlock_rxq(bus->dhd);
6657 bus->rxc_errors++;
6658 dhd_os_sdunlock_rxq(bus->dhd);
6660 (bus->bus == SPI_BUS) ? FALSE : TRUE);
6669 dhd_os_sdunlock_rxq(bus->dhd);
6673 if (bus->bus == SPI_BUS)
6674 bus->usebufpool = TRUE;
6684 bus->f2rxdata++;
6687 if (bcmsdh_get_dstatus((void *)bus->sdh) & STATUS_UNDERFLOW) {
6688 bus->nextlen = 0;
6693 PKTFREE(bus->dhd->osh, pkt, FALSE);
6694 bus->dhd->rx_errors++;
6695 dhd_os_sdunlock_rxq(bus->dhd);
6703 PKTFREE(bus->dhd->osh, pkt, FALSE);
6704 bus->dhd->rx_errors++;
6705 dhd_os_sdunlock_rxq(bus->dhd);
6710 (bus->bus == SPI_BUS) ? FALSE : TRUE);
6714 dhd_os_sdunlock_rxq(bus->dhd);
6717 bcopy(rxbuf, bus->rxhdr, SDPCM_HDRLEN);
6720 len = ltoh16_ua(bus->rxhdr);
6721 check = ltoh16_ua(bus->rxhdr + sizeof(uint16));
6727 dhd_os_sdlock_rxq(bus->dhd);
6729 dhd_os_sdunlock_rxq(bus->dhd);
6739 dhd_os_sdlock_rxq(bus->dhd);
6741 dhd_os_sdunlock_rxq(bus->dhd);
6742 bus->rx_badhdr++;
6752 dhd_os_sdlock_rxq(bus->dhd);
6754 dhd_os_sdunlock_rxq(bus->dhd);
6761 if (bus->bus == SPI_BUS) {
6762 if (bus->dwordmode) {
6776 dhd_os_sdlock_rxq(bus->dhd);
6778 dhd_os_sdunlock_rxq(bus->dhd);
6779 dhdsdio_rxfail(bus, TRUE, (bus->bus == SPI_BUS) ? FALSE : TRUE);
6785 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6786 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6787 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6788 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6792 if (bus->bus == SPI_BUS) {
6794 dstatus = bcmsdh_get_dstatus((void *)bus->sdh);
6795 DHD_INFO(("Device status from bit-reconstruction = 0x%x\n",
6796 bcmsdh_get_dstatus((void *)bus->sdh)));
6798 bus->nextlen = ((dstatus & STATUS_F2_PKT_LEN_MASK) >>
6800 bus->nextlen = (bus->nextlen == 0) ?
6801 SPI_MAX_PKT_LEN : bus->nextlen;
6802 if (bus->dwordmode)
6803 bus->nextlen = bus->nextlen << 2;
6805 bus->nextlen));
6806 bus->dhd->rx_readahead_cnt ++;
6808 bus->nextlen = 0;
6813 bus->nextlen =
6814 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
6815 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
6817 " (%d), seq %d\n", __FUNCTION__, bus->nextlen,
6819 bus->nextlen = 0;
6822 bus->dhd->rx_readahead_cnt ++;
6827 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6830 if (~bus->flowcontrol & fcbits) {
6831 bus->fc_xoff++;
6834 if (bus->flowcontrol & ~fcbits) {
6835 bus->fc_xon++;
6840 bus->fc_rcvd++;
6841 bus->flowcontrol = fcbits;
6848 bus->rx_badseq++;
6853 if ((uint8)(txmax - bus->tx_seq) > 0x70) {
6855 if ((bus->bus == SPI_BUS) && !(dstatus & STATUS_F2_RX_READY)) {
6857 __FUNCTION__, txmax, bus->tx_seq));
6858 txmax = bus->tx_seq + 2;
6862 __FUNCTION__, txmax, bus->tx_seq));
6863 txmax = bus->tx_max;
6868 bus->tx_max = txmax;
6874 prhex("RxHdr", bus->rxhdr, SDPCM_HDRLEN);
6879 if (bus->bus == SPI_BUS) {
6881 if (bus->usebufpool) {
6882 dhd_os_sdlock_rxq(bus->dhd);
6883 PKTFREE(bus->dhd->osh, pkt, FALSE);
6884 dhd_os_sdunlock_rxq(bus->dhd);
6891 bus->nextlen = 0;
6893 dhd_os_sdlock_rxq(bus->dhd);
6895 dhd_os_sdunlock_rxq(bus->dhd);
6900 if ((bus->bus == SPI_BUS) && !bus->usebufpool) {
6910 dhd_os_sdlock_rxq(bus->dhd);
6912 dhd_os_sdunlock_rxq(bus->dhd);
6918 /* All done with this one -- now deliver the packet */
6922 if (bus->bus == SPI_BUS) {
6928 bus->rxhdr, firstread, NULL, NULL, NULL);
6929 bus->f2rxhdrs++;
6934 bus->rx_hdrfail++;
6941 prhex("RxHdr", bus->rxhdr, SDPCM_HDRLEN);
6946 len = ltoh16_ua(bus->rxhdr);
6947 check = ltoh16_ua(bus->rxhdr + sizeof(uint16));
6959 bus->rx_badhdr++;
6971 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6972 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6973 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6974 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6980 bus->rx_badhdr++;
6987 bus->nextlen = bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
6988 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
6990 __FUNCTION__, bus->nextlen, seq));
6991 bus->nextlen = 0;
6995 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
6998 if (~bus->flowcontrol & fcbits) {
6999 bus->fc_xoff++;
7002 if (bus->flowcontrol & ~fcbits) {
7003 bus->fc_xon++;
7008 bus->fc_rcvd++;
7009 bus->flowcontrol = fcbits;
7015 bus->rx_badseq++;
7020 if ((uint8)(txmax - bus->tx_seq) > 0x70) {
7022 __FUNCTION__, txmax, bus->tx_seq));
7023 txmax = bus->tx_max;
7025 bus->tx_max = txmax;
7029 dhdsdio_read_control(bus, bus->rxhdr, len, doff);
7037 rdlen = (len > firstread) ? (len - firstread) : 0;
7040 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
7041 pad = bus->blocksize - (rdlen % bus->blocksize);
7042 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
7046 rdlen += DHD_SDALIGN - (rdlen % DHD_SDALIGN);
7049 /* Satisfy length-alignment requirements */
7050 if (forcealign && (rdlen & (ALIGNMENT - 1)))
7054 /* Too long -- skip this frame */
7056 bus->dhd->rx_errors++; bus->rx_toolong++;
7061 dhd_os_sdlock_rxq(bus->dhd);
7066 bus->dhd->rx_dropped++;
7067 dhd_os_sdunlock_rxq(bus->dhd);
7071 dhd_os_sdunlock_rxq(bus->dhd);
7083 bus->f2rxdata++;
7090 dhd_os_sdlock_rxq(bus->dhd);
7091 PKTFREE(bus->dhd->osh, pkt, FALSE);
7092 dhd_os_sdunlock_rxq(bus->dhd);
7093 bus->dhd->rx_errors++;
7098 /* Copy the already-read portion */
7100 bcopy(bus->rxhdr, PKTDATA(osh, pkt), firstread);
7111 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
7122 bus->glomd = pkt;
7143 if ((chan == SDPCM_EVENT_CHANNEL) && (bus->sdpcmrev >= 17 && bus->sdpcmrev <= 22)) {
7147 dhd_os_sdlock_rxq(bus->dhd);
7148 PKTFREE(bus->dhd->osh, pkt, FALSE);
7149 dhd_os_sdunlock_rxq(bus->dhd);
7151 } else if (dhd_prot_hdrpull(bus->dhd, &ifidx, pkt, reorder_info_buf,
7154 dhd_os_sdlock_rxq(bus->dhd);
7155 PKTFREE(bus->dhd->osh, pkt, FALSE);
7156 dhd_os_sdunlock_rxq(bus->dhd);
7157 bus->dhd->rx_errors++;
7163 dhd_process_pkt_reorder_info(bus->dhd, reorder_info_buf, reorder_info_len,
7172 dhd_os_sdunlock(bus->dhd);
7173 dhd_rx_frame(bus->dhd, ifidx, pkt, pkt_count, chan);
7174 dhd_os_sdlock(bus->dhd);
7176 rxcount = maxframes - rxleft;
7185 if (bus->rxskip)
7186 rxseq--;
7187 bus->rx_seq = rxseq;
7189 if (bus->reqbussleep)
7192 bus->reqbussleep = FALSE;
7194 bus->readframes = FALSE;
7202 sdpcmd_regs_t *regs = bus->regs;
7211 R_SDREG(hmb_data, ®s->tohostmailboxdata, retries);
7213 W_SDREG(SMB_INT_ACK, ®s->tosbmailbox, retries);
7214 bus->f1regdata += 2;
7218 DHD_INFO(("Dongle reports NAK handled, expect rtx of %d\n", bus->rx_seq));
7219 if (!bus->rxskip) {
7222 bus->rxskip = FALSE;
7230 bus->sdpcm_ver = (hmb_data & HMB_DATA_VERSION_MASK) >> HMB_DATA_VERSION_SHIFT;
7231 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
7233 bus->sdpcm_ver, SDPCM_PROT_VERSION));
7235 DHD_INFO(("Dongle ready, protocol version %d\n", bus->sdpcm_ver));
7238 if ((bus->sih->buscoretype == SDIOD_CORE_ID) && (bus->sdpcmrev >= 4) &&
7239 (bus->rxint_mode == SDIO_DEVICE_RXDATAINT_MODE_1)) {
7242 val = R_REG(bus->dhd->osh, &bus->regs->corecontrol);
7245 W_REG(bus->dhd->osh, &bus->regs->corecontrol, val);
7247 val = R_REG(bus->dhd->osh, &bus->regs->corecontrol);
7256 bus->console_addr = shared.console_addr;
7269 if (fcbits & ~bus->flowcontrol)
7270 bus->fc_xoff++;
7271 if (bus->flowcontrol & ~fcbits)
7272 bus->fc_xon++;
7274 bus->fc_rcvd++;
7275 bus->flowcontrol = fcbits;
7306 bcmsdh_info_t *sdh = bus->sdh;
7307 sdpcmd_regs_t *regs = bus->regs;
7321 dhd_os_sdlock(bus->dhd);
7322 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
7323 if (bus->dhd->busstate == DHD_BUS_DOWN) {
7325 bus->intstatus = 0;
7326 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
7327 dhd_os_sdunlock(bus->dhd);
7331 DHD_BUS_BUSY_SET_IN_DPC(bus->dhd);
7332 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
7335 intstatus = bus->intstatus;
7343 if (!SLPAUTO_ENAB(bus) && (bus->clkstate == CLK_PENDING)) {
7353 bus->dhd->busstate = DHD_BUS_DOWN;
7364 bus->dhd->busstate = DHD_BUS_DOWN;
7375 bus->dhd->busstate = DHD_BUS_DOWN;
7383 bus->dhd->busstate = DHD_BUS_DOWN;
7385 bus->clkstate = CLK_AVAIL;
7395 if (bus->clkstate != CLK_AVAIL)
7399 if (bus->ipend) {
7400 bus->ipend = FALSE;
7405 R_SDREG(newstatus, ®s->intstatus, retries);
7406 bus->f1regdata++;
7407 if (bcmsdh_regfail(bus->sdh))
7409 newstatus &= bus->hostintmask;
7410 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
7412 bus->f1regdata++;
7414 if ((bus->rxint_mode == SDIO_DEVICE_RXDATAINT_MODE_0) &&
7418 W_SDREG(newstatus, ®s->intstatus, retries);
7424 bus->intstatus = 0;
7426 /* Handle flow-control change: read new state in case our ack
7432 W_SDREG(I_HMB_FC_CHANGE, ®s->intstatus, retries);
7433 R_SDREG(newstatus, ®s->intstatus, retries);
7434 bus->f1regdata += 2;
7435 bus->fcstate = !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
7436 intstatus |= (newstatus & bus->hostintmask);
7450 bcmsdh_force_sbwad_calc(bus->sdh, FALSE);
7452 if (dhd_ulp_pre_redownload_check(bus->dhd, bus->sdh, hmbdata)) {
7469 /* ASSERT(bus->clkstate == CLK_AVAIL); */
7495 /* Would be active due to wake-wlan in gSPI */
7507 if (bus->rxskip) {
7515 if (rxdone || bus->rxskip)
7517 rxlimit -= MIN(framecnt, rxlimit);
7520 /* Keep still-pending events for next scheduling */
7521 bus->intstatus = intstatus;
7524 /* Re-enable interrupts to detect new device events (mailbox, rx frame)
7528 if (bus->intr && bus->intdis && !bcmsdh_regfail(sdh)) {
7531 bus->intdis = FALSE;
7533 bcmsdh_oob_intr_set(bus->sdh, TRUE);
7538 bcmsdh_oob_intr_set(bus->sdh, TRUE);
7543 /* In case of SW-OOB(using edge trigger),
7547 * No need to do this with HW-OOB(level trigger)
7549 R_SDREG(newstatus, ®s->intstatus, retries);
7550 if (bcmsdh_regfail(bus->sdh))
7552 if (newstatus & bus->hostintmask) {
7553 bus->ipend = TRUE;
7559 dhd_wlfc_commit_packets(bus->dhd, (f_commitpkt_t)dhd_bus_txdata, (void *)bus, NULL, FALSE);
7562 if (TXCTLOK(bus) && bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL))
7566 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
7567 pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit && DATAOK(bus)) {
7570 if (dhd_ulp_f2_ready(bus->dhd, bus->sdh)) {
7574 txlimit -= framecnt;
7579 * dpc is scheduled after steady-state and dhdsdio_sendfromq() will
7586 if (bus->ctrl_frame_stat)
7591 if ((bus->dhd->busstate == DHD_BUS_DOWN) || bcmsdh_regfail(sdh)) {
7592 if ((bus->sih && bus->sih->buscorerev >= 12) && !(dhdsdio_sleepcsr_get(bus) &
7596 bus->kso = FALSE;
7601 bus->dhd->busstate = DHD_BUS_DOWN;
7602 bus->intstatus = 0;
7604 } else if (bus->clkstate == CLK_PENDING) {
7606 } else if (bus->intstatus || bus->ipend ||
7607 (!bus->fcstate && pktq_mlen(&bus->txq, ~bus->flowcontrol) && DATAOK(bus)) ||
7608 PKT_AVAILABLE(bus, bus->intstatus)) { /* Read multiple frames */
7612 bus->dpc_sched = resched;
7615 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && (bus->clkstate != CLK_PENDING) &&
7617 bus->activity = FALSE;
7633 dhd_os_sdunlock(bus->dhd);
7635 if (bus->dhd->dhd_bug_on) {
7638 __FUNCTION__, resched, bus->ctrl_frame_stat,
7639 bus->intstatus, bus->ipend,
7640 pktq_mlen(&bus->txq, ~bus->flowcontrol), is_resched_by_readframe));
7642 bus->dhd->dhd_bug_on = FALSE;
7646 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
7647 DHD_BUS_BUSY_CLEAR_IN_DPC(bus->dhd);
7648 dhd_os_busbusy_wake(bus->dhd);
7649 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
7678 sdh = bus->sdh;
7680 if (bus->dhd->busstate == DHD_BUS_DOWN) {
7688 bus->intrcount++;
7689 bus->ipend = TRUE;
7693 if (bus->sleeping) {
7702 if (bus->intr) {
7709 bcmsdh_oob_intr_set(bus->sdh, FALSE);
7712 bus->intdis = TRUE;
7716 DHD_OS_WAKE_LOCK(bus->dhd);
7718 DHD_OS_WAKE_UNLOCK(bus->dhd);
7720 bus->dpc_sched = TRUE;
7721 dhd_sched_dpc(bus->dhd);
7732 bus->pktgen_maxlen = MIN(dhd_pktgen_len, MAX_PKTGEN_LEN);
7733 bus->pktgen_minlen = bus->pktgen_maxlen;
7735 bus->pktgen_maxlen = MAX_PKTGEN_LEN;
7736 bus->pktgen_minlen = 0;
7738 bus->pktgen_len = (uint16)bus->pktgen_minlen;
7740 /* Default to per-watchdog burst with 10s print time */
7741 bus->pktgen_freq = 1;
7742 bus->pktgen_print = dhd_watchdog_ms ? (10000 / dhd_watchdog_ms) : 0;
7743 bus->pktgen_count = (dhd_pktgen * dhd_watchdog_ms + 999) / 1000;
7746 bus->pktgen_mode = DHD_PKTGEN_ECHO;
7747 bus->pktgen_stop = 1;
7757 osl_t *osh = bus->dhd->osh;
7764 if (bus->pktgen_print && (++bus->pktgen_ptick >= bus->pktgen_print)) {
7765 bus->pktgen_ptick = 0;
7767 __FUNCTION__, bus->pktgen_sent, bus->pktgen_rcvd, bus->pktgen_fail);
7770 if (bus->pktgen_minlen == bus->pktgen_maxlen) {
7771 time_lapse = jiffies - bus->pktgen_prev_time;
7772 bus->pktgen_prev_time = jiffies;
7773 sent_pkts = bus->pktgen_sent - bus->pktgen_prev_sent;
7774 bus->pktgen_prev_sent = bus->pktgen_sent;
7775 rcvd_pkts = bus->pktgen_rcvd - bus->pktgen_prev_rcvd;
7776 bus->pktgen_prev_rcvd = bus->pktgen_rcvd;
7780 (sent_pkts * bus->pktgen_len / jiffies_to_msecs(time_lapse)) * 8,
7781 (rcvd_pkts * bus->pktgen_len / jiffies_to_msecs(time_lapse)) * 8);
7786 if (bus->pktgen_mode == DHD_PKTGEN_RECV) {
7787 if (bus->pktgen_rcv_state == PKTGEN_RCV_IDLE) {
7788 bus->pktgen_rcv_state = PKTGEN_RCV_ONGOING;
7789 dhdsdio_sdtest_set(bus, bus->pktgen_total);
7795 for (pktcount = 0; pktcount < bus->pktgen_count; pktcount++) {
7797 if (bus->pktgen_total && (bus->pktgen_sent >= bus->pktgen_total)) {
7798 bus->pktgen_count = 0;
7802 /* Allocate an appropriate-sized packet */
7803 if (bus->pktgen_mode == DHD_PKTGEN_RXBURST) {
7806 len = bus->pktgen_len;
7816 /* Write test header cmd and extra based on mode */
7817 switch (bus->pktgen_mode) {
7820 *data++ = (uint8)bus->pktgen_sent;
7825 *data++ = (uint8)bus->pktgen_sent;
7830 *data++ = (uint8)bus->pktgen_count; /* Just for backward compatability */
7834 DHD_ERROR(("Unrecognized pktgen mode %d\n", bus->pktgen_mode));
7836 bus->pktgen_count = 0;
7841 *data++ = (bus->pktgen_len >> 0);
7842 *data++ = (bus->pktgen_len >> 8);
7847 if (bus->pktgen_mode == DHD_PKTGEN_RXBURST) {
7848 *data++ = (uint8)(bus->pktgen_count >> 0);
7849 *data++ = (uint8)(bus->pktgen_count >> 8);
7850 *data++ = (uint8)(bus->pktgen_count >> 16);
7851 *data++ = (uint8)(bus->pktgen_count >> 24);
7854 /* Then fill in the remainder -- N/A for burst */
7856 *data++ = SDPCM_TEST_FILL(fillbyte, (uint8)bus->pktgen_sent);
7862 prhex("dhdsdio_pktgen: Tx Data", data, PKTLEN(osh, pkt) - SDPCM_HDRLEN);
7868 bus->pktgen_fail++;
7869 if (bus->pktgen_stop && bus->pktgen_stop == bus->pktgen_fail)
7870 bus->pktgen_count = 0;
7872 bus->pktgen_sent++;
7875 if (++bus->pktgen_len > bus->pktgen_maxlen)
7876 bus->pktgen_len = (uint16)bus->pktgen_minlen;
7879 if (bus->pktgen_mode == DHD_PKTGEN_RXBURST)
7889 osl_t *osh = bus->dhd->osh;
7904 *data++ = (bus->pktgen_maxlen >> 0);
7905 *data++ = (bus->pktgen_maxlen >> 8);
7913 bus->pktgen_fail++;
7919 osl_t *osh = bus->dhd->osh;
7954 /* Rx->Tx turnaround ok (even on NDIS w/current implementation) */
7957 bus->pktgen_sent++;
7959 bus->pktgen_fail++;
7962 bus->pktgen_rcvd++;
7966 if (bus->ext_loop) {
7968 bus->pktgen_rcvd++;
7981 bus->pktgen_rcvd++;
7992 i, bus->pktgen_rcvd_rcvsession, testval, *prn));
7998 bus->pktgen_rcvd++;
8011 if (bus->pktgen_mode == DHD_PKTGEN_RECV) {
8012 if (bus->pktgen_rcv_state != PKTGEN_RCV_IDLE) {
8013 bus->pktgen_rcvd_rcvsession++;
8015 if (bus->pktgen_total &&
8016 (bus->pktgen_rcvd_rcvsession >= bus->pktgen_total)) {
8017 bus->pktgen_count = 0;
8019 bus->pktgen_rcv_state = PKTGEN_RCV_IDLE;
8021 bus->pktgen_rcvd_rcvsession = 0;
8033 err = bcmsdh_oob_intr_register(dhdp->bus->sdh, dhdsdio_isr, dhdp->bus);
8041 bcmsdh_oob_intr_unregister(dhdp->bus->sdh);
8048 bcmsdh_oob_intr_set(dhdp->bus->sdh, enable);
8054 bcmsdh_dev_pm_stay_awake(dhdpub->bus->sdh);
8059 bcmsdh_dev_relax(dhdpub->bus->sdh);
8066 enabled = bcmsdh_dev_pm_enabled(dhdpub->bus->sdh);
8078 bus = dhdp->bus;
8080 if (bus->dhd->dongle_reset)
8083 if (bus->dhd->hang_was_sent) {
8084 dhd_os_wd_timer(bus->dhd, 0);
8089 if (!SLPAUTO_ENAB(bus) && bus->sleeping)
8101 dhd_os_sdlock(bus->dhd);
8104 if (!SLPAUTO_ENAB(bus) && (bus->poll && (++bus->polltick >= bus->pollrate))) {
8108 bus->polltick = 0;
8111 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
8114 if (!bus->dpc_sched) {
8116 devpend = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0,
8121 if (!bus->dpc_sched) {
8123 devpend = bcmsdh_cfg_read_word(bus->sdh, SDIO_FUNC_0,
8131 bus->pollcnt++;
8132 bus->ipend = TRUE;
8133 if (bus->intr) {
8134 bcmsdh_intr_disable(bus->sdh);
8136 bus->dpc_sched = TRUE;
8137 dhd_sched_dpc(bus->dhd);
8142 bus->lastintrs = bus->intrcount;
8147 if (dhdp->busstate == DHD_BUS_DATA && dhdp->dhd_console_ms != 0) {
8148 bus->console.count += dhd_watchdog_ms;
8149 if (bus->console.count >= dhdp->dhd_console_ms) {
8150 bus->console.count -= dhdp->dhd_console_ms;
8157 dhdp->dhd_console_ms = 0; /* On error, stop trying */
8164 if (bus->pktgen_count && (++bus->pktgen_tick >= bus->pktgen_freq)) {
8170 bus->pktgen_tick = 0;
8177 if (bus->activity)
8178 bus->activity = FALSE;
8180 bus->idlecount++;
8195 * bus->idletime != 0 instead of idletime == 0
8197 if ((bus->idletime != 0) && (bus->idlecount >= bus->idletime) &&
8202 dhd_os_wd_timer(bus->dhd, 0);
8206 bus->idlecount = 0;
8210 if ((bus->idletime != 0) && (bus->clkstate == CLK_AVAIL) &&
8212 if (++bus->idlecount >= bus->idletime) {
8213 bus->idlecount = 0;
8214 if (bus->activity) {
8215 bus->activity = FALSE;
8220 if (!bus->readframes)
8223 bus->reqbussleep = TRUE;
8232 dhd_os_sdunlock(bus->dhd);
8239 return bus->ipend;
8245 dhd_bus_t *bus = dhdp->bus;
8251 if (bus->console_addr == 0)
8255 dhd_os_sdlock(bus->dhd);
8258 if (bus->dhd->dongle_reset) {
8259 dhd_os_sdunlock(bus->dhd);
8269 addr = bus->console_addr + OFFSETOF(hnd_cons_t, cbuf_idx);
8275 addr = bus->console_addr + OFFSETOF(hnd_cons_t, cbuf);
8280 addr = bus->console_addr + OFFSETOF(hnd_cons_t, vcons_in);
8288 if ((pkt = PKTGET(bus->dhd->osh, 4 + SDPCM_RESERVE, TRUE)) != NULL)
8292 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched &&
8294 bus->activity = FALSE;
8299 dhd_os_sdunlock(bus->dhd);
8317 if (!tdata--) {
8400 /* Init global variables at run-time, not as part of the declaration.
8401 * This is required to support init/de-init of the driver. Initialization
8402 * of globals as part of the declaration results in non-deterministic
8435 /* BCMSDH passes venid and devid based on CIS parsing -- but low-power start
8437 * we recognize OR (-1) indicating we must request power first.
8482 bus->sdh = sdh;
8483 bus->cl_devid = (uint16)devid;
8484 bus->bus = DHD_BUS;
8485 bus->bus_num = bus_no;
8486 bus->slot_num = slot;
8487 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
8488 bus->usebufpool = FALSE; /* Use bufpool if allocated, else use locally malloced rxbuf */
8490 bus->bt_use_count = 0;
8494 init_waitqueue_head(&bus->bus_sleep);
8504 if (!(bus->dhd = dhd_attach(osh, bus, SDPCM_RESERVE))) {
8520 if (bus->intr) {
8538 bus->dhd->hang_report = TRUE;
8540 if ((ret = dhd_bus_start(bus->dhd)) != 0) {
8550 get_random_bytes(&bus->dhd->mac.octet[3], 3);
8552 bus->dhd->mac.octet[0] = 0;
8553 bus->dhd->mac.octet[1] = 0x90;
8554 bus->dhd->mac.octet[2] = 0x4C;
8558 * based upon dhd_download_fw_on_driverload check, so
8564 dhdsdio_bus_usr_cnt_inc(bus->dhd);
8567 /* Ok, have the per-port tell the stack we're open for business */
8568 if (dhd_attach_net(bus->dhd, TRUE) != 0)
8575 bcmsdh_reg_write(bus->sdh, 0x18000620, 2, 11);
8576 bcmsdh_reg_write(bus->sdh, 0x18000628, 4, 0x00F80001);
8616 bus->alp_only = TRUE;
8617 bus->sih = NULL;
8623 bus->secureboot = TRUE;
8627 bus->chipidpresent = true;
8633 bus->secureboot = TRUE;
8637 bus->chipidpresent = true;
8641 if (bus->secureboot) {
8651 if (bus->chipidpresent) {
8653 bus->regs = si_get_sdio_addrbase(sdh);
8662 if (bus->chipidpresent) {
8664 (unsigned long)&bus->regs->chipid, R_REG(osh, &bus->regs->chipid)));
8667 bcmsdh_reg_read(bus->sdh, si_enum_base(devid), 4)));
8671 #ifndef BCMSPI /* wake-wlan in gSPI will bring up the htavail/alpavail clocks. */
8706 bus->blocksize = 0;
8767 bus->blocksize = 0;
8803 while (fn-- > 0) {
8818 if (!(bus->sih = si_attach((uint)devid, osh, regsva, DHD_BUS, sdh,
8819 &bus->vars, &bus->varsz))) {
8826 bus->sih->socitype, bus->sih->chip, bus->sih->chiprev, bus->sih->chippkg));
8830 bus->chipmodule = sd_chip_module;
8833 bcmsdh_chipinfo(sdh, bus->sih->chip, bus->sih->chiprev);
8835 if (!dhdsdio_chipmatch((uint16)bus->sih->chip)) {
8837 __FUNCTION__, bus->sih->chip));
8841 if (bus->sih->buscorerev >= 12)
8844 bus->kso = TRUE;
8846 si_sdiod_drive_strength_init(bus->sih, osh, dhd_sdiod_drive_strength);
8850 if ((si_setcore(bus->sih, ARM7S_CORE_ID, 0)) ||
8851 (si_setcore(bus->sih, ARMCM3_CORE_ID, 0)) ||
8852 (si_setcore(bus->sih, ARMCR4_CORE_ID, 0))) {
8853 bus->armrev = si_corerev(bus->sih);
8859 if (!si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) {
8860 if (!(bus->orig_ramsize = si_socram_size(bus->sih))) {
8866 if (!(bus->orig_ramsize = si_tcm_size(bus->sih))) {
8867 DHD_ERROR(("%s: failed to find CR4-TCM memory!\n", __FUNCTION__));
8871 switch ((uint16)bus->sih->chip) {
8874 bus->dongle_ram_base = CR4_4335_RAM_BASE;
8879 bus->dongle_ram_base = CR4_4350_RAM_BASE;
8882 bus->dongle_ram_base = CR4_4360_RAM_BASE;
8885 bus->dongle_ram_base = (bus->sih->chiprev < 6) /* from 4345C0 */
8889 /* RAM based changed from 4349c0(revid=9) onwards */
8890 bus->dongle_ram_base = ((bus->sih->chiprev < 9) ?
8894 bus->dongle_ram_base = CR4_4373_RAM_BASE;
8896 * Underflow issue during Bi-Directional Traffic
8910 bus->dongle_ram_base = CR4_4364_RAM_BASE;
8913 bus->dongle_ram_base = CR4_4362_RAM_BASE;
8916 bus->dongle_ram_base = CR4_43751_RAM_BASE;
8919 bus->dongle_ram_base = CR4_4369_RAM_BASE;
8922 bus->dongle_ram_base = CR4_55500_RAM_BASE;
8925 bus->dongle_ram_base = CR4_55560_RAM_BASE;
8929 bus->dongle_ram_base = CR4_4378_RAM_BASE;
8933 bus->dongle_ram_base = 0;
8935 __FUNCTION__, bus->dongle_ram_base));
8939 /* 55560, Dedicated space for TCAM patching and TRX Hader at RAMBASE */
8940 /* TCAM Patching - 2048[2K], TRX Header - 32Bytes */
8941 if (bus->sih->chip == CYW55500_CHIP_ID) {
8942 bus->orig_ramsize -= (CR4_55500_TCAM_SZ + CR4_55500_TRX_HDR_SZ);
8943 } else if (bus->sih->chip == CYW55560_CHIP_ID) {
8944 bus->orig_ramsize -= (CR4_55560_TCAM_SZ + CR4_55560_TRX_HDR_SZ);
8947 bus->ramsize = bus->orig_ramsize;
8952 bus->ramsize, bus->orig_ramsize, bus->dongle_ram_base));
8954 bus->srmemsize = si_socram_srmem_size(bus->sih);
8959 if (!(bus->regs = si_setcore(bus->sih, CC_CORE_ID, 0))) {
8964 if (!(bus->regs = si_setcore(bus->sih, PCMCIA_CORE_ID, 0)) &&
8965 !(bus->regs = si_setcore(bus->sih, SDIOD_CORE_ID, 0))) {
8970 bus->sdpcmrev = si_corerev(bus->sih);
8973 OR_REG(osh, &bus->regs->corecontrol, CC_BPRESEN);
8975 bus->rxint_mode = SDIO_DEVICE_HMB_RXINT;
8977 if ((bus->sih->buscoretype == SDIOD_CORE_ID) && (bus->sdpcmrev >= 4) &&
8978 (bus->rxint_mode == SDIO_DEVICE_RXDATAINT_MODE_1))
8982 val = R_REG(osh, &bus->regs->corecontrol);
8985 W_REG(osh, &bus->regs->corecontrol, val);
8989 pktq_init(&bus->txq, (PRIOMASK + 1), QLEN);
8991 /* Locate an appropriately-aligned portion of hdrbuf */
8992 bus->rxhdr = (uint8 *)ROUNDUP((uintptr)&bus->hdrbuf[0], DHD_SDALIGN);
8995 bus->intr = (bool)dhd_intr;
8996 if ((bus->poll = (bool)dhd_poll))
8997 bus->pollrate = 1;
9000 bus->txglomsize = SDPCM_DEFGLOM_SIZE;
9005 if (bus->sih != NULL) {
9006 si_detach(bus->sih);
9007 bus->sih = NULL;
9017 if (bus->dhd->maxctl) {
9018 bus->rxblen = ROUNDUP((bus->dhd->maxctl+SDPCM_HDRLEN), ALIGNMENT) + DHD_SDALIGN;
9019 if (!(bus->rxbuf = DHD_OS_PREALLOC(bus->dhd, DHD_PREALLOC_RXBUF, bus->rxblen))) {
9020 DHD_ERROR(("%s: MALLOC of %d-byte rxbuf failed\n",
9021 __FUNCTION__, bus->rxblen));
9026 if (!(bus->databuf = DHD_OS_PREALLOC(bus->dhd, DHD_PREALLOC_DATABUF, MAX_DATA_BUF))) {
9027 DHD_ERROR(("%s: MALLOC of %d-byte databuf failed\n",
9030 if (!bus->rxblen)
9031 DHD_OS_PREFREE(bus->dhd, bus->rxbuf, bus->rxblen);
9036 bus->membuf = MALLOC(osh, MAX_MEM_BUF);
9037 if (bus->membuf == NULL) {
9038 DHD_ERROR(("%s: MALLOC of %d-byte membuf failed\n", __FUNCTION__, MAX_MEM_BUF));
9039 if (bus->databuf) {
9041 MFREE(osh, bus->databuf, MAX_DATA_BUF);
9043 bus->databuf = NULL;
9045 if (!bus->rxblen)
9046 DHD_OS_PREFREE(bus->dhd, bus->rxbuf, bus->rxblen);
9049 memset(bus->membuf, 0, MAX_MEM_BUF);
9053 if ((uintptr)bus->databuf % DHD_SDALIGN)
9054 bus->dataptr = bus->databuf + (DHD_SDALIGN - ((uintptr)bus->databuf % DHD_SDALIGN));
9056 bus->dataptr = bus->databuf;
9071 bus->_srenab = FALSE;
9083 bus->dhd->busstate = DHD_BUS_DOWN;
9084 bus->sleeping = FALSE;
9085 bus->rxflow = FALSE;
9086 bus->prev_rxlim_hit = 0;
9089 /* Done with backplane-dependent accesses, can drop clock... */
9094 bus->clkstate = CLK_SDONLY;
9095 bus->idletime = (int32)dhd_idletime;
9096 bus->idleclock = DHD_IDLE_ACTIVE;
9100 &bus->sd_divisor, sizeof(int32), FALSE) != BCME_OK) {
9102 bus->sd_divisor = -1;
9105 __FUNCTION__, "sd_divisor", bus->sd_divisor));
9110 &bus->sd_mode, sizeof(int32), FALSE) != BCME_OK) {
9112 bus->sd_mode = -1;
9115 __FUNCTION__, "sd_mode", bus->sd_mode));
9121 &bus->blocksize, sizeof(int32), FALSE) != BCME_OK) {
9122 bus->blocksize = 0;
9126 __FUNCTION__, fnum, "sd_blocksize", bus->blocksize));
9130 bus->roundup = MIN(max_roundup, bus->blocksize);
9133 if (bus->pad_pkt)
9134 PKTFREE(osh, bus->pad_pkt, FALSE);
9135 bus->pad_pkt = PKTGET(osh, SDIO_MAX_BLOCK_SIZE, FALSE);
9136 if (bus->pad_pkt == NULL)
9140 uintptr pktprt = (uintptr)PKTDATA(osh, bus->pad_pkt);
9142 PKTPUSH(osh, bus->pad_pkt, alignment_offset);
9143 PKTSETNEXT(osh, bus->pad_pkt, NULL);
9149 &bus->sd_rxchain, sizeof(int32), FALSE) != BCME_OK) {
9150 bus->sd_rxchain = FALSE;
9153 __FUNCTION__, (bus->sd_rxchain ? "supports" : "does not support")));
9155 bus->use_rxchain = (bool)bus->sd_rxchain;
9156 bus->txinrx_thres = CUSTOM_TXINRX_THRES;
9158 bus->dotxinrx = TRUE;
9169 bus->fw_path = pfw_path;
9170 bus->nv_path = pnv_path;
9172 ret = dhdsdio_download_firmware(bus, osh, bus->sdh);
9176 if (((bus->sih->chip == BCM4329_CHIP_ID) && (bus->sih->chiprev > 1)) ||
9177 (bus->sih->chip == BCM43430_CHIP_ID)) {
9178 bcmsdh_dwordmode(bus->sdh, TRUE);
9179 bus->dwordmode = TRUE;
9193 if (concate_revision(bus, bus->fw_path, bus->nv_path) != 0) {
9201 dhd_set_blob_support(bus->dhd, bus->fw_path);
9205 __FUNCTION__, bus->fw_path, bus->nv_path));
9206 DHD_OS_WAKE_LOCK(bus->dhd);
9215 DHD_OS_WAKE_UNLOCK(bus->dhd);
9229 if (bus->dhd) {
9233 dongle_isolation = bus->dhd->dongle_isolation;
9234 dhd_detach(bus->dhd);
9237 /* De-register interrupt handler */
9238 bcmsdh_intr_disable(bus->sdh);
9239 bcmsdh_intr_dereg(bus->sdh);
9241 if (bus->dhd) {
9243 dhd_free(bus->dhd);
9244 bus->dhd = NULL;
9250 if (bus->console.buf != NULL)
9251 MFREE(osh, bus->console.buf, bus->console.bufsize);
9255 if (bus->pad_pkt)
9256 PKTFREE(osh, bus->pad_pkt, FALSE);
9270 if (bus->dhd && bus->dhd->dongle_reset)
9273 if (bus->rxbuf) {
9275 MFREE(osh, bus->rxbuf, bus->rxblen);
9277 bus->rxctl = bus->rxbuf = NULL;
9278 bus->rxlen = 0;
9281 if (bus->databuf) {
9283 MFREE(osh, bus->databuf, MAX_DATA_BUF);
9285 bus->databuf = NULL;
9289 if (bus->membuf) {
9290 MFREE(osh, bus->membuf, MAX_MEM_BUF);
9291 bus->membuf = NULL;
9295 if (bus->vars && bus->varsz) {
9296 MFREE(osh, bus->vars, bus->varsz);
9297 bus->vars = NULL;
9309 DHD_TRACE(("%s: Enter bus->dhd %p bus->dhd->dongle_reset %d \n", __FUNCTION__,
9310 bus->dhd, bus->dhd->dongle_reset));
9312 if ((bus->dhd && bus->dhd->dongle_reset) && reset_flag)
9315 if (bus->sih) {
9319 if (bus->dhd) {
9323 if (bus->secureboot) {
9325 * CYW555x0 - As part of watchdog reset, ARM gets
9338 if (bus->chipidpresent) {
9345 cardctl = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0,
9349 bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0,
9354 bcmerror = bcmsdh_abort(bus->sdh, SDIO_FUNC_0 | 0x8);
9359 si_watchdog(bus->sih, 4);
9364 if (bus->dhd) {
9367 si_detach(bus->sih);
9368 bus->sih = NULL;
9369 if (bus->vars && bus->varsz)
9370 MFREE(osh, bus->vars, bus->varsz);
9371 bus->vars = NULL;
9394 ASSERT(bus->dhd);
9396 dhdsdio_advertise_bus_cleanup(bus->dhd);
9397 dhdsdio_release(bus, bus->dhd->osh);
9420 if (bus->dhd == NULL) {
9424 if (bus->dhd->prot == NULL) {
9429 if (bus->dhd->up == FALSE) {
9433 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
9434 if (bus->dhd->busstate != DHD_BUS_DATA && bus->dhd->busstate != DHD_BUS_SUSPEND) {
9436 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
9439 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
9440 if (bus->dhd->dongle_reset) {
9442 return -EIO;
9445 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
9447 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, ON);
9448 bus->dhd->busstate = DHD_BUS_SUSPEND;
9449 if (DHD_BUS_BUSY_CHECK_IN_TX(bus->dhd)) {
9451 bus->dhd->busstate = DHD_BUS_DATA;
9453 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, OFF);
9454 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
9455 return -EBUSY;
9457 DHD_BUS_BUSY_SET_SUSPEND_IN_PROGRESS(bus->dhd);
9458 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
9461 if (bus->idletime > 0) {
9462 wait_time = msecs_to_jiffies(bus->idletime * dhd_watchdog_ms);
9465 ret = dhd_os_check_wakelock(bus->dhd);
9467 if ((!ret) && (bus->dhd->up) && (bus->dhd->op_mode != DHD_FLAG_HOSTAP_MODE)) {
9468 if (wait_event_timeout(bus->bus_sleep, bus->sleeping, wait_time) == 0) {
9469 if (!bus->sleeping) {
9476 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
9478 bus->dhd->busstate = DHD_BUS_DATA;
9480 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, OFF);
9482 DHD_BUS_BUSY_CLEAR_SUSPEND_IN_PROGRESS(bus->dhd);
9483 dhd_os_busbusy_wake(bus->dhd);
9484 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
9496 if (bus->dhd->up == FALSE) {
9500 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
9501 DHD_BUS_BUSY_SET_RESUME_IN_PROGRESS(bus->dhd);
9502 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
9505 if (dhd_os_check_if_up(bus->dhd))
9506 bcmsdh_oob_intr_set(bus->sdh, TRUE);
9509 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
9510 DHD_BUS_BUSY_CLEAR_RESUME_IN_PROGRESS(bus->dhd);
9511 bus->dhd->busstate = DHD_BUS_DATA;
9512 dhd_os_busbusy_wake(bus->dhd);
9514 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, OFF);
9515 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
9564 int bcmerror = -1;
9579 image = dhd_os_open_image1(bus->dhd, pfw_path);
9588 memptr = memblock = MALLOC(bus->dhd->osh, memblock_size + DHD_SDALIGN);
9595 memptr += (DHD_SDALIGN - ((uint32)(uintptr)memblock % DHD_SDALIGN));
9609 if (si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) {
9613 bus->resetinstr = *(((uint32*)memptr));
9615 offset += bus->dongle_ram_base;
9623 if (trx_hdr->magic == TRX_MAGIC) {
9625 offset -= sizeof(struct trx_header);
9644 firmware_sz, jiffies_to_msecs(jiffies - initial_jiffies)));
9649 MFREE(bus->dhd->osh, memblock, memblock_size + DHD_SDALIGN);
9652 dhd_os_close_image1(bus->dhd, image);
9664 switch ((uint16)bus->sih->chip) {
9679 int bcmerror = -1;
9695 image = dhd_os_open_image1(bus->dhd, ucode_path);
9703 memptr = memblock = MALLOC(bus->dhd->osh, memblock_size + DHD_SDALIGN);
9710 memptr += (DHD_SDALIGN - ((uint32)(uintptr)memblock % DHD_SDALIGN));
9739 firmware_sz, jiffies_to_msecs(jiffies - initial_jiffies)));
9744 MFREE(bus->dhd->osh, memblock, memblock_size + DHD_SDALIGN);
9747 dhd_os_close_image1(bus->dhd, image);
9757 shaddr = bus->dongle_ram_base + bus->ramsize - 4;
9767 if (!dhd_get_ucode_path(bus->dhd)) {
9768 DHD_ERROR(("%s: bus->uc_path not set!\n", __func__));
9771 dhdsdio_download_ucode_file(bus, dhd_get_ucode_path(bus->dhd));
9785 int bcmerror = -1;
9793 pnv_path = bus->nv_path;
9799 image = dhd_os_open_image1(bus->dhd, pnv_path);
9801 memblock = MALLOC(bus->dhd->osh, MAX_NVRAMBUF_SIZE);
9816 len += 4 - (len % 4);
9834 MFREE(bus->dhd->osh, memblock, MAX_NVRAMBUF_SIZE);
9837 dhd_os_close_image1(bus->dhd, image);
9845 int bcmerror = -1;
9851 if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0')) {
9862 if ((bus->fw_path != NULL) && (bus->fw_path[0] != '\0')) {
9863 if (dhdsdio_download_code_file(bus, bus->fw_path)) {
9907 status = bcmsdh_recv_buf(bus->sdh, addr, fn, flags, buf, nbytes, pkt, complete_fn, handle);
9926 sdh = bus->sdh;
9931 ret = bcmsdh_send_buf(bus->sdh, addr, fn, flags, buf, nbytes,
9934 bus->f2txdata++;
9943 bus->tx_sderrs++;
9944 bus->f1regdata++;
9945 bus->dhd->tx_errors++;
9955 bus->f1regdata += 2;
9971 ASSERT(bus->sih != NULL);
9973 sdh = bus->sdh;
9980 ASSERT(bus->sih != NULL);
9981 return bus->sih->chip;
9988 ASSERT(bus->sih != NULL);
9989 return bus->sih->chiprev;
9995 return bus->dhd;
10001 return (void *)bus->sih;
10007 return &bus->txq;
10013 return (bus->txglom_enable) ? SDPCM_HDRLEN_TXGLOM : SDPCM_HDRLEN;
10019 bus->dotxinrx = val;
10036 dhdp->busstate = DHD_BUS_DOWN_IN_PROGRESS;
10039 timeleft = dhd_os_busbusy_wait_negation(dhdp, &dhdp->dhd_bus_busy_state);
10042 __FUNCTION__, dhdp->dhd_bus_busy_state));
10056 bus = dhdp->bus;
10059 if (!bus->dhd->dongle_reset) {
10061 dhdsdio_advertise_bus_cleanup(bus->dhd);
10067 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, ON);
10076 bcmsdh_oob_intr_set(bus->sdh, FALSE);
10077 bcmsdh_oob_intr_unregister(bus->sdh);
10081 dhdsdio_release_dongle(bus, bus->dhd->osh, TRUE, TRUE);
10083 bus->dhd->dongle_reset = TRUE;
10085 bus->dhd->up = FALSE;
10089 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
10091 bus->dhd->busstate = DHD_BUS_DOWN;
10092 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
10103 if (bus->dhd->dongle_reset) {
10106 /* Reset SD client -- required if devreset is called
10109 bcmsdh_reset(bus->sdh);
10110 /* Attempt to re-attach & download */
10111 if (dhdsdio_probe_attach(bus, bus->dhd->osh, bus->sdh,
10112 (uint32 *)(uintptr)si_enum_base(bus->cl_devid),
10113 bus->cl_devid)) {
10115 DHD_LINUX_GENERAL_LOCK(bus->dhd, flags);
10117 bus->dhd->busstate = DHD_BUS_DOWN;
10118 DHD_LINUX_GENERAL_UNLOCK(bus->dhd, flags);
10121 if (dhdsdio_probe_init(bus, bus->dhd->osh, bus->sdh) &&
10122 dhdsdio_download_firmware(bus, bus->dhd->osh, bus->sdh) >= 0) {
10124 /* Re-init bus, enable F2 transfer */
10125 bcmerror = dhd_bus_init((dhd_pub_t *) bus->dhd, FALSE);
10129 bcmsdh_oob_intr_register(bus->sdh,
10131 bcmsdh_oob_intr_set(bus->sdh, TRUE);
10134 bus->dhd->dongle_reset = FALSE;
10135 bus->dhd->up = TRUE;
10139 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, OFF);
10146 dhdsdio_release_dongle(bus, bus->dhd->osh,
10152 if (bus->sih != NULL) {
10153 si_detach(bus->sih);
10154 bus->sih = NULL;
10180 return bcmsdh_stop(dhdpub->bus->sdh);
10185 return bcmsdh_start(dhdpub->bus->sdh, stage);
10191 dhd_bus_t *bus = dhdp->bus;
10193 return bus->sih->chip;
10199 dhd_bus_t *bus = dhdp->bus;
10201 return bus->sih->chiprev;
10208 dhd_bus_t *bus = dhdp->bus;
10210 return bus->chipmodule;
10217 dhd_bus_t *bus = dhdp->bus;
10219 return bus->sih->chippkg;
10224 *bus_type = bus->bus;
10225 *bus_num = bus->bus_num;
10226 *slot_num = bus->slot_num;
10235 bus = dhdp->bus;
10252 if (bus->sih->chip != BCM4335_CHIP_ID) {
10254 return -1;
10256 chipver = bus->sih->chiprev;
10259 DHD_ERROR(("----- CHIP bcm4335_A0 -----\n"));
10262 DHD_ERROR(("----- CHIP bcm4335_B0 -----\n"));
10285 if (bus->sih->chip != BCM4339_CHIP_ID) {
10287 return -1;
10289 chipver = bus->sih->chiprev;
10292 DHD_ERROR(("----- CHIP bcm4339_A0 -----\n"));
10295 DHD_ERROR(("----- CHIP bcm4339 unknown revision %d -----\n",
10312 chip_ver = bus->sih->chiprev;
10322 DHD_ERROR(("----- CHIP 4354 A0 -----\n"));
10325 DHD_ERROR(("----- Unknown chip version, ver=%x -----\n", chip_ver));
10342 chip_ver = bus->sih->chiprev;
10344 DHD_ERROR(("----- CHIP 4354 A1 -----\n"));
10347 DHD_ERROR(("----- Unknown chip version, ver=%x -----\n", chip_ver));
10365 if (bus->sih->chip != BCM43454_CHIP_ID) {
10367 return -1;
10372 DHD_ERROR(("----- Board Rev [%d] -----\n", base_system_rev_for_nv));
10377 DHD_ERROR(("----- Rev [%d] Fot MULTIPLE Board. -----\n", system_hw_rev));
10379 DHD_ERROR(("This HW is Rev 08 ~ 11. this is For FD-HW\n"));
10393 if (!bus || !bus->sih) {
10395 return -1;
10398 switch (bus->sih->chip) {
10430 bus->fw_path = pfw_path;
10431 bus->nv_path = pnv_path;
10437 dhd_bus_t *bus = dhd->bus;
10438 sdpcmd_regs_t *regs = bus->regs;
10444 W_SDREG(SMB_USE_OOB, ®s->tosbmailbox, retries);
10456 W_SDREG(0, ®s->tosbmailboxdata, retries);
10458 W_SDREG(SMB_DEV_INT, ®s->tosbmailbox, retries);
10472 dhd_bus_t *bus = dhdp->bus;
10483 dhd_tcpack_info_tbl_clean(bus->dhd);
10486 pktq_flush(dhdp->osh, &bus->txq, TRUE);
10494 dhd_bus_t *bus = dhd->bus;
10496 if (!bus->_srenab)
10497 return -1;
10505 dhd_bus_t *bus = dhd->bus;
10507 if (bus && bus->sih)
10508 return (uint16)bus->sih->chip;
10520 dhd_os_sdlock(bus->dhd);
10526 rval = bcmsdh_reg_read(bus->sdh, addr, 4);
10528 dhd_os_sdunlock(bus->dhd);
10536 dhd_os_sdlock(bus->dhd);
10542 bcmsdh_reg_write(bus->sdh, addr, 4, val);
10544 dhd_os_sdunlock(bus->dhd);
10554 dhd_bus_t *bus = (dhd_bus_t *)dhdp->bus;
10556 dhd_os_sdlock(bus->dhd);
10558 intrd = bcmsdh_cfg_read(bus->sdh, fun_num, addr, err);
10560 dhd_os_sdunlock(bus->dhd);
10568 dhd_bus_t *bus = (dhd_bus_t *)dhdp->bus;
10570 dhd_os_sdlock(bus->dhd);
10572 bcmsdh_cfg_write(bus->sdh, fun_num, addr, val, err);
10574 dhd_os_sdunlock(bus->dhd);
10600 str_len = dhd_os_gets_image(bus->dhd, line, BTFW_MAX_STR_LEN, file);
10646 int bcm_error = -1;
10661 if ((bus->btfw_path == NULL) || (bus->btfw_path[0] == '\0')) {
10665 image = dhd_os_open_image1(bus->dhd, bus->btfw_path);
10669 mem_ptr = mem_blk = MALLOC(bus->dhd->osh, BTFW_DOWNLOAD_BLK_SIZE + DHD_SDALIGN);
10676 mem_ptr += (DHD_SDALIGN - ((uint32)(uintptr)mem_blk % DHD_SDALIGN));
10678 data_ptr = MALLOC(bus->dhd->osh, BTFW_DOWNLOAD_BLK_SIZE - 8);
10681 BTFW_DOWNLOAD_BLK_SIZE - 8));
10686 bcmsdh_reg_write(bus->sdh, bt2wlan_pwrup_adr, 4, BT2WLAN_PWRUP_WAKE);
10692 line = MALLOC(bus->dhd->osh, BTFW_MAX_STR_LEN);
10714 start_data = bcmsdh_reg_read(bus->sdh, start_addr, 4);
10728 end_data = bcmsdh_reg_read(bus->sdh, end_addr, 4);
10745 bytes_to_write = 0x1000 - offset_addr;
10757 (mem_ptr + bytes_to_write), (index - bytes_to_write));
10770 MFREE(bus->dhd->osh, mem_blk, BTFW_DOWNLOAD_BLK_SIZE + DHD_SDALIGN);
10773 MFREE(bus->dhd->osh, data_ptr, BTFW_DOWNLOAD_BLK_SIZE - 8);
10776 MFREE(bus->dhd->osh, line, BTFW_MAX_STR_LEN);
10779 dhd_os_close_image1(bus->dhd, image);
10790 __FUNCTION__, bus->btfw_path));
10791 DHD_OS_WAKE_LOCK(bus->dhd);
10792 dhd_os_sdlock(bus->dhd);
10797 dhd_os_sdunlock(bus->dhd);
10798 DHD_OS_WAKE_UNLOCK(bus->dhd);
10809 bus->btfw_path = pbtfw_path;
10811 ret = dhdsdio_download_btfw(bus, osh, bus->sdh);
10820 trap_t *tr = &bus->dhd->last_trap_info;
10827 ltoh32(tr->type), ltoh32(tr->epc), ltoh32(tr->cpsr), ltoh32(tr->spsr),
10828 ltoh32(tr->r13), ltoh32(tr->r14), ltoh32(tr->pc),
10829 ltoh32(bus->dongle_trap_addr),
10830 ltoh32(tr->r0), ltoh32(tr->r1), ltoh32(tr->r2), ltoh32(tr->r3),
10831 ltoh32(tr->r4), ltoh32(tr->r5), ltoh32(tr->r6), ltoh32(tr->r7));
10838 int ret = -1;
10840 ret = dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(((dhd_bus_t*)bus)->sdh),
10844 ((dhd_bus_t*)bus)->tx_seq = (((dhd_bus_t*)bus)->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
10853 if ((bus == NULL) || (bus->sih == NULL)) {
10858 switch (bus->sih->chip) {
10860 bcmsdh_reg_write(bus->sdh, SI_ENUM_BASE(bus->sih) + 0x618, 4, 0x3fcaf377);
10861 if (bcmsdh_regfail(bus->sdh)) {
10868 bcmsdh_reg_write(bus->sdh,
10869 si_get_pmu_reg_addr(bus->sih, OFFSETOF(pmuregs_t, min_res_mask)),
10871 if (bcmsdh_regfail(bus->sdh)) {
10889 struct dhd_bus *bus = dhdp->bus;
10890 bcmsdh_reg_write(bus->sdh, si_get_pmu_reg_addr(bus->sih,
10892 if (bcmsdh_regfail(bus->sdh)) {
10910 dhdsdio_readconsole(dhdp->bus);
10911 dhdp->dhd_console_ms = 0;
10924 bus->tx_seq = bus->rx_seq = 0;
10925 bus->tx_max = 4;
10927 if (dhd_bus_download_firmware(bus, bus->dhd->osh,
10928 bus->fw_path, bus->nv_path) >= 0) {
10930 /* Re-init bus, enable F2 transfer */
10931 bcmerror = dhd_bus_init((dhd_pub_t *) bus->dhd, FALSE);
10933 bus->dhd->up = TRUE;
10934 dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms);
10936 dhd_ulp_set_ulp_state(bus->dhd, DHD_ULP_READY);
10939 bcmsdh_oob_intr_set(bus->sdh, TRUE);
10942 /* Re-enable the console messages on FW redownload to default value */
10943 dhd_ulp_restore_console_interval(bus->dhd);
10948 dhdsdio_release_dongle(bus, bus->dhd->osh,
10962 struct dhd_bus *bus = dhdp->bus;
10965 *data = (int32)bcmsdh_reg_read(bus->sdh, addr, size);
10967 bcmsdh_reg_write(bus->sdh, addr, size, *data);
10970 if (bcmsdh_regfail(bus->sdh))
10978 return dhd->bus->idletime;
10985 return &dhd->bus->wake_counts;
10990 return bcmsdh_set_get_wake(dhd->bus->sdh, 0);