10325 	chipcregs_t *chipcregs;  in dhdpcie_sromotp_customvar()  local
10334 	chipcregs = (chipcregs_t *)si_setcore(bus->sih, CC_CORE_ID, 0);  in dhdpcie_sromotp_customvar()
10335 	ASSERT(chipcregs != NULL);  in dhdpcie_sromotp_customvar()
10352 	if (chipcregs->sromcontrol & SRC_PRESENT) {  in dhdpcie_sromotp_customvar()
10354 		sprom_size = (1 << (2 * ((chipcregs->sromcontrol & SRC_SIZE_MASK)  in dhdpcie_sromotp_customvar()
10358 	if (chipcregs->sromcontrol & SRC_OTPPRESENT) {  in dhdpcie_sromotp_customvar()
10360 		if (((chipcregs->otplayout & OTPL_WRAP_TYPE_MASK) >> OTPL_WRAP_TYPE_SHIFT)  in dhdpcie_sromotp_customvar()
10367 				otp_size = (((chipcregs->otplayout & OTPL_ROW_SIZE_MASK)  in dhdpcie_sromotp_customvar()
10371 				otp_size =  (((chipcregs->capabilities & CC_CAP_OTPSIZE)  in dhdpcie_sromotp_customvar()
10381 					otp_size = otp_size_65nm[(chipcregs->otplayout &  in dhdpcie_sromotp_customvar()
10385 					otp_size = otp_size_65nm[(chipcregs->capabilities &  in dhdpcie_sromotp_customvar()
10397 		if (((chipcregs->sromcontrol & SRC_PRESENT) == 0) &&  in dhdpcie_sromotp_customvar()
10398 				((chipcregs->otplayout & OTPL_ROW_SIZE_MASK) == 0)) {  in dhdpcie_sromotp_customvar()
10401 					__FUNCTION__, chipcregs->sromcontrol,  in dhdpcie_sromotp_customvar()
10402 					chipcregs->otplayout));  in dhdpcie_sromotp_customvar()
10406 		if (((chipcregs->sromcontrol & SRC_PRESENT) == 0) &&  in dhdpcie_sromotp_customvar()
10407 			((chipcregs->capabilities & CC_CAP_OTPSIZE) == 0)) {  in dhdpcie_sromotp_customvar()
10410 					__FUNCTION__, chipcregs->sromcontrol,  in dhdpcie_sromotp_customvar()
10411 					chipcregs->capabilities));  in dhdpcie_sromotp_customvar()
10416 	if ((!(chipcregs->sromcontrol & SRC_PRESENT) || (chipcregs->sromcontrol & SRC_OTPSEL)) &&  in dhdpcie_sromotp_customvar()
10417 			(chipcregs->sromcontrol & SRC_OTPPRESENT)) {  in dhdpcie_sromotp_customvar()
10421 	} else if (((chipcregs->sromcontrol & SRC_OTPSEL) == 0) &&  in dhdpcie_sromotp_customvar()
10422 			(chipcregs->sromcontrol & SRC_PRESENT)) {  in dhdpcie_sromotp_customvar()
10447 			nvm_shadow = chipcregs->sromotp;  in dhdpcie_sromotp_customvar()
10539 	chipcregs_t *chipcregs;  in dhdpcie_cc_nvmshadow()  local
10544 	chipcregs = (chipcregs_t *)si_setcore(bus->sih, CC_CORE_ID, 0);  in dhdpcie_cc_nvmshadow()
10545 	ASSERT(chipcregs != NULL);  in dhdpcie_cc_nvmshadow()
10565 	if (chipcregs->sromcontrol & SRC_PRESENT) {  in dhdpcie_cc_nvmshadow()
10567 		sprom_size = (1 << (2 * ((chipcregs->sromcontrol & SRC_SIZE_MASK)  in dhdpcie_cc_nvmshadow()
10572 	if (chipcregs->sromcontrol & SRC_OTPPRESENT) {  in dhdpcie_cc_nvmshadow()
10575 		if (((chipcregs->otplayout & OTPL_WRAP_TYPE_MASK) >> OTPL_WRAP_TYPE_SHIFT)  in dhdpcie_cc_nvmshadow()
10582 				otp_size = (((chipcregs->otplayout & OTPL_ROW_SIZE_MASK)  in dhdpcie_cc_nvmshadow()
10586 				otp_size =  (((chipcregs->capabilities & CC_CAP_OTPSIZE)  in dhdpcie_cc_nvmshadow()
10596 				otp_size = otp_size_65nm[(chipcregs->otplayout & OTPL_ROW_SIZE_MASK)  in dhdpcie_cc_nvmshadow()
10600 				otp_size = otp_size_65nm[(chipcregs->capabilities & CC_CAP_OTPSIZE)  in dhdpcie_cc_nvmshadow()
10613 		if (((chipcregs->sromcontrol & SRC_PRESENT) == 0) &&  in dhdpcie_cc_nvmshadow()
10614 			((chipcregs->otplayout & OTPL_ROW_SIZE_MASK) == 0)) {  in dhdpcie_cc_nvmshadow()
10617 				__FUNCTION__, chipcregs->sromcontrol, chipcregs->otplayout));  in dhdpcie_cc_nvmshadow()
10621 		if (((chipcregs->sromcontrol & SRC_PRESENT) == 0) &&  in dhdpcie_cc_nvmshadow()
10622 			((chipcregs->capabilities & CC_CAP_OTPSIZE) == 0)) {  in dhdpcie_cc_nvmshadow()
10625 				__FUNCTION__, chipcregs->sromcontrol, chipcregs->capabilities));  in dhdpcie_cc_nvmshadow()
10631 	if ((!(chipcregs->sromcontrol & SRC_PRESENT) || (chipcregs->sromcontrol & SRC_OTPSEL)) &&  in dhdpcie_cc_nvmshadow()
10632 		(chipcregs->sromcontrol & SRC_OTPPRESENT)) {  in dhdpcie_cc_nvmshadow()
10639 	} else if (((chipcregs->sromcontrol & SRC_OTPSEL) == 0) &&  in dhdpcie_cc_nvmshadow()
10640 		(chipcregs->sromcontrol & SRC_PRESENT)) {  in dhdpcie_cc_nvmshadow()
10670 			nvm_shadow = chipcregs->sromotp;  in dhdpcie_cc_nvmshadow()
11699 		chipcregs_t *chipcregs;  in dhdpcie_get_sssr_dig_dump()  local
11705 		chipcregs = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0);  in dhdpcie_get_sssr_dig_dump()
11710 			W_REG(si_osh(sih), &chipcregs->sr_memrw_addr, 0);  in dhdpcie_get_sssr_dig_dump()
11714 				buf[i] = R_REG(si_osh(sih), &chipcregs->sr_memrw_data);  in dhdpcie_get_sssr_dig_dump()