drivers/infineon/dhd_msgbuf.c

7283 	dmaxref_mem_map_t *dmap = NULL;  local
7285 	dmap = MALLOCZ(dhdp->osh, sizeof(dmaxref_mem_map_t));
7286 	if (!dmap) {
7290 	dmap->srcmem = &(dmaxfer->srcmem);
7291 	dmap->dstmem = &(dmaxfer->dstmem);
7293 	DMAXFER_FREE(dhdp, dmap);
7297 	if (dmap) {
7298 		MFREE(dhdp->osh, dmap, sizeof(dmaxref_mem_map_t));
7299 		dmap = NULL;
7462 	pcie_dma_xfer_params_t *dmap;  local
7488 	dmap = (pcie_dma_xfer_params_t *)
7491 	if (dmap == NULL) {
7499 	dmap->cmn_hdr.msg_type = MSG_TYPE_LPBK_DMAXFER;
7500 	dmap->cmn_hdr.request_id = htol32(DHD_FAKE_PKTID);
7501 	dmap->cmn_hdr.epoch = ring->seqnum % H2D_EPOCH_MODULO;
7502 	dmap->cmn_hdr.flags = ring->current_phase;
7505 	dmap->host_input_buf_addr.high = htol32(PHYSADDRHI(prot->dmaxfer.srcmem.pa));
7506 	dmap->host_input_buf_addr.low = htol32(PHYSADDRLO(prot->dmaxfer.srcmem.pa));
7507 	dmap->host_ouput_buf_addr.high = htol32(PHYSADDRHI(prot->dmaxfer.dstmem.pa));
7508 	dmap->host_ouput_buf_addr.low = htol32(PHYSADDRLO(prot->dmaxfer.dstmem.pa));
7509 	dmap->xfer_len = htol32(prot->dmaxfer.len);
7510 	dmap->srcdelay = htol32(prot->dmaxfer.srcdelay);
7511 	dmap->destdelay = htol32(prot->dmaxfer.destdelay);
7513 	dmap->flags = (((core_num & PCIE_DMA_XFER_FLG_CORE_NUMBER_MASK)
7520 	dhd_prot_ring_write_complete(dhd, ring, dmap, 1);