Lines Matching +full:1 +full:- +full:sd
6 * Copyright (C) 1999-2017, Broadcom Corporation
27 * <<Broadcom-WL-IPTag/Open:>>
29 * $Id: bcmsdstd.c 700323 2017-05-18 16:12:11Z $
47 #define SD_PAGE (1 << SD_PAGE_BITS)
51 * Upper GPIO 16 - 31 are available on J22
53 * Lower GPIO 0 - 15 are available on J15 (WL_GPIO)
65 uint sd_hiok = TRUE; /* Use hi-speed mode if available? */
72 /* sd3ClkMode: 0-SDR12 [25MHz]
73 * 1-SDR25 [50MHz]+SHS=1
74 * 2-SDR50 [100MHz]+SSDR50=1
75 * 3-SDR104 [208MHz]+SSDR104=1
76 * 4-DDR50 [50MHz]+SDDR50=1
79 #define SD3CLKMODE_1_SDR25 (1)
83 #define SD3CLKMODE_DISABLED (-1)
88 #define HOST_SDR_12_25 (1)
91 /* depends-on/affects sd3_autoselect_uhsi_max.
112 char DTS_vals[MAX_DTS_INDEX + 1] = {
113 0x1, /* Driver Strength Type-A */
114 0x0, /* Driver Strength Type-B */
115 0x2, /* Driver Strength Type-C */
116 0x3, /* Driver Strength Type-D */
122 /* (150+10)millisecs total time; so dividing it for per-loop */
124 #define CLKTUNING_MAX_BRR_RETRIES (1000) /* 1 ms: 1000 retries with 1 us delay per loop */
147 * SDCLKFreqSel: 2 [division: 1*2 = 2: ~100 MHz]
150 SDCLKFreqSel: 1 [no division: ~255/~208 MHz]
158 For override [1]: Preset registers: not supported
169 #define SD3_TUNING_REQD(sd, sd_uhsimode) ((sd_uhsimode != SD3CLKMODE_DISABLED) && \ argument
170 (sd->version == HOST_CONTR_VER_3) && \
173 (GFIELD(sd->caps3, CAP3_TUNING_SDR50)))))
176 #define NEXT_POW2(n) {n--; n |= n>>1; n |= n>>2; n |= n>>4; n++;}
187 #define SDSTD_WAIT_TIME_MS 1
194 uint sd_power = 1; /* Default to SD Slot powered ON */
195 uint sd_3_power_save = 1; /* Default to SDIO 3.0 power save */
196 uint sd_clock = 1; /* Default to SD Clock turned ON */
206 static bool sdstd_start_clock(sdioh_info_t *sd, uint16 divisor);
207 static uint16 sdstd_start_power(sdioh_info_t *sd, int volts_req);
208 static bool sdstd_bus_width(sdioh_info_t *sd, int width);
209 static int sdstd_set_highspeed_mode(sdioh_info_t *sd, bool HSMode);
210 static int sdstd_set_dma_mode(sdioh_info_t *sd, int8 dma_mode);
211 static int sdstd_card_enablefuncs(sdioh_info_t *sd);
212 static void sdstd_cmd_getrsp(sdioh_info_t *sd, uint32 *rsp_buffer, int count);
213 static int sdstd_cmd_issue(sdioh_info_t *sd, bool use_dma, uint32 cmd, uint32 arg);
214 static int sdstd_card_regread(sdioh_info_t *sd, int func, uint32 regaddr,
216 static int sdstd_card_regwrite(sdioh_info_t *sd, int func, uint32 regaddr,
218 static int sdstd_driver_init(sdioh_info_t *sd);
219 static bool sdstd_reset(sdioh_info_t *sd, bool host_reset, bool client_reset);
220 static int sdstd_card_buf(sdioh_info_t *sd, int rw, int func, bool fifo,
222 static int sdstd_abort(sdioh_info_t *sd, uint func);
224 static int set_client_block_size(sdioh_info_t *sd, int func, int blocksize);
225 static void sd_map_dma(sdioh_info_t * sd);
226 static void sd_unmap_dma(sdioh_info_t * sd);
227 static void sd_clear_adma_dscr_buf(sdioh_info_t *sd);
228 static void sd_fill_dma_data_buf(sdioh_info_t *sd, uint8 data);
229 static void sd_create_adma_descriptor(sdioh_info_t *sd,
232 static void sd_dump_adma_dscr(sdioh_info_t *sd);
233 static void sdstd_dumpregs(sdioh_info_t *sd);
235 static int sdstd_3_set_highspeed_uhsi_mode(sdioh_info_t *sd, int sd3ClkMode);
236 static int sdstd_3_sigvoltswitch_proc(sdioh_info_t *sd);
237 static int sdstd_3_get_matching_uhsi_clkmode(sdioh_info_t *sd,
239 static bool sdstd_3_get_matching_drvstrn(sdioh_info_t *sd,
241 static int sdstd_3_clock_wrapper(sdioh_info_t *sd);
242 static int sdstd_clock_wrapper(sdioh_info_t *sd);
250 extern uint16 sdstd_rreg16(sdioh_info_t *sd, uint reg);
252 sdstd_rreg16(sdioh_info_t *sd, uint reg) in sdstd_rreg16() argument
255 volatile uint16 data = *(volatile uint16 *)(sd->mem_space + reg); in sdstd_rreg16()
260 extern void sdstd_wreg16(sdioh_info_t *sd, uint reg, uint16 data);
262 sdstd_wreg16(sdioh_info_t *sd, uint reg, uint16 data) in sdstd_wreg16() argument
264 *(volatile uint16 *)(sd->mem_space + reg) = (uint16) data; in sdstd_wreg16()
269 sdstd_or_reg16(sdioh_info_t *sd, uint reg, uint16 val) in sdstd_or_reg16() argument
271 volatile uint16 data = *(volatile uint16 *)(sd->mem_space + reg); in sdstd_or_reg16()
274 *(volatile uint16 *)(sd->mem_space + reg) = (uint16)data; in sdstd_or_reg16()
278 sdstd_mod_reg16(sdioh_info_t *sd, uint reg, int16 mask, uint16 val) in sdstd_mod_reg16() argument
281 volatile uint16 data = *(volatile uint16 *)(sd->mem_space + reg); in sdstd_mod_reg16()
285 *(volatile uint16 *)(sd->mem_space + reg) = (uint16)data; in sdstd_mod_reg16()
290 sdstd_rreg(sdioh_info_t *sd, uint reg) in sdstd_rreg() argument
292 volatile uint32 data = *(volatile uint32 *)(sd->mem_space + reg); in sdstd_rreg()
297 sdstd_wreg(sdioh_info_t *sd, uint reg, uint32 data) in sdstd_wreg() argument
299 *(volatile uint32 *)(sd->mem_space + reg) = (uint32)data; in sdstd_wreg()
306 sdstd_wreg8(sdioh_info_t *sd, uint reg, uint8 data) in sdstd_wreg8() argument
308 *(volatile uint8 *)(sd->mem_space + reg) = (uint8)data; in sdstd_wreg8()
312 sdstd_rreg8(sdioh_info_t *sd, uint reg) in sdstd_rreg8() argument
314 volatile uint8 data = *(volatile uint8 *)(sd->mem_space + reg); in sdstd_rreg8()
331 sdioh_info_t *sd; in sdioh_attach() local
334 if ((sd = (sdioh_info_t *)MALLOC(osh, sizeof(sdioh_info_t))) == NULL) { in sdioh_attach()
338 bzero((char *)sd, sizeof(sdioh_info_t)); in sdioh_attach()
339 glob_sd = sd; in sdioh_attach()
340 sd->osh = osh; in sdioh_attach()
341 if (sdstd_osinit(sd) != 0) { in sdioh_attach()
343 MFREE(sd->osh, sd, sizeof(sdioh_info_t)); in sdioh_attach()
346 sd->mem_space = (volatile char *)sdstd_reg_map(osh, (ulong)bar0, SDIOH_REG_WINSZ); in sdioh_attach()
347 sd_init_dma(sd); in sdioh_attach()
348 sd->irq = irq; in sdioh_attach()
349 if (sd->mem_space == NULL) { in sdioh_attach()
351 sdstd_osfree(sd); in sdioh_attach()
352 MFREE(sd->osh, sd, sizeof(sdioh_info_t)); in sdioh_attach()
355 sd_info(("%s:sd->mem_space = %p\n", __FUNCTION__, sd->mem_space)); in sdioh_attach()
356 sd->intr_handler = NULL; in sdioh_attach()
357 sd->intr_handler_arg = NULL; in sdioh_attach()
358 sd->intr_handler_valid = FALSE; in sdioh_attach()
361 sd->sd_blockmode = TRUE; in sdioh_attach()
362 sd->use_client_ints = TRUE; in sdioh_attach()
363 sd->sd_dma_mode = sd_dma_mode; in sdioh_attach()
365 if (!sd->sd_blockmode) in sdioh_attach()
366 sd->sd_dma_mode = DMA_MODE_NONE; in sdioh_attach()
368 if (sdstd_driver_init(sd) != SUCCESS) { in sdioh_attach()
369 /* If host CPU was reset without resetting SD bus or in sdioh_attach()
370 SD device, the device will still have its RCA but in sdioh_attach()
374 sd_info(("driver_init failed - Reset RCA and try again\n")); in sdioh_attach()
375 if (sdstd_driver_init(sd) != SUCCESS) { in sdioh_attach()
377 if (sd->mem_space) { in sdioh_attach()
378 sdstd_reg_unmap(osh, (ulong)sd->mem_space, SDIOH_REG_WINSZ); in sdioh_attach()
379 sd->mem_space = NULL; in sdioh_attach()
381 sdstd_osfree(sd); in sdioh_attach()
382 MFREE(sd->osh, sd, sizeof(sdioh_info_t)); in sdioh_attach()
390 sd_map_dma(sd); in sdioh_attach()
392 if (sdstd_register_irq(sd, irq) != SUCCESS) { in sdioh_attach()
394 sdstd_free_irq(sd->irq, sd); in sdioh_attach()
395 if (sd->mem_space) { in sdioh_attach()
396 sdstd_reg_unmap(osh, (ulong)sd->mem_space, SDIOH_REG_WINSZ); in sdioh_attach()
397 sd->mem_space = NULL; in sdioh_attach()
400 sdstd_osfree(sd); in sdioh_attach()
401 MFREE(sd->osh, sd, sizeof(sdioh_info_t)); in sdioh_attach()
406 return sd; in sdioh_attach()
410 sdioh_detach(osl_t *osh, sdioh_info_t *sd) in sdioh_detach() argument
413 if (sd) { in sdioh_detach()
414 sd_unmap_dma(sd); in sdioh_detach()
415 sdstd_wreg16(sd, SD_IntrSignalEnable, 0); in sdioh_detach()
416 if (sd->sd3_tuning_reqd == TRUE) { in sdioh_detach()
417 sdstd_3_osclean_tuning(sd); in sdioh_detach()
418 sd->sd3_tuning_reqd = FALSE; in sdioh_detach()
420 sd->sd3_tuning_disable = FALSE; in sdioh_detach()
421 sd_trace(("%s: freeing irq %d\n", __FUNCTION__, sd->irq)); in sdioh_detach()
422 sdstd_free_irq(sd->irq, sd); in sdioh_detach()
423 if (sd->card_init_done) in sdioh_detach()
424 sdstd_reset(sd, 1, 1); in sdioh_detach()
425 if (sd->mem_space) { in sdioh_detach()
426 sdstd_reg_unmap(osh, (ulong)sd->mem_space, SDIOH_REG_WINSZ); in sdioh_detach()
427 sd->mem_space = NULL; in sdioh_detach()
430 sdstd_osfree(sd); in sdioh_detach()
431 MFREE(sd->osh, sd, sizeof(sdioh_info_t)); in sdioh_detach()
438 sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh) in sdioh_interrupt_register() argument
441 sd->intr_handler = fn; in sdioh_interrupt_register()
442 sd->intr_handler_arg = argh; in sdioh_interrupt_register()
443 sd->intr_handler_valid = TRUE; in sdioh_interrupt_register()
448 sdioh_interrupt_deregister(sdioh_info_t *sd) in sdioh_interrupt_deregister() argument
451 sd->intr_handler_valid = FALSE; in sdioh_interrupt_deregister()
452 sd->intr_handler = NULL; in sdioh_interrupt_deregister()
453 sd->intr_handler_arg = NULL; in sdioh_interrupt_deregister()
458 sdioh_interrupt_query(sdioh_info_t *sd, bool *onoff) in sdioh_interrupt_query() argument
461 *onoff = sd->client_intr_enabled; in sdioh_interrupt_query()
467 sdioh_interrupt_pending(sdioh_info_t *sd) in sdioh_interrupt_pending() argument
470 intrstatus = sdstd_rreg16(sd, SD_IntrStatus); in sdioh_interrupt_pending()
476 sdioh_query_iofnum(sdioh_info_t *sd) in sdioh_query_iofnum() argument
478 return sd->num_funcs; in sdioh_query_iofnum()
483 IOV_MSGLEVEL = 1,
534 uint8 sdstd_turn_on_clock(sdioh_info_t *sd) in sdstd_turn_on_clock() argument
536 sdstd_or_reg16(sd, SD_ClockCntrl, 0x4); in sdstd_turn_on_clock()
540 uint8 sdstd_turn_off_clock(sdioh_info_t *sd) in sdstd_turn_off_clock() argument
542 sdstd_wreg16(sd, SD_ClockCntrl, sdstd_rreg16(sd, SD_ClockCntrl) & ~((uint16)0x4)); in sdstd_turn_off_clock()
580 if (vi->type == IOVT_VOID) in sdioh_iovar_op()
582 else if (vi->type == IOVT_BUFFER) in sdioh_iovar_op()
593 actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid); in sdioh_iovar_op()
605 int_val = (int32)si->sd_blockmode; in sdioh_iovar_op()
610 si->sd_blockmode = (bool)int_val; in sdioh_iovar_op()
611 /* Haven't figured out how to make non-block mode with DMA */ in sdioh_iovar_op()
612 if (!si->sd_blockmode) in sdioh_iovar_op()
613 si->sd_dma_mode = DMA_MODE_NONE; in sdioh_iovar_op()
646 if ((uint32)int_val > si->num_funcs) { in sdioh_iovar_op()
650 int_val = (int32)si->client_block_size[int_val]; in sdioh_iovar_op()
659 if (func > si->num_funcs) { in sdioh_iovar_op()
672 int_val = (int32)si->sd_dma_mode; in sdioh_iovar_op()
677 si->sd_dma_mode = (char)int_val; in sdioh_iovar_op()
678 sdstd_set_dma_mode(si, si->sd_dma_mode); in sdioh_iovar_op()
682 int_val = (int32)si->use_client_ints; in sdioh_iovar_op()
687 si->use_client_ints = (bool)int_val; in sdioh_iovar_op()
688 if (si->use_client_ints) in sdioh_iovar_op()
689 si->intmask |= CLIENT_INTR; in sdioh_iovar_op()
691 si->intmask &= ~CLIENT_INTR; in sdioh_iovar_op()
719 if (sd_power == 1) { in sdioh_iovar_op()
721 sd_err(("set SD Slot power failed!\n")); in sdioh_iovar_op()
724 sd_err(("SD Slot Powered ON.\n")); in sdioh_iovar_op()
731 sd_err(("SD Slot Powered OFF.\n")); in sdioh_iovar_op()
746 if (sd_clock == 1) { in sdioh_iovar_op()
747 sd_info(("SD Clock turned ON.\n")); in sdioh_iovar_op()
757 sd_info(("SD Clock turned OFF.\n")); in sdioh_iovar_op()
796 if (!(si->card_UHSI_voltage_Supported && si->host_UHSISupported)) { in sdioh_iovar_op()
831 si->sd3_tuning_reqd = TRUE; in sdioh_iovar_op()
836 si->sd3_tuning_reqd = FALSE; in sdioh_iovar_op()
840 si->sd3_tuning_reqd = TRUE; in sdioh_iovar_op()
847 int_val = (int32)si->intrcount; in sdioh_iovar_op()
852 int_val = (int32)si->local_intrcount; in sdioh_iovar_op()
860 if (sd_ptr->offset < SD_SysAddr || sd_ptr->offset > SD3_WL_BT_reset_register) { in sdioh_iovar_op()
861 sd_err(("%s: bad offset 0x%x\n", __FUNCTION__, sd_ptr->offset)); in sdioh_iovar_op()
867 (sd_ptr->offset & 1) ? 8 : ((sd_ptr->offset & 2) ? 16 : 32), in sdioh_iovar_op()
868 sd_ptr->offset)); in sdioh_iovar_op()
869 if (sd_ptr->offset & 1) in sdioh_iovar_op()
870 int_val = sdstd_rreg8(si, sd_ptr->offset); in sdioh_iovar_op()
871 else if (sd_ptr->offset & 2) in sdioh_iovar_op()
872 int_val = sdstd_rreg16(si, sd_ptr->offset); in sdioh_iovar_op()
874 int_val = sdstd_rreg(si, sd_ptr->offset); in sdioh_iovar_op()
884 if (sd_ptr->offset < SD_SysAddr || sd_ptr->offset > SD3_WL_BT_reset_register) { in sdioh_iovar_op()
885 sd_err(("%s: bad offset 0x%x\n", __FUNCTION__, sd_ptr->offset)); in sdioh_iovar_op()
890 sd_trace(("%s: wreg%d value 0x%08x at offset %d\n", __FUNCTION__, sd_ptr->value, in sdioh_iovar_op()
891 (sd_ptr->offset & 1) ? 8 : ((sd_ptr->offset & 2) ? 16 : 32), in sdioh_iovar_op()
892 sd_ptr->offset)); in sdioh_iovar_op()
893 if (sd_ptr->offset & 1) in sdioh_iovar_op()
894 sdstd_wreg8(si, sd_ptr->offset, (uint8)sd_ptr->value); in sdioh_iovar_op()
895 else if (sd_ptr->offset & 2) in sdioh_iovar_op()
896 sdstd_wreg16(si, sd_ptr->offset, (uint16)sd_ptr->value); in sdioh_iovar_op()
898 sdstd_wreg(si, sd_ptr->offset, (uint32)sd_ptr->value); in sdioh_iovar_op()
908 if (sdioh_cfg_read(si, sd_ptr->func, sd_ptr->offset, &data)) { in sdioh_iovar_op()
921 uint8 data = (uint8)sd_ptr->value; in sdioh_iovar_op()
923 if (sdioh_cfg_write(si, sd_ptr->func, sd_ptr->offset, &data)) { in sdioh_iovar_op()
931 si->sd3_tuning_disable = (bool)int_val; in sdioh_iovar_op()
944 sdioh_cfg_read(sdioh_info_t *sd, uint fnc_num, uint32 addr, uint8 *data) in sdioh_cfg_read() argument
948 status = sdioh_request_byte(sd, SDIOH_READ, fnc_num, addr, data); in sdioh_cfg_read()
953 sdioh_cfg_write(sdioh_info_t *sd, uint fnc_num, uint32 addr, uint8 *data) in sdioh_cfg_write() argument
957 status = sdioh_request_byte(sd, SDIOH_WRITE, fnc_num, addr, data); in sdioh_cfg_write()
962 sdioh_cis_read(sdioh_info_t *sd, uint func, uint8 *cisd, uint32 length) in sdioh_cis_read() argument
971 if (!sd->func_cis_ptr[func]) { in sdioh_cis_read()
976 sdstd_lock(sd); in sdioh_cis_read()
979 offset = sd->func_cis_ptr[func] + count; in sdioh_cis_read()
980 if (sdstd_card_regread(sd, 0, offset, 1, &foo)) { in sdioh_cis_read()
982 sdstd_unlock(sd); in sdioh_cis_read()
988 sdstd_unlock(sd); in sdioh_cis_read()
993 sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr, uint8 *byte) in sdioh_request_byte() argument
999 sdstd_lock(sd); in sdioh_request_byte()
1001 sdstd_3_check_and_do_tuning(sd, CHECK_TUNING_PRE_DATA); in sdioh_request_byte()
1004 sdstd_3_set_data_state(sd, DATA_TRANSFER_ONGOING); in sdioh_request_byte()
1009 cmd_arg = SFIELD(cmd_arg, CMD52_RW_FLAG, rw == SDIOH_READ ? 0 : 1); in sdioh_request_byte()
1013 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_52, cmd_arg)) != SUCCESS) { in sdioh_request_byte()
1015 sdstd_3_set_data_state(sd, DATA_TRANSFER_IDLE); in sdioh_request_byte()
1016 sdstd_unlock(sd); in sdioh_request_byte()
1020 sdstd_cmd_getrsp(sd, &rsp5, 1); in sdioh_request_byte()
1021 if (sdstd_rreg16 (sd, SD_ErrorIntrStatus) != 0) { in sdioh_request_byte()
1022 sd_err(("%s: 1: ErrorintrStatus 0x%x\n", in sdioh_request_byte()
1023 __FUNCTION__, sdstd_rreg16(sd, SD_ErrorIntrStatus))); in sdioh_request_byte()
1044 sdstd_3_set_data_state(sd, DATA_TRANSFER_IDLE); in sdioh_request_byte()
1047 sdstd_3_check_and_do_tuning(sd, CHECK_TUNING_POST_DATA); in sdioh_request_byte()
1049 sdstd_unlock(sd); in sdioh_request_byte()
1054 sdioh_request_word(sdioh_info_t *sd, uint cmd_type, uint rw, uint func, uint addr, in sdioh_request_word() argument
1059 sdstd_lock(sd); in sdioh_request_word()
1061 sdstd_3_check_and_do_tuning(sd, CHECK_TUNING_PRE_DATA); in sdioh_request_word()
1064 sdstd_3_set_data_state(sd, DATA_TRANSFER_ONGOING); in sdioh_request_word()
1067 status = sdstd_card_regread(sd, func, addr, nbytes, word); in sdioh_request_word()
1069 status = sdstd_card_regwrite(sd, func, addr, nbytes, *word); in sdioh_request_word()
1073 sdstd_3_set_data_state(sd, DATA_TRANSFER_IDLE); in sdioh_request_word()
1076 sdstd_3_check_and_do_tuning(sd, CHECK_TUNING_POST_DATA); in sdioh_request_word()
1078 sdstd_unlock(sd); in sdioh_request_word()
1084 sdioh_glom_post(sdioh_info_t *sd, uint8 *frame, void *pkt, uint len) in sdioh_glom_post() argument
1087 sd->glom_info.dma_buf_arr[sd->glom_info.count] = frame; in sdioh_glom_post()
1088 sd->glom_info.nbytes[sd->glom_info.count] = len; in sdioh_glom_post()
1090 if (sd->txglom_mode == SDPCM_TXGLOM_MDESC) { in sdioh_glom_post()
1091 sd->glom_info.dma_phys_arr[sd->glom_info.count] = DMA_MAP(sd->osh, in sdioh_glom_post()
1096 sd->glom_info.count++; in sdioh_glom_post()
1100 sdioh_glom_clear(sdioh_info_t *sd) in sdioh_glom_clear() argument
1104 if (sd->txglom_mode == SDPCM_TXGLOM_MDESC) { in sdioh_glom_clear()
1105 for (i = 0; i < sd->glom_info.count; i++) { in sdioh_glom_clear()
1106 DMA_UNMAP(sd->osh, in sdioh_glom_clear()
1107 sd->glom_info.dma_phys_arr[i], in sdioh_glom_clear()
1108 sd->glom_info.nbytes[i], in sdioh_glom_clear()
1112 sd->glom_info.count = 0; in sdioh_glom_clear()
1116 sdioh_set_mode(sdioh_info_t *sd, uint mode) in sdioh_set_mode() argument
1119 sd->txglom_mode = mode; in sdioh_set_mode()
1120 else if ((mode == SDPCM_TXGLOM_MDESC) && (sd->version == HOST_CONTR_VER_3)) in sdioh_set_mode()
1121 sd->txglom_mode = mode; in sdioh_set_mode()
1123 return (sd->txglom_mode); in sdioh_set_mode()
1134 sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint rw, uint func, in sdioh_request_buffer() argument
1142 bool local_blockmode = sd->sd_blockmode; in sdioh_request_buffer()
1145 sdstd_lock(sd); in sdioh_request_buffer()
1149 sdstd_3_check_and_do_tuning(sd, CHECK_TUNING_PRE_DATA); in sdioh_request_buffer()
1152 sdstd_3_set_data_state(sd, DATA_TRANSFER_ONGOING); in sdioh_request_buffer()
1155 ASSERT(buflen_u < (1 << 30)); in sdioh_request_buffer()
1156 ASSERT(sd->client_block_size[func]); in sdioh_request_buffer()
1161 sdioh_glom_post(sd, PKTDATA(sd->osh, pkt), pkt, PKTLEN(sd->osh, pkt)); in sdioh_request_buffer()
1162 pkt = PKTNEXT(sd->osh, pkt); in sdioh_request_buffer()
1168 buflen_u, sd->r_cnt, sd->t_cnt, pkt)); in sdioh_request_buffer()
1171 * Bytemode: 1 block at a time. in sdioh_request_buffer()
1180 if ((sd->version == HOST_CONTR_VER_3) && sd_txglom) in sdioh_request_buffer()
1187 if (buflen > sd->client_block_size[func]) in sdioh_request_buffer()
1188 len = (len/sd->client_block_size[func]) * in sdioh_request_buffer()
1189 sd->client_block_size[func]; in sdioh_request_buffer()
1190 if ((func == SDIO_FUNC_1) && (((len % 4) == 3) || (((len % 2) == 1) && in sdioh_request_buffer()
1195 if ((localbuf = (uint8 *)MALLOC(sd->osh, len)) == NULL) { in sdioh_request_buffer()
1197 MALLOCED(sd->osh))); in sdioh_request_buffer()
1206 len = MIN(sd->client_block_size[func], buflen); in sdioh_request_buffer()
1209 if (sdstd_card_buf(sd, rw, func, fifo, addr, len, (uint32 *)buffer) != SUCCESS) { in sdioh_request_buffer()
1214 MFREE(sd->osh, localbuf, len); in sdioh_request_buffer()
1216 len--; in sdioh_request_buffer()
1226 buflen -= len; in sdioh_request_buffer()
1233 if (sd->glom_info.count != 0) in sdioh_request_buffer()
1240 sdstd_3_set_data_state(sd, DATA_TRANSFER_IDLE); in sdioh_request_buffer()
1243 sdstd_3_check_and_do_tuning(sd, CHECK_TUNING_POST_DATA); in sdioh_request_buffer()
1245 sdstd_unlock(sd); in sdioh_request_buffer()
1249 sdioh_glom_clear(sd); in sdioh_request_buffer()
1256 sdioh_gpioouten(sdioh_info_t *sd, uint32 gpio) in sdioh_gpioouten() argument
1263 gpio -= SDH_GPIO16; in sdioh_gpioouten()
1267 val = sdstd_rreg16(sd, SD_GPIO_OE + offset); in sdioh_gpioouten()
1268 val |= (1 << gpio); in sdioh_gpioouten()
1269 sdstd_wreg16(sd, SD_GPIO_OE + offset, val); in sdioh_gpioouten()
1275 sdioh_gpioout(sdioh_info_t *sd, uint32 gpio, bool enab) in sdioh_gpioout() argument
1282 gpio -= SDH_GPIO16; in sdioh_gpioout()
1286 val = sdstd_rreg16(sd, SD_GPIO_Reg + offset); in sdioh_gpioout()
1288 val |= (1 << gpio); in sdioh_gpioout()
1290 val &= ~(1 << gpio); in sdioh_gpioout()
1291 sdstd_wreg16(sd, SD_GPIO_Reg + offset, val); in sdioh_gpioout()
1297 sdioh_gpioin(sdioh_info_t *sd, uint32 gpio) in sdioh_gpioin() argument
1304 gpio -= SDH_GPIO16; in sdioh_gpioin()
1308 val = sdstd_rreg16(sd, SD_GPIO_Reg + offset); in sdioh_gpioin()
1309 val = (val >> gpio) & 1; in sdioh_gpioin()
1311 return (val == 1); in sdioh_gpioin()
1315 sdioh_gpio_init(sdioh_info_t *sd) in sdioh_gpio_init() argument
1319 rev = sdstd_rreg16(sd, SD_HostControllerVersion) >> 8; in sdioh_gpio_init()
1327 sdstd_wreg16(sd, SD_GPIO_Enable, SDH_GPIO_ENABLE); in sdioh_gpio_init()
1328 sdstd_wreg16(sd, SD_GPIO_Enable + 2, SDH_GPIO_ENABLE); in sdioh_gpio_init()
1331 sdstd_wreg16(sd, SD_GPIO_OE, 0); in sdioh_gpio_init()
1332 sdstd_wreg16(sd, SD_GPIO_OE + 2, 0); in sdioh_gpio_init()
1338 sdioh_sleep(sdioh_info_t *sd, bool enab) in sdioh_sleep() argument
1344 sdstd_lock(sd); in sdioh_sleep()
1346 cmd_arg = SFIELD(cmd_arg, CMD14_RCA, sd->card_rca); in sdioh_sleep()
1351 * 1) Repeat CMD14 until R1 is received in sdioh_sleep()
1355 while (retry-- > 0) { in sdioh_sleep()
1356 if ((sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_14, cmd_arg)) == SUCCESS) { in sdioh_sleep()
1368 sdstd_cmd_getrsp(sd, &rsp1, 1); in sdioh_sleep()
1374 cmd_arg = SFIELD(0, CMD7_RCA, sd->card_rca); in sdioh_sleep()
1375 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_7, cmd_arg)) != SUCCESS) { in sdioh_sleep()
1381 sdstd_cmd_getrsp(sd, &rsp1, 1); in sdioh_sleep()
1391 sdstd_unlock(sd); in sdioh_sleep()
1397 sdstd_abort(sdioh_info_t *sd, uint func) in sdstd_abort() argument
1421 cmd_reg = SFIELD(cmd_reg, CMD_CRC_EN, 1); in sdstd_abort()
1422 cmd_reg = SFIELD(cmd_reg, CMD_INDEX_EN, 1); in sdstd_abort()
1427 if (sd->sd_mode == SDIOH_MODE_SPI) { in sdstd_abort()
1434 while (GFIELD(sdstd_rreg(sd, SD_PresentState), PRES_CMD_INHIBIT)) { in sdstd_abort()
1437 __FUNCTION__, sdstd_rreg(sd, SD_PresentState))); in sdstd_abort()
1438 if (!--retries) { in sdstd_abort()
1440 __FUNCTION__, sdstd_rreg(sd, SD_PresentState))); in sdstd_abort()
1449 if ((plain_intstatus = sdstd_rreg16(sd, SD_ErrorIntrStatus)) != 0) { in sdstd_abort()
1451 sdstd_wreg16(sd, SD_ErrorIntrStatus, plain_intstatus); in sdstd_abort()
1453 plain_intstatus = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_abort()
1454 if (plain_intstatus & ~(SFIELD(0, INTSTAT_CARD_INT, 1))) { in sdstd_abort()
1467 sdstd_wreg(sd, SD_Arg0, cmd_arg); in sdstd_abort()
1468 sdstd_wreg16(sd, SD_Command, cmd_reg); in sdstd_abort()
1471 if (!sd->polled_mode) in sdstd_abort()
1482 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_abort()
1483 } while (--retries && in sdstd_abort()
1491 sdstd_rreg16(sd, SD_ErrorIntrStatus), in sdstd_abort()
1492 sdstd_rreg(sd, SD_PresentState))); in sdstd_abort()
1494 sdstd_wreg8(sd, SD_SoftwareReset, SFIELD(0, SW_RESET_CMD, 1)); in sdstd_abort()
1503 } while ((GFIELD(sdstd_rreg8(sd, SD_SoftwareReset), in sdstd_abort()
1504 SW_RESET_CMD)) && retries--); in sdstd_abort()
1517 int_reg = SFIELD(0, INTSTAT_CMD_COMPLETE, 1); in sdstd_abort()
1518 sdstd_wreg16(sd, SD_IntrStatus, int_reg); in sdstd_abort()
1521 if ((plain_intstatus = sdstd_rreg16 (sd, SD_ErrorIntrStatus)) != 0) { in sdstd_abort()
1525 sdstd_rreg16(sd, SD_IntrStatus), in sdstd_abort()
1526 sdstd_rreg(sd, SD_PresentState))); in sdstd_abort()
1528 sdstd_wreg16(sd, SD_ErrorIntrStatus, plain_intstatus); in sdstd_abort()
1530 sdstd_wreg8(sd, SD_SoftwareReset, SFIELD(0, SW_RESET_DAT, 1)); in sdstd_abort()
1539 } while ((GFIELD(sdstd_rreg8(sd, SD_SoftwareReset), in sdstd_abort()
1540 SW_RESET_DAT)) && retries--); in sdstd_abort()
1559 sdstd_cmd_getrsp(sd, &rsp5, 1); in sdstd_abort()
1590 sdstd_wreg8(sd, SD_SoftwareReset, in sdstd_abort()
1591 SFIELD(SFIELD(0, SW_RESET_DAT, 1), SW_RESET_CMD, 1)); in sdstd_abort()
1595 rflags = sdstd_rreg8(sd, SD_SoftwareReset); in sdstd_abort()
1603 } while (--retries); in sdstd_abort()
1615 sdioh_abort(sdioh_info_t *sd, uint fnum) in sdioh_abort() argument
1619 sdstd_lock(sd); in sdioh_abort()
1620 ret = sdstd_abort(sd, fnum); in sdioh_abort()
1621 sdstd_unlock(sd); in sdioh_abort()
1627 sdioh_start(sdioh_info_t *sd, int stage) in sdioh_start() argument
1633 sdioh_stop(sdioh_info_t *sd) in sdioh_stop() argument
1639 sdioh_waitlockfree(sdioh_info_t *sd) in sdioh_waitlockfree() argument
1641 sdstd_waitlockfree(sd); in sdioh_waitlockfree()
1678 sdstd_wreg8(sdioh_info, SD_SoftwareReset, SFIELD(0, SW_RESET_CMD, 1)); in sdstd_check_errs()
1679 for (retries = RETRIES_LARGE; retries; retries--) { in sdstd_check_errs()
1699 sdstd_wreg8(sdioh_info, SD_SoftwareReset, SFIELD(0, SW_RESET_DAT, 1)); in sdstd_check_errs()
1700 for (retries = RETRIES_LARGE; retries; retries--) { in sdstd_check_errs()
1737 sdstd_reset(sdioh_info_t *sd, bool host_reset, bool client_reset) in sdstd_reset() argument
1742 if (!sd) in sdstd_reset()
1745 sdstd_lock(sd); in sdstd_reset()
1747 if (client_reset && (sd->adapter_slot != -1)) { in sdstd_reset()
1748 if (sdstd_card_regwrite(sd, 0, SDIOD_CCCR_IOABORT, 1, 0x8) != SUCCESS) in sdstd_reset()
1752 sd->card_rca = 0; in sdstd_reset()
1757 regval = SFIELD(0, SW_RESET_ALL, 1); in sdstd_reset()
1758 sdstd_wreg8(sd, SD_SoftwareReset, regval); in sdstd_reset()
1766 } while ((sdstd_rreg8(sd, SD_SoftwareReset) & regval) && retries--); in sdstd_reset()
1770 sdstd_unlock(sd); in sdstd_reset()
1774 /* A reset should reset bus back to 1 bit mode */ in sdstd_reset()
1775 sd->sd_mode = SDIOH_MODE_SD1; in sdstd_reset()
1776 sdstd_set_dma_mode(sd, sd->sd_dma_mode); in sdstd_reset()
1778 sdstd_unlock(sd); in sdstd_reset()
1784 sdstd_devintr_off(sdioh_info_t *sd) in sdstd_devintr_off() argument
1786 sd_trace(("%s: %d\n", __FUNCTION__, sd->use_client_ints)); in sdstd_devintr_off()
1787 if (sd->use_client_ints) { in sdstd_devintr_off()
1788 sd->intmask &= ~CLIENT_INTR; in sdstd_devintr_off()
1789 sdstd_wreg16(sd, SD_IntrSignalEnable, sd->intmask); in sdstd_devintr_off()
1790 sdstd_rreg16(sd, SD_IntrSignalEnable); /* Sync readback */ in sdstd_devintr_off()
1796 sdstd_devintr_on(sdioh_info_t *sd) in sdstd_devintr_on() argument
1798 ASSERT(sd->lockcount == 0); in sdstd_devintr_on()
1799 sd_trace(("%s: %d\n", __FUNCTION__, sd->use_client_ints)); in sdstd_devintr_on()
1800 if (sd->use_client_ints) { in sdstd_devintr_on()
1801 if (sd->version < HOST_CONTR_VER_3) { in sdstd_devintr_on()
1802 uint16 status = sdstd_rreg16(sd, SD_IntrStatusEnable); in sdstd_devintr_on()
1803 sdstd_wreg16(sd, SD_IntrStatusEnable, SFIELD(status, INTSTAT_CARD_INT, 0)); in sdstd_devintr_on()
1804 sdstd_wreg16(sd, SD_IntrStatusEnable, status); in sdstd_devintr_on()
1807 sd->intmask |= CLIENT_INTR; in sdstd_devintr_on()
1808 sdstd_wreg16(sd, SD_IntrSignalEnable, sd->intmask); in sdstd_devintr_on()
1809 sdstd_rreg16(sd, SD_IntrSignalEnable); /* Sync readback */ in sdstd_devintr_on()
1816 sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err) in sdstd_intrs_on() argument
1819 norm = SFIELD(norm, INTSTAT_ERROR_INT, 1); in sdstd_intrs_on()
1820 sdstd_wreg16(sd, SD_ErrorIntrSignalEnable, err); in sdstd_intrs_on()
1823 sd->intmask |= norm; in sdstd_intrs_on()
1824 sdstd_wreg16(sd, SD_IntrSignalEnable, sd->intmask); in sdstd_intrs_on()
1826 sdstd_rreg16(sd, SD_IntrSignalEnable); /* Sync readback */ in sdstd_intrs_on()
1830 sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err) in sdstd_intrs_off() argument
1833 norm = SFIELD(norm, INTSTAT_ERROR_INT, 1); in sdstd_intrs_off()
1834 sdstd_wreg16(sd, SD_ErrorIntrSignalEnable, 0); in sdstd_intrs_off()
1837 sd->intmask &= ~norm; in sdstd_intrs_off()
1838 sdstd_wreg16(sd, SD_IntrSignalEnable, sd->intmask); in sdstd_intrs_off()
1840 sdstd_rreg16(sd, SD_IntrSignalEnable); /* Sync readback */ in sdstd_intrs_off()
1845 sdstd_host_init(sdioh_info_t *sd) in sdstd_host_init() argument
1855 if ((OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_VID, 4) & 0xFFFF) == VENDOR_SI_IMAGE) { in sdstd_host_init()
1857 sd->controller_type = SDIOH_TYPE_ARASAN_HDK; in sdstd_host_init()
1860 sd->sd_dma_mode = DMA_MODE_SDMA; in sdstd_host_init()
1861 } else if ((OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_VID, 4) & 0xFFFF) == VENDOR_CYPRESS) { in sdstd_host_init()
1863 sd->controller_type = SDIOH_TYPE_BCM27XX; in sdstd_host_init()
1865 } else if ((OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_VID, 4) & 0xFFFF) == VENDOR_BROADCOM) { in sdstd_host_init()
1867 sd->controller_type = SDIOH_TYPE_BCM27XX; in sdstd_host_init()
1869 } else if ((OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_VID, 4) & 0xFFFF) == VENDOR_TI) { in sdstd_host_init()
1871 sd->controller_type = SDIOH_TYPE_TI_PCIXX21; in sdstd_host_init()
1873 } else if ((OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_VID, 4) & 0xFFFF) == VENDOR_RICOH) { in sdstd_host_init()
1874 sd_info(("%s: Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter\n", in sdstd_host_init()
1876 sd->controller_type = SDIOH_TYPE_RICOH_R5C822; in sdstd_host_init()
1878 } else if ((OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_VID, 4) & 0xFFFF) == VENDOR_JMICRON) { in sdstd_host_init()
1881 sd->controller_type = SDIOH_TYPE_JMICRON; in sdstd_host_init()
1892 first_bar = OSL_PCI_READ_CONFIG(sd->osh, SD_SlotInfo, 4) & 0x7; in sdstd_host_init()
1893 num_slots = (OSL_PCI_READ_CONFIG(sd->osh, SD_SlotInfo, 4) & 0xff) >> 4; in sdstd_host_init()
1897 if (OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_VID, 4) == in sdstd_host_init()
1901 OSL_PCI_WRITE_CONFIG(sd->osh, PCI_BAR0_WIN, 4, 0x18001000); in sdstd_host_init()
1905 num_slots = 1; in sdstd_host_init()
1909 sd->sd_dma_mode = DMA_MODE_ADMA2; in sdstd_host_init()
1910 } else if (OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_VID, 4) == in sdstd_host_init()
1914 OSL_PCI_WRITE_CONFIG(sd->osh, PCI_BAR0_WIN, 4, 0x18001000); in sdstd_host_init()
1918 num_slots = 1; in sdstd_host_init()
1922 sd->sd_dma_mode = DMA_MODE_ADMA2; in sdstd_host_init()
1928 if (sd->mem_space) { in sdstd_host_init()
1929 sdstd_reg_unmap(sd->osh, (ulong)sd->mem_space, SDIOH_REG_WINSZ); in sdstd_host_init()
1930 sd->mem_space = NULL; in sdstd_host_init()
1933 full_slot = -1; in sdstd_host_init()
1936 bar = OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_BAR0 + (4*(slot + first_bar)), 4); in sdstd_host_init()
1938 /* PCIe 64-bit alignment */ in sdstd_host_init()
1941 sd->mem_space = (volatile char *)sdstd_reg_map(sd->osh, in sdstd_host_init()
1944 sd->adapter_slot = -1; in sdstd_host_init()
1947 card_ins = GFIELD(sdstd_rreg(sd, SD_PresentState), PRES_CARD_PRESENT); in sdstd_host_init()
1960 if (sd->mem_space) { in sdstd_host_init()
1961 sdstd_reg_unmap(sd->osh, (ulong)sd->mem_space, SDIOH_REG_WINSZ); in sdstd_host_init()
1962 sd->mem_space = NULL; in sdstd_host_init()
1968 return -1; in sdstd_host_init()
1971 bar = OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_BAR0 + (4*(full_slot + first_bar)), 4); in sdstd_host_init()
1973 /* PCIe 64-bit alignment */ in sdstd_host_init()
1976 sd->mem_space = (volatile char *)sdstd_reg_map(sd->osh, (uintptr)bar, SDIOH_REG_WINSZ); in sdstd_host_init()
1982 OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_BAR0 + (4*(full_slot + first_bar)), 4) & in sdstd_host_init()
1984 sd->mem_space)); in sdstd_host_init()
1989 OSL_PCI_READ_CONFIG(sd->osh, PCI_CFG_BAR0 + (4*(full_slot + first_bar)), 4), in sdstd_host_init()
1990 sd->mem_space)); in sdstd_host_init()
1993 sd->adapter_slot = full_slot; in sdstd_host_init()
1995 sd->version = sdstd_rreg16(sd, SD_HostControllerVersion) & 0xFF; in sdstd_host_init()
1996 switch (sd->version) { in sdstd_host_init()
1999 sdstd_rreg16(sd, SD_HostControllerVersion) >> 8)); in sdstd_host_init()
2001 case 1: in sdstd_host_init()
2003 sdstd_rreg16(sd, SD_HostControllerVersion) >> 8)); in sdstd_host_init()
2007 sdstd_rreg16(sd, SD_HostControllerVersion) >> 8)); in sdstd_host_init()
2011 __FUNCTION__, sd->version)); in sdstd_host_init()
2015 sd->caps = sdstd_rreg(sd, SD_Capabilities); /* Cache this for later use */ in sdstd_host_init()
2017 sd->caps3 = sdstd_rreg(sd, SD_Capabilities3); /* Cache this for later use */ in sdstd_host_init()
2018 sd3_trace(("sd3: %s: caps: 0x%x; MCCap:0x%x\n", __FUNCTION__, sd->caps, sd->curr_caps)); in sdstd_host_init()
2019 sd3_trace(("sd3: %s: caps3: 0x%x\n", __FUNCTION__, sd->caps3)); in sdstd_host_init()
2020 sd->curr_caps = sdstd_rreg(sd, SD_MaxCurCap); in sdstd_host_init()
2022 sd_info(("%s: caps: 0x%x; MCCap:0x%x\n", __FUNCTION__, sd->caps, sd->curr_caps)); in sdstd_host_init()
2024 sdstd_set_dma_mode(sd, sd->sd_dma_mode); in sdstd_host_init()
2026 sdstd_reset(sd, 1, 0); in sdstd_host_init()
2029 if ((reg8 = sdstd_rreg8(sd, SD_HostCntrl))) { in sdstd_host_init()
2037 sd->sd_mode = SDIOH_MODE_SD1; in sdstd_host_init()
2038 sd->polled_mode = TRUE; in sdstd_host_init()
2039 sd->host_init_done = TRUE; in sdstd_host_init()
2040 sd->card_init_done = FALSE; in sdstd_host_init()
2041 sd->adapter_slot = full_slot; in sdstd_host_init()
2044 sd->version = HOST_CONTR_VER_2; in sdstd_host_init()
2048 if (sd->version == HOST_CONTR_VER_3) { in sdstd_host_init()
2053 reg16 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_host_init()
2059 if ((GFIELD(sd->caps, CAP_VOLT_1_8)) && in sdstd_host_init()
2060 (GFIELD(sd->caps3, CAP3_SDR50_SUP) || in sdstd_host_init()
2061 GFIELD(sd->caps3, CAP3_SDR104_SUP) || in sdstd_host_init()
2062 GFIELD(sd->caps3, CAP3_DDR50_SUP))) in sdstd_host_init()
2063 sd->host_UHSISupported = 1; in sdstd_host_init()
2071 /* pci cw [expr $def(configbase) +0x95] 1 2 */ in sdstd_host_init()
2072 intmask = OSL_PCI_READ_CONFIG(sd->osh, PCI_INT_MASK, 4); in sdstd_host_init()
2074 OSL_PCI_WRITE_CONFIG(sd->osh, PCI_INT_MASK, 4, intmask); in sdstd_host_init()
2081 get_ocr(sdioh_info_t *sd, uint32 *cmd_arg, uint32 *cmd_rsp) in get_ocr() argument
2091 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_5, *cmd_arg)) in get_ocr()
2096 sdstd_cmd_getrsp(sd, cmd_rsp, 1); in get_ocr()
2104 } while ((!GFIELD(*cmd_rsp, RSP4_CARD_READY)) && --retries); in get_ocr()
2112 sdstd_client_init(sdioh_info_t *sd) in sdstd_client_init() argument
2120 sd_trace(("%s: Powering up slot %d\n", __FUNCTION__, sd->adapter_slot)); in sdstd_client_init()
2123 sdstd_wreg16(sd, SD_IntrStatus, 0x1fff); in sdstd_client_init()
2124 sdstd_wreg16(sd, SD_ErrorIntrStatus, 0x0fff); in sdstd_client_init()
2131 if (!sd->host_UHSISupported) in sdstd_client_init()
2132 sdstd_wreg16(sd, SD_IntrStatusEnable, 0x1ff); in sdstd_client_init()
2138 sdstd_wreg16(sd, SD_IntrStatusEnable, 0x0fff); in sdstd_client_init()
2140 sdstd_wreg16(sd, SD_ErrorIntrStatusEnable, 0xffff); in sdstd_client_init()
2142 sdstd_wreg16(sd, SD_IntrSignalEnable, 0); /* Disable ints for now. */ in sdstd_client_init()
2144 if (sd->host_UHSISupported) { in sdstd_client_init()
2146 powerstat = sdstd_start_power(sd, 1); in sdstd_client_init()
2159 if (TRUE != sdstd_start_power(sd, 0)) { in sdstd_client_init()
2164 if (sd->num_funcs == 0) { in sdstd_client_init()
2170 if (sd->sd_mode == SDIOH_MODE_SPI) { in sdstd_client_init()
2172 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_0, cmd_arg)) in sdstd_client_init()
2179 if (sd->sd_mode != SDIOH_MODE_SPI) { in sdstd_client_init()
2184 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_3, cmd_arg)) in sdstd_client_init()
2191 sdstd_cmd_getrsp(sd, &cmd_rsp, 1); in sdstd_client_init()
2202 sd->card_rca = GFIELD(cmd_rsp, RSP6_IO_RCA); in sdstd_client_init()
2203 sd_info(("RCA is 0x%x\n", sd->card_rca)); in sdstd_client_init()
2209 cmd_arg = SFIELD(0, CMD7_RCA, sd->card_rca); in sdstd_client_init()
2210 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_7, cmd_arg)) in sdstd_client_init()
2215 sdstd_cmd_getrsp(sd, &cmd_rsp, 1); in sdstd_client_init()
2223 /* Disable default/power-up device Card Detect (CD) pull up resistor on DAT3 in sdstd_client_init()
2227 if (sdstd_card_regread (sd, 0, SDIOD_CCCR_BICTRL, 1, ®data) != SUCCESS) { in sdstd_client_init()
2233 if (sdstd_card_regwrite (sd, 0, SDIOD_CCCR_BICTRL, 1, regdata) != SUCCESS) { in sdstd_client_init()
2238 sdstd_card_enablefuncs(sd); in sdstd_client_init()
2240 if (!sdstd_bus_width(sd, sd_sdmode)) { in sdstd_client_init()
2245 set_client_block_size(sd, 1, sd_f1_blocksize); in sdstd_client_init()
2248 if (sd->num_funcs >= 2) { in sdstd_client_init()
2249 set_client_block_size(sd, 2, DEFAULT_F2_BLKSIZE /* BLOCK_SIZE_4328 */); in sdstd_client_init()
2255 if (sdstd_card_regwrite(sd, 0, SDIOD_CCCR_INTEN, 1, in sdstd_client_init()
2262 /* Switch to High-speed clocking mode if both host and device support it */ in sdstd_client_init()
2263 if (sdstd_3_clock_wrapper(sd) != SUCCESS) { in sdstd_client_init()
2269 if (sdstd_clock_wrapper(sd)) { in sdstd_client_init()
2274 sd->card_init_done = TRUE; in sdstd_client_init()
2280 sdstd_clock_wrapper(sdioh_info_t *sd) in sdstd_clock_wrapper() argument
2283 /* After configuring for High-Speed mode, set the desired clock rate. */ in sdstd_clock_wrapper()
2284 sdstd_set_highspeed_mode(sd, (bool)sd_hiok); in sdstd_clock_wrapper()
2286 if (FALSE == sdstd_start_clock(sd, (uint16)sd_divisor)) { in sdstd_clock_wrapper()
2294 sdstd_3_clock_wrapper(sdioh_info_t *sd) in sdstd_3_clock_wrapper() argument
2298 if (sd->card_UHSI_voltage_Supported) { in sdstd_3_clock_wrapper()
2300 retclk = sdstd_3_get_matching_uhsi_clkmode(sd, sd_uhsimode); in sdstd_3_clock_wrapper()
2303 if (retclk == -1) { in sdstd_3_clock_wrapper()
2305 if (sd3_autoselect_uhsi_max == 1) { in sdstd_3_clock_wrapper()
2306 retclk = sdstd_3_get_matching_uhsi_clkmode(sd, SD3CLKMODE_AUTO); in sdstd_3_clock_wrapper()
2308 if (retclk == -1) { in sdstd_3_clock_wrapper()
2325 if (retclk != -1) { in sdstd_3_clock_wrapper()
2329 if (BCME_OK != sdstd_3_set_highspeed_uhsi_mode(sd, sd_uhsimode)) { in sdstd_3_clock_wrapper()
2335 if (SUCCESS != sdstd_clock_wrapper(sd)) { in sdstd_3_clock_wrapper()
2343 if (SUCCESS != sdstd_clock_wrapper(sd)) { in sdstd_3_clock_wrapper()
2352 sdstd_3_clk_tuning(sdioh_info_t *sd, uint32 sd3ClkMode) in sdstd_3_clk_tuning() argument
2364 if (!sd->sd3_tuning_reqd) { in sdstd_3_clk_tuning()
2374 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_clk_tuning()
2375 val1 = SFIELD(val1, HOSTCtrl2_EXEC_TUNING, 1); in sdstd_3_clk_tuning()
2376 sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_3_clk_tuning()
2381 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_19, 0)) in sdstd_3_clk_tuning()
2384 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_clk_tuning()
2387 sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_3_clk_tuning()
2394 bufready = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_3_clk_tuning()
2402 OSL_DELAY(1); in sdstd_3_clk_tuning()
2409 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_clk_tuning()
2412 sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_3_clk_tuning()
2426 l_val_1 = sdstd_rreg(sd, SD_BufferDataPort0); in sdstd_3_clk_tuning()
2433 bufready = SFIELD(bufready, INTSTAT_BUF_READ_READY, 1); in sdstd_3_clk_tuning()
2434 sdstd_wreg16(sd, SD_IntrStatus, bufready); in sdstd_3_clk_tuning()
2440 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_clk_tuning()
2450 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_clk_tuning()
2453 sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_3_clk_tuning()
2456 } while (1); in sdstd_3_clk_tuning()
2458 val2 = sdstd_rreg(sd, SD3_Tuning_Info_Register); in sdstd_3_clk_tuning()
2468 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_clk_tuning()
2472 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_clk_tuning()
2475 sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_3_clk_tuning()
2484 sdstd_3_enable_retuning_int(sdioh_info_t *sd) in sdstd_3_enable_retuning_int() argument
2489 sdstd_os_lock_irqsave(sd, &flags); in sdstd_3_enable_retuning_int()
2490 raw_int = sdstd_rreg16(sd, SD_IntrSignalEnable); in sdstd_3_enable_retuning_int()
2491 sdstd_wreg16(sd, SD_IntrSignalEnable, (raw_int | HC_INTR_RETUNING)); in sdstd_3_enable_retuning_int()
2493 raw_int = sdstd_rreg16(sd, SD_IntrStatusEnable); in sdstd_3_enable_retuning_int()
2494 sdstd_wreg16(sd, SD_IntrStatusEnable, (raw_int | HC_INTR_RETUNING)); in sdstd_3_enable_retuning_int()
2495 sdstd_os_unlock_irqrestore(sd, &flags); in sdstd_3_enable_retuning_int()
2499 sdstd_3_disable_retuning_int(sdioh_info_t *sd) in sdstd_3_disable_retuning_int() argument
2504 sdstd_os_lock_irqsave(sd, &flags); in sdstd_3_disable_retuning_int()
2505 sd->intmask &= ~HC_INTR_RETUNING; in sdstd_3_disable_retuning_int()
2506 raw_int = sdstd_rreg16(sd, SD_IntrSignalEnable); in sdstd_3_disable_retuning_int()
2507 sdstd_wreg16(sd, SD_IntrSignalEnable, (raw_int & (~HC_INTR_RETUNING))); in sdstd_3_disable_retuning_int()
2509 raw_int = sdstd_rreg16(sd, SD_IntrStatusEnable); in sdstd_3_disable_retuning_int()
2510 sdstd_wreg16(sd, SD_IntrStatusEnable, (raw_int & (~HC_INTR_RETUNING))); in sdstd_3_disable_retuning_int()
2511 sdstd_os_unlock_irqrestore(sd, &flags); in sdstd_3_disable_retuning_int()
2515 sdstd_3_is_retuning_int_set(sdioh_info_t *sd) in sdstd_3_is_retuning_int_set() argument
2519 raw_int = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_3_is_retuning_int_set()
2530 in this function: SD3CLKMODE_2, 3, 4 [0 and 1 NOT supported as
2535 sdstd_3_set_highspeed_uhsi_mode(sdioh_info_t *sd, int sd3ClkMode) in sdstd_3_set_highspeed_uhsi_mode() argument
2545 hc_reg8 = sdstd_rreg8(sd, SD_HostCntrl); in sdstd_3_set_highspeed_uhsi_mode()
2547 if (HOST_SDR_UNSUPP == sd->global_UHSI_Supp) { in sdstd_3_set_highspeed_uhsi_mode()
2555 if (!sdstd_3_get_matching_drvstrn(sd, sd3ClkMode, &drvstrn, &presetval)) { in sdstd_3_set_highspeed_uhsi_mode()
2562 if ((status = sdstd_card_regwrite(sd, 0, SDIOD_CCCR_DRIVER_STRENGTH, in sdstd_3_set_highspeed_uhsi_mode()
2563 1, drvstrn)) != BCME_OK) { in sdstd_3_set_highspeed_uhsi_mode()
2569 if ((status = sdstd_card_regread(sd, 0, SDIOD_CCCR_SPEED_CONTROL, in sdstd_3_set_highspeed_uhsi_mode()
2570 1, ®data)) != SUCCESS) { in sdstd_3_set_highspeed_uhsi_mode()
2571 sd_err(("%s:FAILED 1\n", __FUNCTION__)); in sdstd_3_set_highspeed_uhsi_mode()
2577 sd_info(("Device supports High-Speed mode.\n")); in sdstd_3_set_highspeed_uhsi_mode()
2581 regdata |= (sd3ClkMode << 1); in sdstd_3_set_highspeed_uhsi_mode()
2585 if ((status = sdstd_card_regwrite(sd, 0, SDIOD_CCCR_SPEED_CONTROL, in sdstd_3_set_highspeed_uhsi_mode()
2586 1, regdata)) != BCME_OK) { in sdstd_3_set_highspeed_uhsi_mode()
2591 if ((status = sdstd_card_regread(sd, 0, SDIOD_CCCR_SPEED_CONTROL, in sdstd_3_set_highspeed_uhsi_mode()
2592 1, ®data)) != BCME_OK) { in sdstd_3_set_highspeed_uhsi_mode()
2600 sd_err(("Device does not support High-Speed Mode.\n")); in sdstd_3_set_highspeed_uhsi_mode()
2603 /* SD Clock Enable = 0 */ in sdstd_3_set_highspeed_uhsi_mode()
2604 sdstd_wreg16(sd, SD_ClockCntrl, in sdstd_3_set_highspeed_uhsi_mode()
2605 sdstd_rreg16(sd, SD_ClockCntrl) & ~((uint16)0x4)); in sdstd_3_set_highspeed_uhsi_mode()
2609 hc_reg8 = SFIELD(hc_reg8, HOST_HI_SPEED_EN, 1); in sdstd_3_set_highspeed_uhsi_mode()
2610 sdstd_wreg8(sd, SD_HostCntrl, hc_reg8); in sdstd_3_set_highspeed_uhsi_mode()
2613 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_set_highspeed_uhsi_mode()
2616 val1 = SFIELD(val1, HOSTCtrl2_PRESVAL_EN, 1); in sdstd_3_set_highspeed_uhsi_mode()
2626 sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_3_set_highspeed_uhsi_mode()
2631 if (FALSE == sdstd_start_clock(sd, GFIELD(presetval, PRESET_CLK_DIV))) { in sdstd_3_set_highspeed_uhsi_mode()
2638 if (SD3_TUNING_REQD(sd, sd3ClkMode)) { in sdstd_3_set_highspeed_uhsi_mode()
2640 sd->sd3_tuning_reqd = TRUE; in sdstd_3_set_highspeed_uhsi_mode()
2642 sdstd_3_start_tuning(sd); in sdstd_3_set_highspeed_uhsi_mode()
2645 sd->sd3_tuning_reqd = FALSE; in sdstd_3_set_highspeed_uhsi_mode()
2652 void sdstd_3_check_and_do_tuning(sdioh_info_t *sd, int tuning_param) in sdstd_3_check_and_do_tuning() argument
2656 if (!sd->sd3_tuning_disable && sd->sd3_tuning_reqd) { in sdstd_3_check_and_do_tuning()
2659 if (sd->sd3_tun_state == TUNING_ONGOING) { in sdstd_3_check_and_do_tuning()
2662 while ((GFIELD(sdstd_rreg(sd, SD3_HostCntrl2), in sdstd_3_check_and_do_tuning()
2663 HOSTCtrl2_EXEC_TUNING)) && retries--) { in sdstd_3_check_and_do_tuning()
2674 } else if (sd->sd3_tun_state == TUNING_START) { in sdstd_3_check_and_do_tuning()
2678 sdstd_3_start_tuning(sd); in sdstd_3_check_and_do_tuning()
2681 if (sd->sd3_tun_state == TUNING_START_AFTER_DAT) { in sdstd_3_check_and_do_tuning()
2684 sdstd_3_start_tuning(sd); in sdstd_3_check_and_do_tuning()
2689 /* Need to run this function in interrupt-disabled context */
2690 bool sdstd_3_check_and_set_retuning(sdioh_info_t *sd) in sdstd_3_check_and_set_retuning() argument
2695 if ((sd->sd3_tun_state == TUNING_START) || in sdstd_3_check_and_set_retuning()
2696 (sd->sd3_tun_state == TUNING_ONGOING) || in sdstd_3_check_and_set_retuning()
2697 (sd->sd3_tun_state == TUNING_START_AFTER_DAT)) { in sdstd_3_check_and_set_retuning()
2702 if (sd->sd3_dat_state == DATA_TRANSFER_IDLE) { in sdstd_3_check_and_set_retuning()
2703 sd->sd3_tun_state = TUNING_START; /* tuning to be started by the tasklet */ in sdstd_3_check_and_set_retuning()
2707 sd->sd3_tun_state = TUNING_START_AFTER_DAT; in sdstd_3_check_and_set_retuning()
2712 int sdstd_3_get_data_state(sdioh_info_t *sd) in sdstd_3_get_data_state() argument
2714 return sd->sd3_dat_state; in sdstd_3_get_data_state()
2717 void sdstd_3_set_data_state(sdioh_info_t *sd, int state) in sdstd_3_set_data_state() argument
2719 sd->sd3_dat_state = state; in sdstd_3_set_data_state()
2722 int sdstd_3_get_tune_state(sdioh_info_t *sd) in sdstd_3_get_tune_state() argument
2724 return sd->sd3_tun_state; in sdstd_3_get_tune_state()
2727 void sdstd_3_set_tune_state(sdioh_info_t *sd, int state) in sdstd_3_set_tune_state() argument
2729 sd->sd3_tun_state = state; in sdstd_3_set_tune_state()
2732 uint8 sdstd_3_get_tuning_exp(sdioh_info_t *sd) in sdstd_3_get_tuning_exp() argument
2735 return GFIELD(sd->caps3, CAP3_RETUNING_TC); in sdstd_3_get_tuning_exp()
2741 uint32 sdstd_3_get_uhsi_clkmode(sdioh_info_t *sd) in sdstd_3_get_uhsi_clkmode() argument
2759 sdstd_3_get_matching_drvstrn(sdioh_info_t *sd, int sd3_requested_clkmode, in sdstd_3_get_matching_drvstrn() argument
2764 uint8 cccr_reqd_dtype_mask = 1; in sdstd_3_get_matching_drvstrn()
2770 if ((status = sdstd_card_regread(sd, 0, SDIOD_CCCR_DRIVER_STRENGTH, in sdstd_3_get_matching_drvstrn()
2771 1, drvstrn)) != BCME_OK) { in sdstd_3_get_matching_drvstrn()
2780 *presetval = sdstd_rreg16(sd, presetreg); in sdstd_3_get_matching_drvstrn()
2806 ds_offset = (((int)DRVSTRN_MAX_CHAR - in sdstd_3_get_matching_drvstrn()
2809 ds_offset = MAX_DTS_INDEX - ds_offset; in sdstd_3_get_matching_drvstrn()
2831 /* TBD check for sd3_requested_clkmode : -1 also. */ in sdstd_3_get_matching_drvstrn()
2838 /* Returns a matching UHSI clk speed is found. If not, returns -1.
2839 Also, if sd3_requested_clkmode is -1, finds the closest max match clk and returns.
2842 sdstd_3_get_matching_uhsi_clkmode(sdioh_info_t *sd, int sd3_requested_clkmode) in sdstd_3_get_matching_uhsi_clkmode() argument
2845 uint8 speedmask = 1; in sdstd_3_get_matching_uhsi_clkmode()
2852 sd->global_UHSI_Supp = HOST_SDR_UNSUPP; in sdstd_3_get_matching_uhsi_clkmode()
2857 sd->global_UHSI_Supp = HOST_SDR_12_25; in sdstd_3_get_matching_uhsi_clkmode()
2861 if ((status = sdstd_card_regread(sd, 0, SDIOD_CCCR_UHSI_SUPPORT, in sdstd_3_get_matching_uhsi_clkmode()
2862 1, &card_val_uhsisupp)) != BCME_OK) { in sdstd_3_get_matching_uhsi_clkmode()
2864 return -1; in sdstd_3_get_matching_uhsi_clkmode()
2871 speedmask <<= (sd3_requested_clkmode - SD3CLKMODE_2_SDR50); in sdstd_3_get_matching_uhsi_clkmode()
2874 if (!(GFIELD(sd->caps3, CAP3_30CLKCAP) & speedmask)) { in sdstd_3_get_matching_uhsi_clkmode()
2877 sd3_requested_clkmode, GFIELD(sd->caps3, CAP3_30CLKCAP))); in sdstd_3_get_matching_uhsi_clkmode()
2878 return -1; in sdstd_3_get_matching_uhsi_clkmode()
2886 return -1; in sdstd_3_get_matching_uhsi_clkmode()
2893 if (!sdstd_3_get_matching_drvstrn(sd, sd3_requested_clkmode, in sdstd_3_get_matching_uhsi_clkmode()
2897 return -1; in sdstd_3_get_matching_uhsi_clkmode()
2900 sd->global_UHSI_Supp = HOST_SDR_50_104_DDR; in sdstd_3_get_matching_uhsi_clkmode()
2905 /* sd->global_UHSI_Supp = TRUE; on success */ in sdstd_3_get_matching_uhsi_clkmode()
2906 return -1; in sdstd_3_get_matching_uhsi_clkmode()
2911 sdstd_3_sigvoltswitch_proc(sdioh_info_t *sd) in sdstd_3_sigvoltswitch_proc() argument
2920 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_11, 0)) in sdstd_3_sigvoltswitch_proc()
2927 sdstd_cmd_getrsp(sd, &cmd_rsp, 1); in sdstd_3_sigvoltswitch_proc()
2937 /* SD Clock Enable = 0 */ in sdstd_3_sigvoltswitch_proc()
2938 sdstd_wreg16(sd, SD_ClockCntrl, in sdstd_3_sigvoltswitch_proc()
2939 sdstd_rreg16(sd, SD_ClockCntrl) & ~((uint16)0x4)); in sdstd_3_sigvoltswitch_proc()
2942 presst = sdstd_rreg(sd, SD_PresentState); in sdstd_3_sigvoltswitch_proc()
2949 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_sigvoltswitch_proc()
2950 val1 = SFIELD(val1, HOSTCtrl2_1_8SIG_EN, 1); in sdstd_3_sigvoltswitch_proc()
2951 sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_3_sigvoltswitch_proc()
2962 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_3_sigvoltswitch_proc()
2968 /* SD Clock Enable = 1 */ in sdstd_3_sigvoltswitch_proc()
2969 val1 = sdstd_rreg16(sd, SD_ClockCntrl); in sdstd_3_sigvoltswitch_proc()
2970 sdstd_wreg16(sd, SD_ClockCntrl, val1 | 0x4); in sdstd_3_sigvoltswitch_proc()
2976 /* wait 1ms */ in sdstd_3_sigvoltswitch_proc()
2977 OSL_DELAY(1 * 1000); in sdstd_3_sigvoltswitch_proc()
2981 presst = sdstd_rreg(sd, SD_PresentState); in sdstd_3_sigvoltswitch_proc()
2991 sdstd_set_highspeed_mode(sdioh_info_t *sd, bool HSMode) in sdstd_set_highspeed_mode() argument
2999 reg8 = sdstd_rreg8(sd, SD_HostCntrl); in sdstd_set_highspeed_mode()
3002 if (sd_hiok && (GFIELD(sd->caps, CAP_HIGHSPEED)) == 0) { in sdstd_set_highspeed_mode()
3003 sd_err(("Host Controller does not support hi-speed mode.\n")); in sdstd_set_highspeed_mode()
3007 sd_info(("Attempting to enable High-Speed mode.\n")); in sdstd_set_highspeed_mode()
3009 if ((status = sdstd_card_regread(sd, 0, SDIOD_CCCR_SPEED_CONTROL, in sdstd_set_highspeed_mode()
3010 1, ®data)) != SUCCESS) { in sdstd_set_highspeed_mode()
3014 sd_info(("Device supports High-Speed mode.\n")); in sdstd_set_highspeed_mode()
3020 if ((status = sdstd_card_regwrite(sd, 0, SDIOD_CCCR_SPEED_CONTROL, in sdstd_set_highspeed_mode()
3021 1, regdata)) != BCME_OK) { in sdstd_set_highspeed_mode()
3025 if ((status = sdstd_card_regread(sd, 0, SDIOD_CCCR_SPEED_CONTROL, in sdstd_set_highspeed_mode()
3026 1, ®data)) != BCME_OK) { in sdstd_set_highspeed_mode()
3032 reg8 = SFIELD(reg8, HOST_HI_SPEED_EN, 1); in sdstd_set_highspeed_mode()
3034 sd_err(("High-speed clocking mode enabled.\n")); in sdstd_set_highspeed_mode()
3037 sd_err(("Device does not support High-Speed Mode.\n")); in sdstd_set_highspeed_mode()
3042 if ((status = sdstd_card_regread(sd, 0, SDIOD_CCCR_SPEED_CONTROL, in sdstd_set_highspeed_mode()
3043 1, ®data)) != BCME_OK) { in sdstd_set_highspeed_mode()
3048 if ((status = sdstd_card_regwrite(sd, 0, SDIOD_CCCR_SPEED_CONTROL, in sdstd_set_highspeed_mode()
3049 1, regdata)) != BCME_OK) { in sdstd_set_highspeed_mode()
3054 sd_err(("High-speed clocking mode disabled.\n")); in sdstd_set_highspeed_mode()
3058 if ((sd->host_UHSISupported) && (sd->card_UHSI_voltage_Supported)) { in sdstd_set_highspeed_mode()
3063 if ((status = sdstd_card_regread(sd, 0, SDIOD_CCCR_DRIVER_STRENGTH, in sdstd_set_highspeed_mode()
3064 1, &drvstrn)) != BCME_OK) { in sdstd_set_highspeed_mode()
3074 if ((status = sdstd_card_regwrite(sd, 0, SDIOD_CCCR_DRIVER_STRENGTH, in sdstd_set_highspeed_mode()
3075 1, drvstrn)) != BCME_OK) { in sdstd_set_highspeed_mode()
3082 sdstd_wreg8(sd, SD_HostCntrl, reg8); in sdstd_set_highspeed_mode()
3093 sdstd_set_dma_mode(sdioh_info_t *sd, int8 dma_mode) in sdstd_set_dma_mode() argument
3096 int8 prev_dma_mode = sd->sd_dma_mode; in sdstd_set_dma_mode()
3102 if (GFIELD(sd->caps, CAP_ADMA2)) { in sdstd_set_dma_mode()
3103 sd->sd_dma_mode = DMA_MODE_ADMA2; in sdstd_set_dma_mode()
3105 } else if (GFIELD(sd->caps, CAP_ADMA1)) { in sdstd_set_dma_mode()
3106 sd->sd_dma_mode = DMA_MODE_ADMA1; in sdstd_set_dma_mode()
3108 } else if (GFIELD(sd->caps, CAP_DMA)) { in sdstd_set_dma_mode()
3109 sd->sd_dma_mode = DMA_MODE_SDMA; in sdstd_set_dma_mode()
3111 sd->sd_dma_mode = DMA_MODE_NONE; in sdstd_set_dma_mode()
3115 sd->sd_dma_mode = DMA_MODE_NONE; in sdstd_set_dma_mode()
3118 if (GFIELD(sd->caps, CAP_DMA)) { in sdstd_set_dma_mode()
3119 sd->sd_dma_mode = DMA_MODE_SDMA; in sdstd_set_dma_mode()
3122 sd->sd_dma_mode = DMA_MODE_NONE; in sdstd_set_dma_mode()
3126 if (GFIELD(sd->caps, CAP_ADMA1)) { in sdstd_set_dma_mode()
3127 sd->sd_dma_mode = DMA_MODE_ADMA1; in sdstd_set_dma_mode()
3131 sd->sd_dma_mode = DMA_MODE_NONE; in sdstd_set_dma_mode()
3135 if (GFIELD(sd->caps, CAP_ADMA2)) { in sdstd_set_dma_mode()
3136 sd->sd_dma_mode = DMA_MODE_ADMA2; in sdstd_set_dma_mode()
3140 sd->sd_dma_mode = DMA_MODE_NONE; in sdstd_set_dma_mode()
3145 sd->sd_dma_mode = DMA_MODE_NONE; in sdstd_set_dma_mode()
3150 sd->sd_dma_mode = DMA_MODE_NONE; in sdstd_set_dma_mode()
3155 sdstd_wreg(sd, SD_SysAddr, 0); in sdstd_set_dma_mode()
3157 sd_err(("%s: %s mode selected.\n", __FUNCTION__, dma_mode_description[sd->sd_dma_mode])); in sdstd_set_dma_mode()
3159 reg8 = sdstd_rreg8(sd, SD_HostCntrl); in sdstd_set_dma_mode()
3161 sdstd_wreg8(sd, SD_HostCntrl, reg8); in sdstd_set_dma_mode()
3168 sdstd_start_clock(sdioh_info_t *sd, uint16 new_sd_divisor) in sdstd_start_clock() argument
3177 sdstd_wreg16(sd, SD_ClockCntrl, in sdstd_start_clock()
3178 sdstd_rreg16(sd, SD_ClockCntrl) & ~((uint16)0x4)); /* Disable the HC clock */ in sdstd_start_clock()
3181 if (sd->host_UHSISupported) { in sdstd_start_clock()
3182 divisor = (new_sd_divisor >> 1); in sdstd_start_clock()
3188 divisor = (new_sd_divisor >> 1) << 8; in sdstd_start_clock()
3191 sd_info(("Clock control is 0x%x\n", sdstd_rreg16(sd, SD_ClockCntrl))); in sdstd_start_clock()
3192 if (sd->host_UHSISupported) { in sdstd_start_clock()
3194 * bits 0-7 are in 15-8 and 9-8 are in 7-6 of clkctrl in sdstd_start_clock()
3201 sdstd_mod_reg16(sd, SD_ClockCntrl, 0xffC0, val1); in sdstd_start_clock()
3204 sdstd_mod_reg16(sd, SD_ClockCntrl, 0xff00, divisor); in sdstd_start_clock()
3211 __FUNCTION__, GFIELD(sd->caps, CAP_BASECLK)*1000000/new_sd_divisor)); in sdstd_start_clock()
3213 sd_err(("Using Primary Clock Freq of %d MHz\n", GFIELD(sd->caps, CAP_BASECLK))); in sdstd_start_clock()
3214 sd_info(("Primary Clock Freq = %d MHz\n", GFIELD(sd->caps, CAP_BASECLK))); in sdstd_start_clock()
3215 if (GFIELD(sd->caps, CAP_TO_CLKFREQ) == 50) { in sdstd_start_clock()
3219 } else if (GFIELD(sd->caps, CAP_TO_CLKFREQ) == 48) { in sdstd_start_clock()
3223 } else if (GFIELD(sd->caps, CAP_TO_CLKFREQ) == 33) { in sdstd_start_clock()
3227 } else if (GFIELD(sd->caps, CAP_TO_CLKFREQ) == 31) { in sdstd_start_clock()
3231 } else if (GFIELD(sd->caps, CAP_TO_CLKFREQ) == 8) { in sdstd_start_clock()
3235 } else if (sd->controller_type == SDIOH_TYPE_BCM27XX) { in sdstd_start_clock()
3238 GFIELD(sd->caps, CAP_BASECLK))); in sdstd_start_clock()
3239 sd_err(("Consult SD Host Controller Spec: Clock Control Register\n")); in sdstd_start_clock()
3243 sdstd_or_reg16(sd, SD_ClockCntrl, 0x1); /* Enable the clock */ in sdstd_start_clock()
3246 rc = (sdstd_rreg16(sd, SD_ClockCntrl) & 2); in sdstd_start_clock()
3249 OSL_DELAY(1); in sdstd_start_clock()
3251 rc = (sdstd_rreg16(sd, SD_ClockCntrl) & 2); in sdstd_start_clock()
3260 sdstd_or_reg16(sd, SD_ClockCntrl, 0x4); in sdstd_start_clock()
3268 if (GFIELD(sd->caps, CAP_BASECLK) < 50) in sdstd_start_clock()
3276 while (toval && !(divisor & 1)) { in sdstd_start_clock()
3277 toval -= 1; in sdstd_start_clock()
3278 divisor >>= 1; in sdstd_start_clock()
3281 regdata = sdstd_rreg16(sd, SD_ErrorIntrStatusEnable); in sdstd_start_clock()
3282 sdstd_wreg16(sd, SD_ErrorIntrStatusEnable, (regdata & ~ERRINT_DATA_TIMEOUT_BIT)); in sdstd_start_clock()
3283 sdstd_wreg8(sd, SD_TimeoutCntrl, (uint8)toval); in sdstd_start_clock()
3284 sdstd_wreg16(sd, SD_ErrorIntrStatusEnable, regdata); in sdstd_start_clock()
3289 regdata = sdstd_rreg16(sd, SD_ErrorIntrStatusEnable); in sdstd_start_clock()
3290 sdstd_wreg16(sd, SD_ErrorIntrStatusEnable, (regdata & ~ERRINT_DATA_TIMEOUT_BIT)); in sdstd_start_clock()
3295 sd_info(("Final Clock control is 0x%x\n", sdstd_rreg16(sd, SD_ClockCntrl))); in sdstd_start_clock()
3301 sdstd_start_power(sdioh_info_t *sd, int volts_req) in sdstd_start_power() argument
3314 sd->card_UHSI_voltage_Supported = FALSE; in sdstd_start_power()
3323 sdstd_wreg8(sd, SD_PwrCntrl, 0); in sdstd_start_power()
3329 volts_req = 1; in sdstd_start_power()
3333 if (volts_req == 1) { in sdstd_start_power()
3334 if (GFIELD(sd->caps, CAP_VOLT_1_8)) { in sdstd_start_power()
3348 if (GFIELD(sd->caps, CAP_VOLT_3_0)) { in sdstd_start_power()
3361 if (GFIELD(sd->caps, CAP_VOLT_3_3)) { in sdstd_start_power()
3374 pwr = SFIELD(pwr, PWR_BUS_EN, 1); in sdstd_start_power()
3375 sdstd_wreg8(sd, SD_PwrCntrl, pwr); /* Set Voltage level */ in sdstd_start_power()
3379 if ((sd->version == HOST_CONTR_VER_3) && (volts == 5)) { in sdstd_start_power()
3380 val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_start_power()
3381 val1 = SFIELD(val1, HOSTCtrl2_1_8SIG_EN, 1); in sdstd_start_power()
3382 sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_start_power()
3393 baseclk = GFIELD(sd->caps, CAP_BASECLK); in sdstd_start_power()
3396 if (sd->host_UHSISupported) { in sdstd_start_power()
3399 if (GFIELD(sd->caps3, CAP3_CLK_MULT) != 0) { in sdstd_start_power()
3400 sd_err(("%s:Possible error: CLK Mul 1 CLOCKING NOT supported!\n", in sdstd_start_power()
3425 if (!sdstd_start_clock(sd, init_divider)) { in sdstd_start_power()
3435 if (get_ocr(sd, &cmd_arg, &cmd_rsp) != SUCCESS) { in sdstd_start_power()
3452 sd->num_funcs = GFIELD(cmd_rsp, RSP4_NUM_FUNCS); in sdstd_start_power()
3455 * so look for 3.2-3.3 Volts and also 3.3-3.4 volts. in sdstd_start_power()
3466 if ((sd->host_UHSISupported) && (volts == 5)) { in sdstd_start_power()
3468 cmd_arg = SFIELD(cmd_arg, CMD5_S18R, 1); in sdstd_start_power()
3471 get_ocr(sd, &cmd_arg, &cmd_rsp); in sdstd_start_power()
3474 if ((sd->host_UHSISupported)) { in sdstd_start_power()
3476 if (GFIELD(cmd_rsp, RSP4_S18A) == 1) { in sdstd_start_power()
3477 if (sdstd_3_sigvoltswitch_proc(sd)) { in sdstd_start_power()
3484 sd->card_UHSI_voltage_Supported = TRUE; in sdstd_start_power()
3489 * 1) means card is NOT sdio3.0 . Note that in sdstd_start_power()
3494 * sd->card_UHSI_voltage_Supported = TRUE; in sdstd_start_power()
3496 * val1 = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_start_power()
3497 * val1 = SFIELD(val1, HOSTCtrl2_1_8SIG_EN, 1); in sdstd_start_power()
3498 * sdstd_wreg16(sd, SD3_HostCntrl2, val1); in sdstd_start_power()
3501 __FUNCTION__, sd->host_UHSISupported, volts)); in sdstd_start_power()
3511 sdstd_bus_width(sdioh_info_t *sd, int new_mode) in sdstd_bus_width() argument
3518 if (sd->sd_mode == new_mode) { in sdstd_bus_width()
3524 if ((status = sdstd_card_regread (sd, 0, SDIOD_CCCR_BICTRL, 1, ®data)) != SUCCESS) in sdstd_bus_width()
3536 if ((status = sdstd_card_regwrite (sd, 0, SDIOD_CCCR_BICTRL, 1, regdata)) != SUCCESS) in sdstd_bus_width()
3539 if (sd->host_UHSISupported) { in sdstd_bus_width()
3543 if ((status = sdstd_card_regread (sd, 0, SDIOD_CCCR_INTR_EXTN, 1, in sdstd_bus_width()
3547 host_asyncint = sdstd_rreg16(sd, SD3_HostCntrl2); in sdstd_bus_width()
3552 (GFIELD(sd->caps, CAP_ASYNCINT_SUP))) { in sdstd_bus_width()
3554 card_asyncint = SFIELD(card_asyncint, SDIO_BUS_ASYNCINT_SEL, 1); in sdstd_bus_width()
3556 if ((status = sdstd_card_regwrite (sd, 0, in sdstd_bus_width()
3557 SDIOD_CCCR_INTR_EXTN, 1, card_asyncint)) != SUCCESS) in sdstd_bus_width()
3563 HOSTCtrl2_ASYINT_EN, 1); in sdstd_bus_width()
3564 sdstd_wreg16(sd, SD3_HostCntrl2, host_asyncint); in sdstd_bus_width()
3574 reg8 = sdstd_rreg8(sd, SD_HostCntrl) & ~SD4_MODE; in sdstd_bus_width()
3577 sdstd_wreg8(sd, SD_HostCntrl, reg8); in sdstd_bus_width()
3579 sd->sd_mode = new_mode; in sdstd_bus_width()
3585 sdstd_driver_init(sdioh_info_t *sd) in sdstd_driver_init() argument
3588 sd->sd3_tuning_reqd = FALSE; in sdstd_driver_init()
3589 sd->sd3_tuning_disable = FALSE; in sdstd_driver_init()
3590 if ((sdstd_host_init(sd)) != SUCCESS) { in sdstd_driver_init()
3595 if ((sd->controller_type == SDIOH_TYPE_RICOH_R5C822) && (sd->version == HOST_CONTR_VER_3)) in sdstd_driver_init()
3597 sdstd_wreg16(sd, SD3_WL_BT_reset_register, 0x8); in sdstd_driver_init()
3599 sdstd_wreg16(sd, SD3_WL_BT_reset_register, 0x0); in sdstd_driver_init()
3603 if (sdstd_client_init(sd) != SUCCESS) { in sdstd_driver_init()
3608 if ((TRUE != sd3_sw_override1) && SD3_TUNING_REQD(sd, sd_uhsimode)) { in sdstd_driver_init()
3609 sd->sd3_tuning_reqd = TRUE; in sdstd_driver_init()
3612 sdstd_3_osinit_tuning(sd); in sdstd_driver_init()
3615 if (GFIELD(sd->caps3, CAP3_RETUNING_MODES)) { in sdstd_driver_init()
3617 sd->intmask |= HC_INTR_RETUNING; in sdstd_driver_init()
3618 sdstd_wreg16(sd, SD_IntrSignalEnable, sd->intmask); in sdstd_driver_init()
3621 sdstd_rreg16(sd, SD_IntrSignalEnable); /* Sync readback */ in sdstd_driver_init()
3630 sdstd_get_cisaddr(sdioh_info_t *sd, uint32 regaddr) in sdstd_get_cisaddr() argument
3637 if ((sdstd_card_regread (sd, 0, regaddr, 1, ®data)) != SUCCESS) in sdstd_get_cisaddr()
3643 /* Only the lower 17-bits are valid */ in sdstd_get_cisaddr()
3650 sdstd_card_enablefuncs(sdioh_info_t *sd) in sdstd_card_enablefuncs() argument
3660 sd->com_cis_ptr = sdstd_get_cisaddr(sd, SDIOD_CCCR_CISPTR_0); in sdstd_card_enablefuncs()
3661 sd->func_cis_ptr[0] = sd->com_cis_ptr; in sdstd_card_enablefuncs()
3662 sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __FUNCTION__, sd->com_cis_ptr)); in sdstd_card_enablefuncs()
3665 for (fbraddr = SDIOD_FBR_STARTADDR, func = 1; in sdstd_card_enablefuncs()
3666 func <= sd->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) { in sdstd_card_enablefuncs()
3667 sd->func_cis_ptr[func] = sdstd_get_cisaddr(sd, SDIOD_FBR_CISPTR_0 + fbraddr); in sdstd_card_enablefuncs()
3669 __FUNCTION__, func, sd->func_cis_ptr[func])); in sdstd_card_enablefuncs()
3672 /* Enable function 1 on the card */ in sdstd_card_enablefuncs()
3674 if ((status = sdstd_card_regwrite(sd, 0, SDIOD_CCCR_IOEN, 1, regdata)) != SUCCESS) in sdstd_card_enablefuncs()
3682 sdstd_card_regread(sdioh_info_t *sd, int func, uint32 regaddr, int regsize, uint32 *data) in sdstd_card_regread() argument
3690 if ((func == 0) || (regsize == 1)) { in sdstd_card_regread()
3697 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_52, cmd_arg)) in sdstd_card_regread()
3701 sdstd_cmd_getrsp(sd, &rsp5, 1); in sdstd_card_regread()
3702 if (sdstd_rreg16(sd, SD_ErrorIntrStatus) != 0) { in sdstd_card_regread()
3703 sd_err(("%s: 1: ErrorintrStatus 0x%x\n", in sdstd_card_regread()
3704 __FUNCTION__, sdstd_rreg16(sd, SD_ErrorIntrStatus))); in sdstd_card_regread()
3719 cmd_arg = SFIELD(cmd_arg, CMD53_OP_CODE, 1); in sdstd_card_regread()
3725 sd->data_xfer_count = regsize; in sdstd_card_regread()
3730 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_53, cmd_arg)) in sdstd_card_regread()
3734 sdstd_cmd_getrsp(sd, &rsp5, 1); in sdstd_card_regread()
3744 if (sd->polled_mode) { in sdstd_card_regread()
3750 sdstd_os_yield(sd); in sdstd_card_regread()
3751 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_regread()
3757 } while (--retries && (GFIELD(int_reg, INTSTAT_BUF_READ_READY) == 0)); in sdstd_card_regread()
3763 sdstd_rreg16(sd, SD_ErrorIntrStatus), in sdstd_card_regread()
3764 sdstd_rreg(sd, SD_PresentState))); in sdstd_card_regread()
3765 sdstd_check_errs(sd, SDIOH_CMD_53, cmd_arg); in sdstd_card_regread()
3770 sdstd_wreg16(sd, SD_IntrStatus, SFIELD(0, INTSTAT_BUF_READ_READY, 1)); in sdstd_card_regread()
3772 *data = sdstd_rreg16(sd, SD_BufferDataPort0); in sdstd_card_regread()
3774 *data = sdstd_rreg(sd, SD_BufferDataPort0); in sdstd_card_regread()
3782 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_regread()
3788 } while (--retries && (GFIELD(int_reg, INTSTAT_XFER_COMPLETE) == 0)); in sdstd_card_regread()
3791 if (sdstd_check_errs(sd, SDIOH_CMD_53, cmd_arg)) in sdstd_card_regread()
3798 sdstd_rreg16(sd, SD_ErrorIntrStatus), in sdstd_card_regread()
3799 sdstd_rreg(sd, SD_PresentState))); in sdstd_card_regread()
3803 sdstd_wreg16(sd, SD_IntrStatus, SFIELD(0, INTSTAT_XFER_COMPLETE, 1)); in sdstd_card_regread()
3806 if (sd->polled_mode) { in sdstd_card_regread()
3814 check_client_intr(sdioh_info_t *sd) in check_client_intr() argument
3818 raw_int = sdstd_rreg16(sd, SD_IntrStatus); in check_client_intr()
3819 cur_int = raw_int & sd->intmask; in check_client_intr()
3822 /* Not an error -- might share interrupts... */ in check_client_intr()
3829 sdstd_os_lock_irqsave(sd, &flags); in check_client_intr()
3830 old_int = sdstd_rreg16(sd, SD_IntrStatusEnable); in check_client_intr()
3831 sdstd_wreg16(sd, SD_IntrStatusEnable, SFIELD(old_int, INTSTAT_CARD_INT, 0)); in check_client_intr()
3832 sdstd_os_unlock_irqrestore(sd, &flags); in check_client_intr()
3834 if (sd->client_intr_enabled && sd->use_client_ints) { in check_client_intr()
3835 sd->intrcount++; in check_client_intr()
3836 ASSERT(sd->intr_handler); in check_client_intr()
3837 ASSERT(sd->intr_handler_arg); in check_client_intr()
3838 (sd->intr_handler)(sd->intr_handler_arg); in check_client_intr()
3841 __FUNCTION__, sd->client_intr_enabled, sd->intr_handler)); in check_client_intr()
3843 sdstd_os_lock_irqsave(sd, &flags); in check_client_intr()
3844 old_int = sdstd_rreg16(sd, SD_IntrStatusEnable); in check_client_intr()
3845 sdstd_wreg16(sd, SD_IntrStatusEnable, SFIELD(old_int, INTSTAT_CARD_INT, 1)); in check_client_intr()
3846 sdstd_os_unlock_irqrestore(sd, &flags); in check_client_intr()
3849 sdstd_wreg16(sd, SD_IntrSignalEnable, 0); in check_client_intr()
3850 sdstd_wreg16(sd, SD_ErrorIntrSignalEnable, 0); in check_client_intr()
3851 sd->local_intrcount++; in check_client_intr()
3852 sd->got_hcint = TRUE; in check_client_intr()
3853 sd->last_intrstatus = cur_int; in check_client_intr()
3860 sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err) in sdstd_spinbits() argument
3866 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_spinbits()
3867 err_reg = sdstd_rreg16(sd, SD_ErrorIntrStatus); in sdstd_spinbits()
3873 } while (--retries && !(int_reg & norm) && !(err_reg & err)); in sdstd_spinbits()
3875 norm |= sd->intmask; in sdstd_spinbits()
3877 norm = SFIELD(norm, INTSTAT_ERROR_INT, 1); in sdstd_spinbits()
3878 sd->last_intrstatus = int_reg & norm; in sdstd_spinbits()
3883 sdstd_card_regwrite(sdioh_info_t *sd, int func, uint32 regaddr, int regsize, uint32 data) in sdstd_card_regwrite() argument
3890 if ((func == 0) || (regsize == 1)) { in sdstd_card_regwrite()
3896 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_52, cmd_arg)) in sdstd_card_regwrite()
3900 sdstd_cmd_getrsp(sd, &rsp5, 1); in sdstd_card_regwrite()
3908 cmd_arg = SFIELD(cmd_arg, CMD53_OP_CODE, 1); in sdstd_card_regwrite()
3914 sd->data_xfer_count = regsize; in sdstd_card_regwrite()
3919 if ((status = sdstd_cmd_issue(sd, USE_DMA(sd), SDIOH_CMD_53, cmd_arg)) in sdstd_card_regwrite()
3923 sdstd_cmd_getrsp(sd, &rsp5, 1); in sdstd_card_regwrite()
3932 if (sd->polled_mode) { in sdstd_card_regwrite()
3943 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_regwrite()
3944 } while (--retries && (GFIELD(int_reg, INTSTAT_BUF_WRITE_READY) == 0)); in sdstd_card_regwrite()
3950 sdstd_rreg16(sd, SD_ErrorIntrStatus), in sdstd_card_regwrite()
3951 sdstd_rreg(sd, SD_PresentState))); in sdstd_card_regwrite()
3952 sdstd_check_errs(sd, SDIOH_CMD_53, cmd_arg); in sdstd_card_regwrite()
3957 int_reg = SFIELD(int_reg, INTSTAT_BUF_WRITE_READY, 1); in sdstd_card_regwrite()
3958 sdstd_wreg16(sd, SD_IntrStatus, int_reg); in sdstd_card_regwrite()
3962 sdstd_wreg16(sd, SD_BufferDataPort0, (uint16) data); in sdstd_card_regwrite()
3964 sdstd_wreg(sd, SD_BufferDataPort0, data); in sdstd_card_regwrite()
3974 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_regwrite()
3975 } while (--retries && (GFIELD(int_reg, INTSTAT_XFER_COMPLETE) == 0)); in sdstd_card_regwrite()
3978 if (sdstd_check_errs(sd, SDIOH_CMD_53, cmd_arg)) in sdstd_card_regwrite()
3984 __FUNCTION__, sdstd_rreg(sd, SD_PresentState), in sdstd_card_regwrite()
3985 int_reg, sdstd_rreg16(sd, SD_ErrorIntrStatus), in sdstd_card_regwrite()
3986 sd->r_cnt, sd->t_cnt)); in sdstd_card_regwrite()
3989 sdstd_wreg16(sd, SD_IntrStatus, SFIELD(int_reg, INTSTAT_CARD_INT, 0)); in sdstd_card_regwrite()
3996 sdstd_cmd_getrsp(sdioh_info_t *sd, uint32 *rsp_buffer, int count /* num 32 bit words */) in sdstd_cmd_getrsp() argument
4005 *rsp_buffer++ = sdstd_rreg(sd, respaddr); in sdstd_cmd_getrsp()
4011 Note: options: 0 - default
4012 1 - tuning option: Means that, this cmd issue is as a part
4023 if ((sdioh_info->sd_mode == SDIOH_MODE_SPI) && in sdstd_cmd_issue()
4030 while ((GFIELD(sdstd_rreg(sdioh_info, SD_PresentState), PRES_CMD_INHIBIT)) && --retries) { in sdstd_cmd_issue()
4049 case SDIOH_CMD_0: /* Set Card to Idle State - No Response */ in sdstd_cmd_issue()
4059 case SDIOH_CMD_3: /* Ask card to send RCA - Response R6 */ in sdstd_cmd_issue()
4069 case SDIOH_CMD_5: /* Send Operation condition - Response R4 */ in sdstd_cmd_issue()
4079 case SDIOH_CMD_7: /* Select card - Response R1 */ in sdstd_cmd_issue()
4082 cmd_reg = SFIELD(cmd_reg, CMD_CRC_EN, 1); in sdstd_cmd_issue()
4083 cmd_reg = SFIELD(cmd_reg, CMD_INDEX_EN, 1); in sdstd_cmd_issue()
4089 case SDIOH_CMD_14: /* eSD Sleep - Response R1 */ in sdstd_cmd_issue()
4090 case SDIOH_CMD_11: /* Select card - Response R1 */ in sdstd_cmd_issue()
4093 cmd_reg = SFIELD(cmd_reg, CMD_CRC_EN, 1); in sdstd_cmd_issue()
4094 cmd_reg = SFIELD(cmd_reg, CMD_INDEX_EN, 1); in sdstd_cmd_issue()
4100 case SDIOH_CMD_15: /* Set card to inactive state - Response None */ in sdstd_cmd_issue()
4110 case SDIOH_CMD_19: /* clock tuning - Response R1 */ in sdstd_cmd_issue()
4113 cmd_reg = SFIELD(cmd_reg, CMD_CRC_EN, 1); in sdstd_cmd_issue()
4114 cmd_reg = SFIELD(cmd_reg, CMD_INDEX_EN, 1); in sdstd_cmd_issue()
4115 cmd_reg = SFIELD(cmd_reg, CMD_DATA_EN, 1); in sdstd_cmd_issue()
4119 * Hence Direction = 1 ( READ ) in sdstd_cmd_issue()
4121 xfer_reg = SFIELD(xfer_reg, XFER_DATA_DIRECTION, 1); in sdstd_cmd_issue()
4124 case SDIOH_CMD_52: /* IO R/W Direct (single byte) - Response R5 */ in sdstd_cmd_issue()
4134 cmd_reg = SFIELD(cmd_reg, CMD_CRC_EN, 1); in sdstd_cmd_issue()
4135 cmd_reg = SFIELD(cmd_reg, CMD_INDEX_EN, 1); in sdstd_cmd_issue()
4156 cmd_reg = SFIELD(cmd_reg, CMD_CRC_EN, 1); in sdstd_cmd_issue()
4157 cmd_reg = SFIELD(cmd_reg, CMD_INDEX_EN, 1); in sdstd_cmd_issue()
4158 cmd_reg = SFIELD(cmd_reg, CMD_DATA_EN, 1); in sdstd_cmd_issue()
4169 ASSERT(sdioh_info->sd_blockmode); in sdstd_cmd_issue()
4172 blocksize = MIN((int)sdioh_info->data_xfer_count, in sdstd_cmd_issue()
4173 sdioh_info->client_block_size[func]); in sdstd_cmd_issue()
4177 * it is the entire buffer length. For non-block or single block, in sdstd_cmd_issue()
4181 switch (sdioh_info->sd_dma_mode) { in sdstd_cmd_issue()
4185 (uint32)sdioh_info->dma_phys)); in sdstd_cmd_issue()
4186 sdstd_wreg(sdioh_info, SD_SysAddr, sdioh_info->dma_phys); in sdstd_cmd_issue()
4192 /* multi-descriptor is currently used only for hc3 */ in sdstd_cmd_issue()
4193 if ((sdioh_info->glom_info.count != 0) && in sdstd_cmd_issue()
4194 (sdioh_info->txglom_mode == SDPCM_TXGLOM_MDESC)) { in sdstd_cmd_issue()
4197 i < sdioh_info->glom_info.count-1; in sdstd_cmd_issue()
4200 glom_info = &(sdioh_info->glom_info); in sdstd_cmd_issue()
4203 glom_info->dma_phys_arr[i], in sdstd_cmd_issue()
4204 glom_info->nbytes[i], in sdstd_cmd_issue()
4211 sdioh_info->glom_info.dma_phys_arr[i], in sdstd_cmd_issue()
4212 sdioh_info->glom_info.nbytes[i], in sdstd_cmd_issue()
4221 sdioh_info->dma_phys, blockcount*blocksize, in sdstd_cmd_issue()
4231 sdioh_info->adma2_dscr_phys); in sdstd_cmd_issue()
4235 __FUNCTION__, sdioh_info->sd_dma_mode)); in sdstd_cmd_issue()
4247 if (sdioh_info->client_block_size[func] != blocksize) in sdstd_cmd_issue()
4250 if (blockcount > 1) { in sdstd_cmd_issue()
4251 xfer_reg = SFIELD(xfer_reg, XFER_MULTI_BLOCK, 1); in sdstd_cmd_issue()
4252 xfer_reg = SFIELD(xfer_reg, XFER_BLK_COUNT_EN, 1); in sdstd_cmd_issue()
4261 xfer_reg = SFIELD(xfer_reg, XFER_DATA_DIRECTION, 1); in sdstd_cmd_issue()
4267 PRES_DAT_INHIBIT) && --retries) { in sdstd_cmd_issue()
4289 * so, to do a 512-byte bytemode transfer, this in sdstd_cmd_issue()
4296 sdstd_wreg(sdioh_info, SD_SysAddr, sdioh_info->dma_phys); in sdstd_cmd_issue()
4302 xfer_reg = SFIELD(xfer_reg, XFER_DATA_DIRECTION, 1); in sdstd_cmd_issue()
4305 /* See table 2-8 Host Controller spec ver 1.00 */ in sdstd_cmd_issue()
4311 sdstd_wreg16(sdioh_info, SD_BlockCount, 1); in sdstd_cmd_issue()
4315 PRES_DAT_INHIBIT) && --retries) in sdstd_cmd_issue()
4335 if (sdioh_info->sd_mode == SDIOH_MODE_SPI) { in sdstd_cmd_issue()
4357 * So SD_BlockSize = 64 & SD_BlockCount = 1 in sdstd_cmd_issue()
4362 sdstd_wreg16(sdioh_info, SD_BlockCount, 1); in sdstd_cmd_issue()
4373 if (sdioh_info->polled_mode) { in sdstd_cmd_issue()
4389 } while (--retries && in sdstd_cmd_issue()
4401 sdstd_wreg8(sdioh_info, SD_SoftwareReset, SFIELD(0, SW_RESET_CMD, 1)); in sdstd_cmd_issue()
4411 SW_RESET_CMD)) && retries--); in sdstd_cmd_issue()
4423 int_reg = SFIELD(0, INTSTAT_CMD_COMPLETE, 1); in sdstd_cmd_issue()
4437 sdstd_card_buf(sdioh_info_t *sd, int rw, int func, bool fifo, uint32 addr, int nbytes, uint32 *data) in sdstd_card_buf() argument
4446 bool read = rw == SDIOH_READ ? 1 : 0; in sdstd_card_buf()
4461 __FUNCTION__, read ? "Rd" : "Wr", addr, nbytes, sd->r_cnt, sd->t_cnt)); in sdstd_card_buf()
4463 if (read) sd->r_cnt++; else sd->t_cnt++; in sdstd_card_buf()
4465 local_blockmode = sd->sd_blockmode; in sdstd_card_buf()
4466 local_dma = USE_DMA(sd); in sdstd_card_buf()
4470 if (!read && (func == SDIO_FUNC_2) && (sd->glom_info.count != 0)) { in sdstd_card_buf()
4473 for (ii = 0; ii < sd->glom_info.count; ii++) { in sdstd_card_buf()
4474 nbytes += sd->glom_info.nbytes[ii]; in sdstd_card_buf()
4476 ASSERT(nbytes <= sd->alloced_dma_size); in sdstd_card_buf()
4481 if (nbytes < sd->client_block_size[func]) { in sdstd_card_buf()
4483 nbytes, sd->client_block_size[func])); in sdstd_card_buf()
4488 if (!read && (func == SDIO_FUNC_2) && (sd->glom_info.count != 0)) { in sdstd_card_buf()
4490 localbuf = (uint8 *)MALLOC(sd->osh, nbytes); in sdstd_card_buf()
4492 for (i = 0; i < sd->glom_info.count; i++) { in sdstd_card_buf()
4493 bcopy(sd->glom_info.dma_buf_arr[i], in sdstd_card_buf()
4495 sd->glom_info.nbytes[i]); in sdstd_card_buf()
4496 offset += sd->glom_info.nbytes[i]; in sdstd_card_buf()
4503 blocksize = MIN(sd->client_block_size[func], nbytes); in sdstd_card_buf()
4506 cmd_arg = SFIELD(cmd_arg, CMD53_BLK_MODE, 1); in sdstd_card_buf()
4508 num_blocks = 1; in sdstd_card_buf()
4516 if ((func == SDIO_FUNC_2) && (sd->glom_info.count != 0)) { in sdstd_card_buf()
4518 * requirements. So copying pkt to 4K aligned pre-allocated pkt. in sdstd_card_buf()
4519 * Total length should not cross the pre-alloced memory size in sdstd_card_buf()
4521 if (sd->txglom_mode == SDPCM_TXGLOM_CPY) { in sdstd_card_buf()
4523 for (i = 0; i < sd->glom_info.count; i++) { in sdstd_card_buf()
4524 bcopy(sd->glom_info.dma_buf_arr[i], in sdstd_card_buf()
4525 (uint8 *)sd->dma_buf + total_bytes, in sdstd_card_buf()
4526 sd->glom_info.nbytes[i]); in sdstd_card_buf()
4527 total_bytes += sd->glom_info.nbytes[i]; in sdstd_card_buf()
4529 sd_sync_dma(sd, read, total_bytes); in sdstd_card_buf()
4534 bcopy(data, sd->dma_buf, nbytes); in sdstd_card_buf()
4535 sd_sync_dma(sd, read, nbytes); in sdstd_card_buf()
4542 cmd_arg = SFIELD(cmd_arg, CMD53_OP_CODE, 1); in sdstd_card_buf()
4551 sd->data_xfer_count = nbytes; in sdstd_card_buf()
4556 if ((status = sdstd_cmd_issue(sd, local_dma, SDIOH_CMD_53, cmd_arg)) != SUCCESS) { in sdstd_card_buf()
4561 sdstd_cmd_getrsp(sd, &rsp5, 1); in sdstd_card_buf()
4568 if (flags & 1) in sdstd_card_buf()
4600 int_bit = SFIELD(0, INTSTAT_BUF_READ_READY, 1); in sdstd_card_buf()
4602 int_bit = SFIELD(0, INTSTAT_BUF_WRITE_READY, 1); in sdstd_card_buf()
4605 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_buf()
4608 while (!(int_reg & int_bit) && --retries) { in sdstd_card_buf()
4610 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_buf()
4614 status = sdstd_waitbits(sd, int_bit, ERRINT_TRANSFER_ERRS, in sdstd_card_buf()
4617 case -1: in sdstd_card_buf()
4620 case -2: in sdstd_card_buf()
4631 sdstd_rreg16(sd, SD_ErrorIntrStatus), in sdstd_card_buf()
4632 sdstd_rreg(sd, SD_PresentState))); in sdstd_card_buf()
4633 sdstd_dumpregs(sd); in sdstd_card_buf()
4634 sdstd_check_errs(sd, SDIOH_CMD_53, cmd_arg); in sdstd_card_buf()
4639 sdstd_wreg16(sd, SD_IntrStatus, int_bit); in sdstd_card_buf()
4642 for (words = blocksize/4; words; words--) { in sdstd_card_buf()
4644 *data = sdstd_rreg(sd, SD_BufferDataPort0); in sdstd_card_buf()
4646 sdstd_wreg(sd, SD_BufferDataPort0, *data); in sdstd_card_buf()
4657 case 1: in sdstd_card_buf()
4660 *(data++) = (uint32)(sdstd_rreg8(sd, SD_BufferDataPort0)); in sdstd_card_buf()
4662 sdstd_wreg8(sd, SD_BufferDataPort0, in sdstd_card_buf()
4668 *(data++) = (uint32)sdstd_rreg16(sd, SD_BufferDataPort0); in sdstd_card_buf()
4670 sdstd_wreg16(sd, SD_BufferDataPort0, (uint16)(*(data++))); in sdstd_card_buf()
4674 * SD_BufferDataPort0[0-15] | SD_BufferDataPort1[16-23] in sdstd_card_buf()
4677 tmp = (uint32)sdstd_rreg16(sd, SD_BufferDataPort0); in sdstd_card_buf()
4678 tmp |= ((uint32)(sdstd_rreg8(sd, in sdstd_card_buf()
4683 sdstd_wreg16(sd, SD_BufferDataPort0, (uint16)tmp & 0xffff); in sdstd_card_buf()
4684 sdstd_wreg8(sd, SD_BufferDataPort1, in sdstd_card_buf()
4698 int_bit = SFIELD(0, INTSTAT_XFER_COMPLETE, 1); in sdstd_card_buf()
4701 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_buf()
4704 while (!(int_reg & int_bit) && --retries) { in sdstd_card_buf()
4706 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_buf()
4710 status = sdstd_waitbits(sd, int_bit, ERRINT_TRANSFER_ERRS, local_yield, &int_reg); in sdstd_card_buf()
4712 case -1: in sdstd_card_buf()
4715 case -2: in sdstd_card_buf()
4722 if (sdstd_check_errs(sd, SDIOH_CMD_53, cmd_arg)) in sdstd_card_buf()
4726 int_reg = sdstd_rreg16(sd, SD_IntrStatus); in sdstd_card_buf()
4731 sdstd_rreg(sd, SD_PresentState), int_reg, in sdstd_card_buf()
4732 sdstd_rreg16(sd, SD_ErrorIntrStatus), nbytes, in sdstd_card_buf()
4733 sd->r_cnt, sd->t_cnt)); in sdstd_card_buf()
4734 sdstd_dumpregs(sd); in sdstd_card_buf()
4743 int_reg = SFIELD(int_reg, INTSTAT_DMA_INT, 1); in sdstd_card_buf()
4745 sdstd_wreg16(sd, SD_IntrStatus, int_reg); in sdstd_card_buf()
4749 sd_sync_dma(sd, read, nbytes); in sdstd_card_buf()
4750 bcopy(sd->dma_buf, data, nbytes); in sdstd_card_buf()
4754 MFREE(sd->osh, localbuf, nbytes); in sdstd_card_buf()
4760 set_client_block_size(sdioh_info_t *sd, int func, int block_size) in set_client_block_size() argument
4765 if (func == 1) in set_client_block_size()
4769 sd->client_block_size[func] = block_size; in set_client_block_size()
4773 err = sdstd_card_regwrite(sd, 0, base+SDIOD_CCCR_BLKSIZE_0, 1, block_size & 0xff); in set_client_block_size()
4775 err = sdstd_card_regwrite(sd, 0, base+SDIOD_CCCR_BLKSIZE_1, 1, in set_client_block_size()
4787 /* Reset and re-initialize the device */
4798 sdstd_reset(si, 0, 1); in sdioh_sdio_reset()
4804 si->sd_mode = SDIOH_MODE_SD1; in sdioh_sdio_reset()
4807 si->card_init_done = FALSE; in sdioh_sdio_reset()
4812 sd_map_dma(sdioh_info_t * sd) in sd_map_dma() argument
4821 if ((sd->version == HOST_CONTR_VER_3) && sd_txglom) { in sd_map_dma()
4828 if ((va = DMA_ALLOC_CONSISTENT(sd->osh, dma_buf_size, SD_PAGE_BITS, &alloced, in sd_map_dma()
4829 &sd->dma_start_phys, 0x12)) == NULL) { in sd_map_dma()
4830 sd->sd_dma_mode = DMA_MODE_NONE; in sd_map_dma()
4831 sd->dma_start_buf = 0; in sd_map_dma()
4832 sd->dma_buf = (void *)0; in sd_map_dma()
4833 sd->dma_phys = 0; in sd_map_dma()
4834 sd->alloced_dma_size = 0; in sd_map_dma()
4837 sd->dma_start_buf = va; in sd_map_dma()
4838 sd->dma_buf = (void *)ROUNDUP((uintptr)va, SD_PAGE); in sd_map_dma()
4839 sd->dma_phys = ROUNDUP((sd->dma_start_phys), SD_PAGE); in sd_map_dma()
4840 sd->alloced_dma_size = alloced; in sd_map_dma()
4842 __FUNCTION__, sd->alloced_dma_size, sd->dma_buf, sd->dma_phys)); in sd_map_dma()
4843 sd_fill_dma_data_buf(sd, 0xA5); in sd_map_dma()
4846 if ((va = DMA_ALLOC_CONSISTENT(sd->osh, SD_PAGE, SD_PAGE_BITS, &alloced, in sd_map_dma()
4847 &sd->adma2_dscr_start_phys, 0x12)) == NULL) { in sd_map_dma()
4848 sd->sd_dma_mode = DMA_MODE_NONE; in sd_map_dma()
4849 sd->adma2_dscr_start_buf = 0; in sd_map_dma()
4850 sd->adma2_dscr_buf = (void *)0; in sd_map_dma()
4851 sd->adma2_dscr_phys = 0; in sd_map_dma()
4852 sd->alloced_adma2_dscr_size = 0; in sd_map_dma()
4856 sd->adma2_dscr_start_buf = va; in sd_map_dma()
4857 sd->adma2_dscr_buf = (void *)ROUNDUP((uintptr)va, SD_PAGE); in sd_map_dma()
4858 sd->adma2_dscr_phys = ROUNDUP((sd->adma2_dscr_start_phys), SD_PAGE); in sd_map_dma()
4859 sd->alloced_adma2_dscr_size = alloced; in sd_map_dma()
4861 __FUNCTION__, sd->alloced_adma2_dscr_size, sd->adma2_dscr_buf, in sd_map_dma()
4862 sd->adma2_dscr_phys)); in sd_map_dma()
4863 sd_clear_adma_dscr_buf(sd); in sd_map_dma()
4868 sd_unmap_dma(sdioh_info_t * sd) in sd_unmap_dma() argument
4870 if (sd->dma_start_buf) { in sd_unmap_dma()
4871 DMA_FREE_CONSISTENT(sd->osh, sd->dma_start_buf, sd->alloced_dma_size, in sd_unmap_dma()
4872 sd->dma_start_phys, 0x12); in sd_unmap_dma()
4875 if (sd->adma2_dscr_start_buf) { in sd_unmap_dma()
4876 DMA_FREE_CONSISTENT(sd->osh, sd->adma2_dscr_start_buf, sd->alloced_adma2_dscr_size, in sd_unmap_dma()
4877 sd->adma2_dscr_start_phys, 0x12); in sd_unmap_dma()
4882 sd_clear_adma_dscr_buf(sdioh_info_t *sd) in sd_clear_adma_dscr_buf() argument
4884 bzero((char *)sd->adma2_dscr_buf, SD_PAGE); in sd_clear_adma_dscr_buf()
4885 sd_dump_adma_dscr(sd); in sd_clear_adma_dscr_buf()
4889 sd_fill_dma_data_buf(sdioh_info_t *sd, uint8 data) in sd_fill_dma_data_buf() argument
4891 memset((char *)sd->dma_buf, data, SD_PAGE); in sd_fill_dma_data_buf()
4895 sd_create_adma_descriptor(sdioh_info_t *sd, uint32 index, in sd_create_adma_descriptor() argument
4901 adma2_dscr_table = sd->adma2_dscr_buf; in sd_create_adma_descriptor()
4902 adma1_dscr_table = sd->adma2_dscr_buf; in sd_create_adma_descriptor()
4904 switch (sd->sd_dma_mode) { in sd_create_adma_descriptor()
4917 index <<= 1; in sd_create_adma_descriptor()
4925 adma1_dscr_table[index+1].phys_addr_attr = addr_phys & 0xFFFFF000; in sd_create_adma_descriptor()
4926 adma1_dscr_table[index+1].phys_addr_attr |= (flags & 0x3f); in sd_create_adma_descriptor()
4930 __FUNCTION__, sd->sd_dma_mode)); in sd_create_adma_descriptor()
4936 sd_dump_adma_dscr(sdioh_info_t *sd) in sd_dump_adma_dscr() argument
4944 ASSERT(sd->adma2_dscr_buf != NULL); in sd_dump_adma_dscr()
4946 adma2_dscr_table = sd->adma2_dscr_buf; in sd_dump_adma_dscr()
4947 adma1_dscr_table = sd->adma2_dscr_buf; in sd_dump_adma_dscr()
4949 switch (sd->sd_dma_mode) { in sd_dump_adma_dscr()
4952 SD_PAGE, sd->adma2_dscr_buf, sd->adma2_dscr_phys)); in sd_dump_adma_dscr()
4953 sd_err((" #[Descr VA ] Buffer PA | Len | Flags (5:4 2 1 0)" in sd_dump_adma_dscr()
4955 while (adma2_dscr_table->len_attr & ADMA2_ATTRIBUTE_VALID) { in sd_dump_adma_dscr()
4956 flags = adma2_dscr_table->len_attr & 0xFFFF; in sd_dump_adma_dscr()
4968 i, adma2_dscr_table, adma2_dscr_table->phys_addr, in sd_dump_adma_dscr()
4969 adma2_dscr_table->len_attr >> 16, flags, flags_str)); in sd_dump_adma_dscr()
4976 adma2_dscr_table->phys_addr); in sd_dump_adma_dscr()
4985 SD_PAGE, sd->adma2_dscr_buf, sd->adma2_dscr_phys)); in sd_dump_adma_dscr()
4986 sd_err((" #[Descr VA ] Buffer PA | Flags (5:4 2 1 0) |\n")); in sd_dump_adma_dscr()
4988 for (i = 0; adma1_dscr_table->phys_addr_attr & ADMA2_ATTRIBUTE_VALID; i++) { in sd_dump_adma_dscr()
4989 flags = adma1_dscr_table->phys_addr_attr & 0x3F; in sd_dump_adma_dscr()
5002 adma1_dscr_table->phys_addr_attr & 0xFFFFF000, in sd_dump_adma_dscr()
5009 adma1_dscr_table->phys_addr_attr & 0xFFFFF000); in sd_dump_adma_dscr()
5022 sdstd_dumpregs(sdioh_info_t *sd) in sdstd_dumpregs() argument
5025 sdstd_rreg16(sd, SD_IntrStatus), in sdstd_dumpregs()
5026 sdstd_rreg16(sd, SD_ErrorIntrStatus))); in sdstd_dumpregs()
5028 sdstd_rreg16(sd, SD_IntrStatusEnable), in sdstd_dumpregs()
5029 sdstd_rreg16(sd, SD_ErrorIntrStatusEnable))); in sdstd_dumpregs()
5031 sdstd_rreg16(sd, SD_IntrSignalEnable), in sdstd_dumpregs()
5032 sdstd_rreg16(sd, SD_ErrorIntrSignalEnable))); in sdstd_dumpregs()