55 static void ai_reset_axi_to(si_info_t *sii, aidmp_t *ai);
152 	si_info_t *sii = SI_INFO(sih);  in ai_scan()  local
153 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_scan()
155 	axi_wrapper_t * axi_wrapper = sii->axi_wrapper;  in ai_scan()
166 		sii->curwrap = (void *)((uintptr)regs + SI_CORE_SIZE);  in ai_scan()
169 		OSL_PCI_WRITE_CONFIG(sii->osh, PCI_BAR0_WIN, 4, erombase);  in ai_scan()
187 	sii->axi_num_wrappers = 0;  in ai_scan()
203 			SI_VMSG(("Found END of erom after %d cores\n", sii->numcores));  in ai_scan()
244 				((CHIPTYPE(sii->pub.socitype) == SOCI_NAI) &&  in ai_scan()
258 					if ((sii->oob_router != 0) && (sii->oob_router != addrl)) {  in ai_scan()
259 						sii->oob_router1 = addrl;  in ai_scan()
261 						sii->oob_router = addrl;  in ai_scan()
271 		idx = sii->numcores;  in ai_scan()
371 				(sii->axi_num_wrappers < SI_MAX_AXI_WRAPPERS)) {  in ai_scan()
372 				axi_wrapper[sii->axi_num_wrappers].mfg = mfg;  in ai_scan()
373 				axi_wrapper[sii->axi_num_wrappers].cid = cid;  in ai_scan()
374 				axi_wrapper[sii->axi_num_wrappers].rev = crev;  in ai_scan()
375 				axi_wrapper[sii->axi_num_wrappers].wrapper_type = AI_MASTER_WRAPPER;  in ai_scan()
376 				axi_wrapper[sii->axi_num_wrappers].wrapper_addr = addrl;  in ai_scan()
377 				sii->axi_num_wrappers++;  in ai_scan()
380 					sii->axi_num_wrappers, mfg, cid, crev, addrl, sizel));  in ai_scan()
392 				ASSERT(sii->num_br < SI_MAXBR);  in ai_scan()
393 				sii->br_wrapba[sii->num_br++] = addrl;  in ai_scan()
417 				(sii->axi_num_wrappers < SI_MAX_AXI_WRAPPERS)) {  in ai_scan()
418 				axi_wrapper[sii->axi_num_wrappers].mfg = mfg;  in ai_scan()
419 				axi_wrapper[sii->axi_num_wrappers].cid = cid;  in ai_scan()
420 				axi_wrapper[sii->axi_num_wrappers].rev = crev;  in ai_scan()
421 				axi_wrapper[sii->axi_num_wrappers].wrapper_type = AI_SLAVE_WRAPPER;  in ai_scan()
433 					axi_wrapper[sii->axi_num_wrappers].wrapper_addr =  in ai_scan()
436 					axi_wrapper[sii->axi_num_wrappers].wrapper_addr = addrl;  in ai_scan()
439 				sii->axi_num_wrappers++;  in ai_scan()
443 					sii->axi_num_wrappers,  mfg, cid, crev, addrl, sizel));  in ai_scan()
454 		sii->numcores++;  in ai_scan()
460 	sii->numcores = 0;  in ai_scan()
473 	si_info_t *sii = SI_INFO(sih);  in _ai_setcoreidx()  local
474 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in _ai_setcoreidx()
478 	if (coreidx >= MIN(sii->numcores, SI_MAXCORES))  in _ai_setcoreidx()
489 		(cores_info->coreid[sii->curidx] != APB_BRIDGE_CORE_ID))  in _ai_setcoreidx()
496 		ASSERT((sii->intrsenabled_fn == NULL) ||  in _ai_setcoreidx()
497 			!(*(sii)->intrsenabled_fn)((sii)->intr_arg));  in _ai_setcoreidx()
508 		sii->curmap = regs = cores_info->regs[coreidx];  in _ai_setcoreidx()
523 			sii->curwrap = cores_info->wrappers3[coreidx];  in _ai_setcoreidx()
525 			sii->curwrap = cores_info->wrappers2[coreidx];  in _ai_setcoreidx()
527 			sii->curwrap = cores_info->wrappers[coreidx];  in _ai_setcoreidx()
540 			OSL_PCI_WRITE_CONFIG(sii->osh, PCI_BAR0_WIN, 4, addr);  in _ai_setcoreidx()
543 		regs = sii->curmap;  in _ai_setcoreidx()
547 		if (PCIE_GEN2(sii))  in _ai_setcoreidx()
548 			OSL_PCI_WRITE_CONFIG(sii->osh, PCIE2_BAR0_WIN2, 4, wrap);  in _ai_setcoreidx()
550 			OSL_PCI_WRITE_CONFIG(sii->osh, PCI_BAR0_WIN2, 4, wrap);  in _ai_setcoreidx()
556 		sii->curmap = regs = (void *)((uintptr)addr);  in _ai_setcoreidx()
558 			sii->curwrap = (void *)((uintptr)wrap2);  in _ai_setcoreidx()
560 			sii->curwrap = (void *)((uintptr)wrap);  in _ai_setcoreidx()
571 	sii->curmap = regs;  in _ai_setcoreidx()
572 	sii->curidx = coreidx;  in _ai_setcoreidx()
598 	si_info_t *sii = SI_INFO(sih);  in ai_coreaddrspaceX()  local
599 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_coreaddrspaceX()
606 	for (i = 0; i < sii->numcores; i++) {  in ai_coreaddrspaceX()
615 	erombase = R_REG(sii->osh, &cc->eromptr);  in ai_coreaddrspaceX()
619 	cidx = sii->curidx;  in ai_coreaddrspaceX()
700 	si_info_t *sii = SI_INFO(sih);  in ai_addrspace()  local
701 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_addrspace()
704 	cidx = sii->curidx;  in ai_addrspace()
733 	si_info_t *sii = SI_INFO(sih);  in ai_addrspacesize()  local
734 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_addrspacesize()
737 	cidx = sii->curidx;  in ai_addrspacesize()
758 	si_info_t *sii = SI_INFO(sih);  in ai_flag()  local
764 		return sii->curidx;  in ai_flag()
768 		return sii->curidx;  in ai_flag()
772 		idx = sii->curidx;  in ai_flag()
779 	ai = sii->curwrap;  in ai_flag()
782 	return (R_REG(sii->osh, &ai->oobselouta30) & 0x1f);  in ai_flag()
788 	si_info_t *sii = SI_INFO(sih);  in ai_flag_alt()  local
794 		return sii->curidx;  in ai_flag_alt()
797 	ai = sii->curwrap;  in ai_flag_alt()
799 	return ((R_REG(sii->osh, &ai->oobselouta30) >> AI_OOBSEL_1_SHIFT) & AI_OOBSEL_MASK);  in ai_flag_alt()
813 	si_info_t *sii = SI_INFO(sih);  in ai_wrap_reg()  local
814 	uint32 *addr = (uint32 *) ((uchar *)(sii->curwrap) + offset);  in ai_wrap_reg()
817 		uint32 w = R_REG(sii->osh, addr);  in ai_wrap_reg()
820 		W_REG(sii->osh, addr, w);  in ai_wrap_reg()
822 	return (R_REG(sii->osh, addr));  in ai_wrap_reg()
828 	si_info_t *sii = SI_INFO(sih);  in ai_corevendor()  local
829 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_corevendor()
832 	cia = cores_info->cia[sii->curidx];  in ai_corevendor()
839 	si_info_t *sii = SI_INFO(sih);  in ai_corerev()  local
840 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_corerev()
843 	cib = cores_info->cib[sii->curidx];  in ai_corerev()
857 	si_info_t *sii = SI_INFO(sih);  in ai_iscoreup()  local
860 	ai = sii->curwrap;  in ai_iscoreup()
862 	return (((R_REG(sii->osh, &ai->ioctrl) & (SICF_FGC | SICF_CLOCK_EN)) == SICF_CLOCK_EN) &&  in ai_iscoreup()
863 	        ((R_REG(sii->osh, &ai->resetctrl) & AIRC_RESET) == 0));  in ai_iscoreup()
883 	si_info_t *sii = SI_INFO(sih);  in ai_corereg()  local
884 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_corereg()
906 		if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) {  in ai_corereg()
910 			r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg()
912 		} else if (sii->pub.buscoreidx == coreidx) {  in ai_corereg()
917 			if (SI_FAST(sii))  in ai_corereg()
918 				r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg()
921 				r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg()
929 		INTR_OFF(sii, intr_val);  in ai_corereg()
932 		origidx = si_coreidx(&sii->pub);  in ai_corereg()
935 		r = (volatile uint32*) ((volatile uchar*) ai_setcoreidx(&sii->pub, coreidx) +  in ai_corereg()
942 		w = (R_REG(sii->osh, r) & ~mask) | val;  in ai_corereg()
943 		W_REG(sii->osh, r, w);  in ai_corereg()
947 	w = R_REG(sii->osh, r);  in ai_corereg()
952 			ai_setcoreidx(&sii->pub, origidx);  in ai_corereg()
954 		INTR_RESTORE(sii, intr_val);  in ai_corereg()
977 	si_info_t *sii = SI_INFO(sih);  in ai_corereg_writeonly()  local
978 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_corereg_writeonly()
1000 		if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) {  in ai_corereg_writeonly()
1004 			r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg_writeonly()
1006 		} else if (sii->pub.buscoreidx == coreidx) {  in ai_corereg_writeonly()
1011 			if (SI_FAST(sii))  in ai_corereg_writeonly()
1012 				r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg_writeonly()
1015 				r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg_writeonly()
1023 		INTR_OFF(sii, intr_val);  in ai_corereg_writeonly()
1026 		origidx = si_coreidx(&sii->pub);  in ai_corereg_writeonly()
1029 		r = (volatile uint32*) ((volatile uchar*) ai_setcoreidx(&sii->pub, coreidx) +  in ai_corereg_writeonly()
1036 		w = (R_REG(sii->osh, r) & ~mask) | val;  in ai_corereg_writeonly()
1037 		W_REG(sii->osh, r, w);  in ai_corereg_writeonly()
1043 			ai_setcoreidx(&sii->pub, origidx);  in ai_corereg_writeonly()
1045 		INTR_RESTORE(sii, intr_val);  in ai_corereg_writeonly()
1065 	si_info_t *sii = SI_INFO(sih);  in ai_corereg_addr()  local
1066 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_corereg_addr()
1087 		if ((cores_info->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) {  in ai_corereg_addr()
1091 			r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg_addr()
1093 		} else if (sii->pub.buscoreidx == coreidx) {  in ai_corereg_addr()
1098 			if (SI_FAST(sii))  in ai_corereg_addr()
1099 				r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg_addr()
1102 				r = (volatile uint32 *)((volatile char *)sii->curmap +  in ai_corereg_addr()
1110 		ASSERT(sii->curidx == coreidx);  in ai_corereg_addr()
1111 		r = (volatile uint32*) ((volatile uchar*)sii->curmap + regoff);  in ai_corereg_addr()
1120 	si_info_t *sii = SI_INFO(sih);  in ai_core_disable()  local
1125 	ASSERT(GOODREGS(sii->curwrap));  in ai_core_disable()
1126 	ai = sii->curwrap;  in ai_core_disable()
1129 	if (R_REG(sii->osh, &ai->resetctrl) & AIRC_RESET) {  in ai_core_disable()
1134 	SPINWAIT(((status = R_REG(sii->osh, &ai->resetstatus)) != 0), 300);  in ai_core_disable()
1140 		SPINWAIT(((status = R_REG(sii->osh, &ai->resetstatus)) != 0), 10000);  in ai_core_disable()
1145 	W_REG(sii->osh, &ai->resetctrl, AIRC_RESET);  in ai_core_disable()
1146 	dummy = R_REG(sii->osh, &ai->resetctrl);  in ai_core_disable()
1150 	W_REG(sii->osh, &ai->ioctrl, bits);  in ai_core_disable()
1151 	dummy = R_REG(sii->osh, &ai->ioctrl);  in ai_core_disable()
1164 	si_info_t *sii = SI_INFO(sih);  in _ai_core_reset()  local
1166 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in _ai_core_reset()
1172 	ASSERT(GOODREGS(sii->curwrap));  in _ai_core_reset()
1173 	ai = sii->curwrap;  in _ai_core_reset()
1176 	SPINWAIT(((dummy = R_REG(sii->osh, &ai->resetstatus)) != 0), SPINWAIT_TIME_US);  in _ai_core_reset()
1179 	W_REG(sii->osh, &ai->resetctrl, AIRC_RESET);  in _ai_core_reset()
1183 	SPINWAIT((R_REG(sii->osh, &ai->resetstatus) != 0), SPINWAIT_TIME_US);  in _ai_core_reset()
1185 	W_REG(sii->osh, &ai->ioctrl, (bits | resetbits | SICF_FGC | SICF_CLOCK_EN));  in _ai_core_reset()
1186 	dummy = R_REG(sii->osh, &ai->ioctrl);  in _ai_core_reset()
1189 	if (cores_info->coreid[sii->curidx] == D11_CORE_ID) {  in _ai_core_reset()
1192 		W_REG(sii->osh, &ai->ioctrl, (dummy & (~SICF_FGC)));  in _ai_core_reset()
1196 	SPINWAIT(((dummy = R_REG(sii->osh, &ai->resetstatus)) != 0), SPINWAIT_TIME_US);  in _ai_core_reset()
1198 	while (R_REG(sii->osh, &ai->resetctrl) != 0 && --loop_counter != 0) {  in _ai_core_reset()
1200 		SPINWAIT(((dummy = R_REG(sii->osh, &ai->resetstatus)) != 0), SPINWAIT_TIME_US);  in _ai_core_reset()
1203 		W_REG(sii->osh, &ai->resetctrl, 0);  in _ai_core_reset()
1206 		SPINWAIT((R_REG(sii->osh, &ai->resetstatus) != 0), SPINWAIT_TIME_US);  in _ai_core_reset()
1211 	W_REG(sii->osh, &ai->ioctrl, (bits | SICF_FGC | SICF_CLOCK_EN));  in _ai_core_reset()
1213 	W_REG(sii->osh, &ai->ioctrl, (bits | SICF_CLOCK_EN));  in _ai_core_reset()
1215 	dummy = R_REG(sii->osh, &ai->ioctrl);  in _ai_core_reset()
1218 	if (cores_info->coreid[sii->curidx] == D11_CORE_ID) {  in _ai_core_reset()
1221 		W_REG(sii->osh, &ai->ioctrl, (dummy & (~SICF_FGC)));  in _ai_core_reset()
1231 	si_info_t *sii = SI_INFO(sih);  in ai_core_reset()  local
1232 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_core_reset()
1233 	uint idx = sii->curidx;  in ai_core_reset()
1253 	si_info_t *sii = SI_INFO(sih);  in ai_core_cflags_wo()  local
1268 	ASSERT(GOODREGS(sii->curwrap));  in ai_core_cflags_wo()
1269 	ai = sii->curwrap;  in ai_core_cflags_wo()
1274 		w = ((R_REG(sii->osh, &ai->ioctrl) & ~mask) | val);  in ai_core_cflags_wo()
1275 		W_REG(sii->osh, &ai->ioctrl, w);  in ai_core_cflags_wo()
1282 	si_info_t *sii = SI_INFO(sih);  in ai_core_cflags()  local
1297 	ASSERT(GOODREGS(sii->curwrap));  in ai_core_cflags()
1298 	ai = sii->curwrap;  in ai_core_cflags()
1303 		w = ((R_REG(sii->osh, &ai->ioctrl) & ~mask) | val);  in ai_core_cflags()
1304 		W_REG(sii->osh, &ai->ioctrl, w);  in ai_core_cflags()
1307 	return R_REG(sii->osh, &ai->ioctrl);  in ai_core_cflags()
1313 	si_info_t *sii = SI_INFO(sih);  in ai_core_sflags()  local
1328 	ASSERT(GOODREGS(sii->curwrap));  in ai_core_sflags()
1329 	ai = sii->curwrap;  in ai_core_sflags()
1335 		w = ((R_REG(sii->osh, &ai->iostatus) & ~mask) | val);  in ai_core_sflags()
1336 		W_REG(sii->osh, &ai->iostatus, w);  in ai_core_sflags()
1339 	return R_REG(sii->osh, &ai->iostatus);  in ai_core_sflags()
1347 	si_info_t *sii = SI_INFO(sih);  in ai_dumpregs()  local
1352 	axi_wrapper_t * axi_wrapper = sii->axi_wrapper;  in ai_dumpregs()
1356 	osh = sii->osh;  in ai_dumpregs()
1359 	if (BUSTYPE(sii->pub.bustype) == PCI_BUS) {  in ai_dumpregs()
1360 		if (PCIE_GEN2(sii)) {  in ai_dumpregs()
1379 	for (i = 0; i < sii->axi_num_wrappers; i++) {  in ai_dumpregs()
1381 		if (BUSTYPE(sii->pub.bustype) == PCI_BUS) {  in ai_dumpregs()
1386 			ai = (aidmp_t *) ((volatile uint8*)sii->curmap + bar0_win_offset);  in ai_dumpregs()
1434 	if (BUSTYPE(sii->pub.bustype) == PCI_BUS) {  in ai_dumpregs()
1446 	si_info_t *sii = SI_INFO(sih);  in ai_update_backplane_timeouts()  local
1449 	axi_wrapper_t * axi_wrapper = sii->axi_wrapper;  in ai_update_backplane_timeouts()
1455 	osl_t *osh = sii->osh;  in ai_update_backplane_timeouts()
1460 	if ((sii->axi_num_wrappers == 0) ||  in ai_update_backplane_timeouts()
1462 		(!PCIE(sii)) ||  in ai_update_backplane_timeouts()
1466 			__FUNCTION__, sii->axi_num_wrappers, PCIE(sii),  in ai_update_backplane_timeouts()
1467 			BUSTYPE(sii->pub.bustype), sii->pub.buscoretype));  in ai_update_backplane_timeouts()
1473 	if (BUSTYPE(sii->pub.bustype) == PCI_BUS) {  in ai_update_backplane_timeouts()
1474 		if (PCIE_GEN1(sii)) {  in ai_update_backplane_timeouts()
1477 		} else if (PCIE_GEN2(sii)) {  in ai_update_backplane_timeouts()
1493 	for (i = 0; i < sii->axi_num_wrappers; ++i) {  in ai_update_backplane_timeouts()
1509 		if (BUSTYPE(sii->pub.bustype) == PCI_BUS) {  in ai_update_backplane_timeouts()
1515 			ai = (aidmp_t *) (DISCARD_QUAL(sii->curmap, uint8) + offset);  in ai_update_backplane_timeouts()
1523 		W_REG(sii->osh, &ai->errlogctrl, errlogctrl);  in ai_update_backplane_timeouts()
1529 			R_REG(sii->osh, &ai->errlogctrl)));  in ai_update_backplane_timeouts()
1548 ai_ignore_errlog(si_info_t *sii, aidmp_t *ai,  in ai_ignore_errlog()  argument
1561 	switch (CHIPID(sii->pub.chip)) {  in ai_ignore_errlog()
1613 		ai_reset_axi_to(sii, ai);  in ai_ignore_errlog()
1629 	si_info_t *sii = SI_INFO(sih);  in ai_get_apb_bridge()  local
1632 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_get_apb_bridge()
1634 	if (coreidx >= MIN(sii->numcores, SI_MAXCORES))  in ai_get_apb_bridge()
1649 	for (i = 0; i < sii->numcores; i++) {  in ai_get_apb_bridge()
1676 	si_info_t *sii = SI_INFO(sih);  in ai_clear_backplane_to_fast()  local
1677 	volatile void *curmap = sii->curmap;  in ai_clear_backplane_to_fast()
1690 		if (ai_get_apb_bridge(sih, si_coreidx(&sii->pub),  in ai_clear_backplane_to_fast()
1728 	si_info_t *sii = SI_INFO(sih);  in ai_clear_backplane_to_per_core()  local
1739 	if ((sii->axi_num_wrappers == 0) ||  in ai_clear_backplane_to_per_core()
1741 		(!PCIE(sii)) ||  in ai_clear_backplane_to_per_core()
1745 			__FUNCTION__, sii->axi_num_wrappers, PCIE(sii),  in ai_clear_backplane_to_per_core()
1746 			BUSTYPE(sii->pub.bustype), sii->pub.buscoretype));  in ai_clear_backplane_to_per_core()
1774 	errlog_status = R_REG(sii->osh, &ai->errlogstatus);  in ai_clear_backplane_to_per_core()
1789 		W_REG(sii->osh, &ai->errlogdone, AIELD_ERRDONE_MASK);  in ai_clear_backplane_to_per_core()
1792 		while ((tmp = R_REG(sii->osh, &ai->errlogstatus)) & AIELS_TIMEOUT_MASK) {  in ai_clear_backplane_to_per_core()
1805 			W_REG(sii->osh, &ai->errlogdone, AIELD_ERRDONE_MASK);  in ai_clear_backplane_to_per_core()
1815 		errlog_lo = R_REG(sii->osh, &ai->errlogaddrlo);  in ai_clear_backplane_to_per_core()
1816 		errlog_hi = R_REG(sii->osh, &ai->errlogaddrhi);  in ai_clear_backplane_to_per_core()
1817 		errlog_id = R_REG(sii->osh, &ai->errlogid);  in ai_clear_backplane_to_per_core()
1818 		errlog_flags = R_REG(sii->osh, &ai->errlogflags);  in ai_clear_backplane_to_per_core()
1821 		if (ai_ignore_errlog(sii, ai, errlog_lo, errlog_hi, errlog_id,  in ai_clear_backplane_to_per_core()
1835 				ai_reset_axi_to(sii, ai);  in ai_clear_backplane_to_per_core()
1893 ai_reset_axi_to(si_info_t *sii, aidmp_t *ai)  in ai_reset_axi_to()  argument
1896 	OR_REG(sii->osh, &ai->resetctrl, AIRC_RESET);  in ai_reset_axi_to()
1898 	(void)R_REG(sii->osh, &ai->resetctrl);  in ai_reset_axi_to()
1900 	AND_REG(sii->osh, &ai->resetctrl, ~(AIRC_RESET));  in ai_reset_axi_to()
1902 	(void)R_REG(sii->osh, &ai->resetctrl);  in ai_reset_axi_to()
1904 	if (R_REG(sii->osh, &ai->resetctrl) & AIRC_RESET) {  in ai_reset_axi_to()
1933 	si_info_t *sii = SI_INFO(sih);  in ai_clear_backplane_to()  local
1936 	axi_wrapper_t * axi_wrapper = sii->axi_wrapper;  in ai_clear_backplane_to()
1940 	osl_t *osh = sii->osh;  in ai_clear_backplane_to()
1944 	if ((sii->axi_num_wrappers == 0) || (!PCIE(sii)))  in ai_clear_backplane_to()
1946 	if (sii->axi_num_wrappers == 0)  in ai_clear_backplane_to()
1950 			__FUNCTION__, sii->axi_num_wrappers, PCIE(sii),  in ai_clear_backplane_to()
1951 			BUSTYPE(sii->pub.bustype), sii->pub.buscoretype));  in ai_clear_backplane_to()
1957 	if (BUSTYPE(sii->pub.bustype) == PCI_BUS) {  in ai_clear_backplane_to()
1958 		if (PCIE_GEN1(sii)) {  in ai_clear_backplane_to()
1961 		} else if (PCIE_GEN2(sii)) {  in ai_clear_backplane_to()
1994 	for (i = 0; i < sii->axi_num_wrappers; ++i) {  in ai_clear_backplane_to()
2002 		if (BUSTYPE(sii->pub.bustype) == PCI_BUS) {  in ai_clear_backplane_to()
2008 			ai = (aidmp_t *) (DISCARD_QUAL(sii->curmap, uint8) + offset);  in ai_clear_backplane_to()
2037 	si_info_t *sii = SI_INFO(sih);  in ai_num_slaveports()  local
2038 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_num_slaveports()
2050 si_info_t *sii = SI_INFO(sih);  in ai_dump_APB_Bridge_registers()  local
2052 	ai = (aidmp_t *) sii->br_wrapba[0];  in ai_dump_APB_Bridge_registers()
2055 		R_REG(sii->osh, &ai->errlogaddrlo),  in ai_dump_APB_Bridge_registers()
2056 		R_REG(sii->osh, &ai->errlogaddrhi),  in ai_dump_APB_Bridge_registers()
2057 		R_REG(sii->osh, &ai->errlogid),  in ai_dump_APB_Bridge_registers()
2058 		R_REG(sii->osh, &ai->errlogflags));  in ai_dump_APB_Bridge_registers()
2059 	printf("\n status 0x%08x\n", R_REG(sii->osh, &ai->errlogstatus));  in ai_dump_APB_Bridge_registers()
2067 	si_info_t *sii = SI_INFO(sih);  in ai_force_clocks()  local
2071 	si_cores_info_t *cores_info = (si_cores_info_t *)sii->cores_info;  in ai_force_clocks()
2073 	ASSERT(GOODREGS(sii->curwrap));  in ai_force_clocks()
2074 	ai = sii->curwrap;  in ai_force_clocks()
2075 	if (cores_info->wrapba2[sii->curidx])  in ai_force_clocks()
2076 		ai_sec = REG_MAP(cores_info->wrapba2[sii->curidx], SI_CORE_SIZE);  in ai_force_clocks()
2079 	SPINWAIT((R_REG(sii->osh, &ai->resetstatus) != 0), 300);  in ai_force_clocks()
2082 		ioctrl = R_REG(sii->osh, &ai->ioctrl);  in ai_force_clocks()
2083 		W_REG(sii->osh, &ai->ioctrl, (ioctrl | SICF_FGC));  in ai_force_clocks()
2084 		dummy = R_REG(sii->osh, &ai->ioctrl);  in ai_force_clocks()
2087 			ioctrl = R_REG(sii->osh, &ai_sec->ioctrl);  in ai_force_clocks()
2088 			W_REG(sii->osh, &ai_sec->ioctrl, (ioctrl | SICF_FGC));  in ai_force_clocks()
2089 			dummy = R_REG(sii->osh, &ai_sec->ioctrl);  in ai_force_clocks()
2093 		ioctrl = R_REG(sii->osh, &ai->ioctrl);  in ai_force_clocks()
2094 		W_REG(sii->osh, &ai->ioctrl, (ioctrl & (~SICF_FGC)));  in ai_force_clocks()
2095 		dummy = R_REG(sii->osh, &ai->ioctrl);  in ai_force_clocks()
2098 			ioctrl = R_REG(sii->osh, &ai_sec->ioctrl);  in ai_force_clocks()
2099 			W_REG(sii->osh, &ai_sec->ioctrl, (ioctrl & (~SICF_FGC)));  in ai_force_clocks()
2100 			dummy = R_REG(sii->osh, &ai_sec->ioctrl);  in ai_force_clocks()
2105 	SPINWAIT((R_REG(sii->osh, &ai->resetstatus) != 0), 300);  in ai_force_clocks()