Lines Matching refs:chipcregs_t
124 ((regoff) == OFFSETOF(chipcregs_t, pmutimer) || \
125 (regoff) == OFFSETOF(chipcregs_t, pmuwatchdog) || \
126 (regoff) == OFFSETOF(chipcregs_t, res_req_timer))
153 static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, uint32 savewin,
171 static chipcregs_t * seci_set_core(si_t *sih, uint32 *origidx, bool *fast);
475 BCMATTACHFN(si_buscore_setup)(si_info_t *sii, chipcregs_t *cc, uint bustype, uint32 savewin, in BCMATTACHFN()
907 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, clk_ctl_st), CCS_FORCEHT, in BCMATTACHFN()
912 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, jtagctrl), in BCMATTACHFN()
931 chipcontrol = si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol), in BCMATTACHFN()
1037 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol), in BCMATTACHFN()
1077 offs = OFFSETOF(chipcregs_t, intmask); in si_gci_int_enable()
1229 if (si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, gpiocontrol), 0, 0) & mask) { in si_gpio_enable()
1786 si_gci_direct(sih, OFFSETOF(chipcregs_t, gci_seciauxtx), in si_gci_seci_init()
1790 si_gci_direct(sih, OFFSETOF(chipcregs_t, gci_corectrl), in si_gci_seci_init()
2646 BCMATTACHFN(si_alloc_coresinfo)(si_info_t *sii, osl_t *osh, chipcregs_t *cc) in BCMATTACHFN()
2705 chipcregs_t *cc; in BCMATTACHFN()
2757 cc = (chipcregs_t *)regs; in BCMATTACHFN()
2760 cc = (chipcregs_t *)sii->curmap; in BCMATTACHFN()
2763 cc = (chipcregs_t *)REG_MAP(SI_ENUM_BASE(sih), SI_CORE_SIZE); in BCMATTACHFN()
3087 cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in BCMATTACHFN()
4299 OFFSETOF(chipcregs_t, pmustatus); in BCMPOSTTRAPFN()
4626 chipcregs_t *cc; in BCMINITFN()
4639 cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in BCMINITFN()
4732 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, watchdog), ~0, in si_watchdog()
4736 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, watchdog), ~0, ticks); in si_watchdog()
5036 chipcregs_t *cc; in si_slowclk_src()
5048 cc = (chipcregs_t *)si_setcoreidx(&sii->pub, sii->curidx); in si_slowclk_src()
5057 si_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc) in si_slowclk_freq()
5096 chipcregs_t *cc = (chipcregs_t *)chipcregs; in BCMINITFN()
5126 chipcregs_t *cc; in BCMINITFN()
5136 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) in BCMINITFN()
5138 } else if ((cc = (chipcregs_t *)CCREGS_FAST(sii)) == NULL) in BCMINITFN()
5163 chipcregs_t *cc; in BCMINITFN()
5184 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) in BCMINITFN()
5186 } else if ((cc = (chipcregs_t *)CCREGS_FAST(sii)) == NULL) { in BCMINITFN()
5308 chipcregs_t *cc; in _si_clkctl_cc()
5323 cc = (chipcregs_t *) si_setcore(&sii->pub, CC_CORE_ID, 0); in _si_clkctl_cc()
5324 } else if ((cc = (chipcregs_t *) CCREGS_FAST(sii)) == NULL) in _si_clkctl_cc()
5623 if (offset > sizeof(chipcregs_t)) in BCMPOSTTRAPFN()
5634 chipcregs_t *cc; in sih_write_sraon()
5635 cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in sih_write_sraon()
5696 chipcregs_t *cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in si_pmu_keep_on()
5719 chipcregs_t *cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in si_pmu_keep_on_get()
6572 chipcregs_t *cc; in si_ccreg_dump()
6582 cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in si_ccreg_dump()
6617 chipcregs_t *cc; in si_clkctl_dump()
6626 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) in si_clkctl_dump()
6659 chipcregs_t *cc; in si_gpiodump()
6665 cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in si_gpiodump()
6720 regoff = OFFSETOF(chipcregs_t, gpiocontrol); in BCMPOSTTRAPFN()
6742 regoff = OFFSETOF(chipcregs_t, gpioouten); in BCMPOSTTRAPFN()
6764 regoff = OFFSETOF(chipcregs_t, gpioout); in BCMPOSTTRAPFN()
6832 regoff = OFFSETOF(chipcregs_t, gpioin); in si_gpioin()
6849 regoff = OFFSETOF(chipcregs_t, gpiointpolarity); in si_gpiointpolarity()
6866 regoff = OFFSETOF(chipcregs_t, gpiointmask); in si_gpiointmask()
6880 regoff = OFFSETOF(chipcregs_t, gpioeventintmask); in si_gpioeventintmask()
6892 offs = (updown ? OFFSETOF(chipcregs_t, gpiopulldown) : OFFSETOF(chipcregs_t, gpiopullup)); in si_gpiopull()
6905 offs = OFFSETOF(chipcregs_t, gpioevent); in si_gpioevent()
6907 offs = OFFSETOF(chipcregs_t, gpioeventintmask); in si_gpioevent()
6909 offs = OFFSETOF(chipcregs_t, gpioeventintpolarity); in si_gpioevent()
6924 offs = OFFSETOF(chipcregs_t, intmask); in BCMATTACHFN()
7399 chipcregs_t *cc = seci_set_core(sih, &origidx, &fast); in BCMPOSTTRAPFN()
7404 offset = OFFSETOF(chipcregs_t, clk_ctl_st); in BCMPOSTTRAPFN()
7482 static chipcregs_t *
7485 chipcregs_t *cc; in BCMPOSTTRAPFN()
7491 cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in BCMPOSTTRAPFN()
7494 cc = (chipcregs_t *)CCREGS_FAST(sii); in BCMPOSTTRAPFN()
7499 static chipcregs_t *
7502 chipcregs_t *cc = seci_set_core(sih, origidx, fast); in BCMPOSTTRAPFN()
7521 chipcregs_t *cc; in BCMPOSTTRAPFN()
7534 offset = OFFSETOF(chipcregs_t, SECI_statusmask); in BCMPOSTTRAPFN()
7538 offset = OFFSETOF(chipcregs_t, SECI_statusmask); in BCMPOSTTRAPFN()
7542 offset = OFFSETOF(chipcregs_t, SECI_status); in BCMPOSTTRAPFN()
7547 offset = OFFSETOF(chipcregs_t, seci_uart_msr); in BCMPOSTTRAPFN()
7552 offset = OFFSETOF(chipcregs_t, seci_uart_mcr); in BCMPOSTTRAPFN()
7566 offset = OFFSETOF(chipcregs_t, SECI_status); in BCMPOSTTRAPFN()
7572 offset = OFFSETOF(chipcregs_t, seci_uart_data); in BCMPOSTTRAPFN()
7576 offset = OFFSETOF(chipcregs_t, SECI_status); in BCMPOSTTRAPFN()
7623 chipcregs_t *cc; in BCMINITFN()
7654 cc = (chipcregs_t *)ptr; in BCMINITFN()
7687 offset = OFFSETOF(chipcregs_t, seci_uart_bauddiv); in BCMINITFN()
7694 offset = OFFSETOF(chipcregs_t, seci_uart_bauddiv); in BCMINITFN()
7696 offset = OFFSETOF(chipcregs_t, seci_uart_baudadj); in BCMINITFN()
7698 offset = OFFSETOF(chipcregs_t, seci_uart_mcr); in BCMINITFN()
7705 offset = OFFSETOF(chipcregs_t, eci.ge35.eci_uartfifolevel); in BCMINITFN()
7707 offset = OFFSETOF(chipcregs_t, seci_uart_mcr); in BCMINITFN()
7714 offset = OFFSETOF(chipcregs_t, seci_uart_baudadj); in BCMINITFN()
7716 offset = OFFSETOF(chipcregs_t, seci_uart_mcr); in BCMINITFN()
7722 offset = OFFSETOF(chipcregs_t, seci_uart_lcr); in BCMINITFN()
7725 offset = OFFSETOF(chipcregs_t, seci_uart_mcr); in BCMINITFN()
7731 offset = OFFSETOF(chipcregs_t, eci.ge35.eci_controllo); in BCMINITFN()
7733 offset = OFFSETOF(chipcregs_t, eci.ge35.eci_controlhi); in BCMINITFN()
7820 chipcregs_t *cc; in BCMINITFN()
7832 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) in BCMINITFN()
7834 } else if ((cc = (chipcregs_t *)CCREGS_FAST(sii)) == NULL) in BCMINITFN()
7896 OFFSETOF(chipcregs_t, eci.lt35.eci_output) : in si_eci_notify_bt()
7897 OFFSETOF(chipcregs_t, eci.ge35.eci_outputlo)), in si_eci_notify_bt()
7903 offset = OFFSETOF(chipcregs_t, eci.ge35.eci_outputhi); in si_eci_notify_bt()
7906 offset = OFFSETOF(chipcregs_t, eci.ge35.eci_outputlo); in si_eci_notify_bt()
7911 offset = OFFSETOF(chipcregs_t, eci.lt35.eci_output); in si_eci_notify_bt()
7921 OFFSETOF(chipcregs_t, eci.lt35.eci_output) : in si_eci_notify_bt()
7922 OFFSETOF(chipcregs_t, eci.ge35.eci_outputlo)), in si_eci_notify_bt()
7948 const chipcregs_t *cc; in BCMPOSTTRAPFN()
7954 offset = OFFSETOF(chipcregs_t, clk_ctl_st); in BCMPOSTTRAPFN()
7973 chipcregs_t *cc; in si_seci_upd()
7985 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) in si_seci_upd()
7987 } else if ((cc = (chipcregs_t *)CCREGS_FAST(sii)) == NULL) in si_seci_upd()
8070 chipcregs_t *cc; in si_btcgpiowar()
8083 cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0); in si_btcgpiowar()
8098 chipcregs_t *cc; in si_chipcontrl_restore()
8101 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) { in si_chipcontrl_restore()
8113 chipcregs_t *cc; in si_chipcontrl_read()
8117 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) { in si_chipcontrl_read()
8131 chipcregs_t *cc; in si_chipcontrl_srom4360()
8135 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) { in si_chipcontrl_srom4360()
8164 chipcregs_t *cc; in si_srom_clk_set()
8169 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) { in si_srom_clk_set()
8200 chipcregs_t *cc; in si_btc_enable_chipcontrol()
8203 if ((cc = (chipcregs_t *)si_setcore(sih, CC_CORE_ID, 0)) == NULL) { in si_btc_enable_chipcontrol()
8260 chipcregs_t *cc; in si_is_sprom_available()
8442 data = si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, fabid), 0, 0); in BCMATTACHFN()
8456 chipcregs_t *cc; in BCMATTACHFN()
8473 chipcregs_t *cc; in BCMATTACHFN()
8850 OFFSETOF(chipcregs_t, jtagctrl), 0, 0) in si_lowpwr_opt()
8991 si_ccreg(sih, OFFSETOF(chipcregs_t, bp_addrlow), ~0, addr_low); in BCMPOSTTRAPFN()
8992 si_ccreg(sih, OFFSETOF(chipcregs_t, bp_addrhigh), ~0, addr_high); in BCMPOSTTRAPFN()
8996 si_ccreg(sih, OFFSETOF(chipcregs_t, bp_indaccess), ~0, in BCMPOSTTRAPFN()
9000 si_ccreg(sih, OFFSETOF(chipcregs_t, bp_data), ~0, *data); in BCMPOSTTRAPFN()
9001 si_ccreg(sih, OFFSETOF(chipcregs_t, bp_indaccess), ~0, in BCMPOSTTRAPFN()
9008 SPINWAIT(((status = si_ccreg(sih, OFFSETOF(chipcregs_t, bp_indaccess), 0, 0)) & in BCMPOSTTRAPFN()
9022 *data = si_ccreg(sih, OFFSETOF(chipcregs_t, bp_data), 0, 0); in BCMPOSTTRAPFN()
9296 #define PWRREQ_OFFSET(sih) OFFSETOF(chipcregs_t, powerctl)
9331 OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih); in BCMPOSTTRAPFN()
9389 uint32 r, offset = OFFSETOF(chipcregs_t, powerctl); /* Same 0x1e8 per core */ in BCMPOSTTRAPFN()
9462 OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih); in BCMPOSTTRAPFN()
9497 OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih); in si_srpwr_stat()
9515 OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih); in si_srpwr_domain()
9570 OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih); in si_srpwr_bt_status()
10070 OFFSETOF(chipcregs_t, chipstatus), 0, 0); in si_btc_bt_status_in_reset()