119 	((regoff) == OFFSETOF(pmuregs_t, pmutimer) || \
120 	 (regoff) == OFFSETOF(pmuregs_t, pmuwatchdog) || \
121 	 (regoff) == OFFSETOF(pmuregs_t, res_req_timer))
124 	((regoff) == OFFSETOF(chipcregs_t, pmutimer) || \
125 	 (regoff) == OFFSETOF(chipcregs_t, pmuwatchdog) || \
126 	 (regoff) == OFFSETOF(chipcregs_t, res_req_timer))
527 					OFFSETOF(gciregs_t, lhl_core_capab_adr), 0, 0) &  in BCMATTACHFN()
907 			si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, clk_ctl_st), CCS_FORCEHT,  in BCMATTACHFN()
912 			si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, jtagctrl),  in BCMATTACHFN()
931 	chipcontrol = si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol),  in BCMATTACHFN()
1037 	si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol),  in BCMATTACHFN()
1077 	offs = OFFSETOF(chipcregs_t, intmask);  in si_gci_int_enable()
1229 	if (si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, gpiocontrol), 0, 0) & mask) {  in si_gpio_enable()
1786 		si_gci_direct(sih, OFFSETOF(chipcregs_t, gci_seciauxtx),  in si_gci_seci_init()
1790 		si_gci_direct(sih, OFFSETOF(chipcregs_t, gci_corectrl),  in si_gci_seci_init()
4298 		pmustatus_offset = AOB_ENAB(sih) ? OFFSETOF(pmuregs_t, pmustatus) :  in BCMPOSTTRAPFN()
4299 			OFFSETOF(chipcregs_t, pmustatus);  in BCMPOSTTRAPFN()
4732 			si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, watchdog), ~0,  in si_watchdog()
4736 			si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, watchdog), ~0, ticks);  in si_watchdog()
6720 	regoff = OFFSETOF(chipcregs_t, gpiocontrol);  in BCMPOSTTRAPFN()
6742 	regoff = OFFSETOF(chipcregs_t, gpioouten);  in BCMPOSTTRAPFN()
6764 	regoff = OFFSETOF(chipcregs_t, gpioout);  in BCMPOSTTRAPFN()
6832 	regoff = OFFSETOF(chipcregs_t, gpioin);  in si_gpioin()
6849 	regoff = OFFSETOF(chipcregs_t, gpiointpolarity);  in si_gpiointpolarity()
6866 	regoff = OFFSETOF(chipcregs_t, gpiointmask);  in si_gpiointmask()
6880 	regoff = OFFSETOF(chipcregs_t, gpioeventintmask);  in si_gpioeventintmask()
6892 	offs = (updown ? OFFSETOF(chipcregs_t, gpiopulldown) : OFFSETOF(chipcregs_t, gpiopullup));  in si_gpiopull()
6905 		offs = OFFSETOF(chipcregs_t, gpioevent);  in si_gpioevent()
6907 		offs = OFFSETOF(chipcregs_t, gpioeventintmask);  in si_gpioevent()
6909 		offs = OFFSETOF(chipcregs_t, gpioeventintpolarity);  in si_gpioevent()
6924 	offs = OFFSETOF(chipcregs_t, intmask);  in BCMATTACHFN()
7404 	offset = OFFSETOF(chipcregs_t, clk_ctl_st);  in BCMPOSTTRAPFN()
7534 		offset = OFFSETOF(chipcregs_t, SECI_statusmask);  in BCMPOSTTRAPFN()
7538 		offset = OFFSETOF(chipcregs_t, SECI_statusmask);  in BCMPOSTTRAPFN()
7542 		offset = OFFSETOF(chipcregs_t, SECI_status);  in BCMPOSTTRAPFN()
7547 		offset = OFFSETOF(chipcregs_t, seci_uart_msr);  in BCMPOSTTRAPFN()
7552 		offset = OFFSETOF(chipcregs_t, seci_uart_mcr);  in BCMPOSTTRAPFN()
7566 		offset = OFFSETOF(chipcregs_t, SECI_status);  in BCMPOSTTRAPFN()
7572 		offset = OFFSETOF(chipcregs_t, seci_uart_data);  in BCMPOSTTRAPFN()
7576 		offset = OFFSETOF(chipcregs_t, SECI_status);  in BCMPOSTTRAPFN()
7687 		offset = OFFSETOF(chipcregs_t, seci_uart_bauddiv);  in BCMINITFN()
7694 			offset = OFFSETOF(chipcregs_t, seci_uart_bauddiv);  in BCMINITFN()
7696 			offset = OFFSETOF(chipcregs_t, seci_uart_baudadj);  in BCMINITFN()
7698 			offset = OFFSETOF(chipcregs_t, seci_uart_mcr);  in BCMINITFN()
7705 			offset = OFFSETOF(chipcregs_t, eci.ge35.eci_uartfifolevel);  in BCMINITFN()
7707 			offset = OFFSETOF(chipcregs_t, seci_uart_mcr);  in BCMINITFN()
7714 			offset = OFFSETOF(chipcregs_t, seci_uart_baudadj);  in BCMINITFN()
7716 			offset = OFFSETOF(chipcregs_t, seci_uart_mcr);  in BCMINITFN()
7722 		offset = OFFSETOF(chipcregs_t, seci_uart_lcr);  in BCMINITFN()
7725 		offset = OFFSETOF(chipcregs_t, seci_uart_mcr);  in BCMINITFN()
7731 		offset = OFFSETOF(chipcregs_t, eci.ge35.eci_controllo);  in BCMINITFN()
7733 		offset = OFFSETOF(chipcregs_t, eci.ge35.eci_controlhi);  in BCMINITFN()
7896 			    OFFSETOF(chipcregs_t, eci.lt35.eci_output) :  in si_eci_notify_bt()
7897 			    OFFSETOF(chipcregs_t, eci.ge35.eci_outputlo)),  in si_eci_notify_bt()
7903 				offset = OFFSETOF(chipcregs_t, eci.ge35.eci_outputhi);  in si_eci_notify_bt()
7906 				offset = OFFSETOF(chipcregs_t, eci.ge35.eci_outputlo);  in si_eci_notify_bt()
7911 			offset = OFFSETOF(chipcregs_t, eci.lt35.eci_output);  in si_eci_notify_bt()
7921 			    OFFSETOF(chipcregs_t, eci.lt35.eci_output) :  in si_eci_notify_bt()
7922 			    OFFSETOF(chipcregs_t, eci.ge35.eci_outputlo)),  in si_eci_notify_bt()
7954 	offset = OFFSETOF(chipcregs_t, clk_ctl_st);  in BCMPOSTTRAPFN()
8442 			data = si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, fabid),	0, 0);  in BCMATTACHFN()
8850 						OFFSETOF(chipcregs_t, jtagctrl), 0, 0)  in si_lowpwr_opt()
8991 	si_ccreg(sih, OFFSETOF(chipcregs_t, bp_addrlow), ~0, addr_low);  in BCMPOSTTRAPFN()
8992 	si_ccreg(sih, OFFSETOF(chipcregs_t, bp_addrhigh), ~0, addr_high);  in BCMPOSTTRAPFN()
8996 		si_ccreg(sih, OFFSETOF(chipcregs_t, bp_indaccess), ~0,  in BCMPOSTTRAPFN()
9000 		si_ccreg(sih, OFFSETOF(chipcregs_t, bp_data), ~0, *data);  in BCMPOSTTRAPFN()
9001 		si_ccreg(sih, OFFSETOF(chipcregs_t, bp_indaccess), ~0,  in BCMPOSTTRAPFN()
9008 	SPINWAIT(((status = si_ccreg(sih, OFFSETOF(chipcregs_t, bp_indaccess), 0, 0)) &  in BCMPOSTTRAPFN()
9022 			*data = si_ccreg(sih, OFFSETOF(chipcregs_t, bp_data), 0, 0);  in BCMPOSTTRAPFN()
9296 #define PWRREQ_OFFSET(sih)	OFFSETOF(chipcregs_t, powerctl)
9331 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in BCMPOSTTRAPFN()
9389 	uint32 r, offset = OFFSETOF(chipcregs_t, powerctl); /* Same 0x1e8 per core */  in BCMPOSTTRAPFN()
9462 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in BCMPOSTTRAPFN()
9497 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in si_srpwr_stat()
9515 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in si_srpwr_domain()
9570 		OFFSETOF(chipcregs_t, powerctl) : PWRREQ_OFFSET(sih);  in si_srpwr_bt_status()
9737 	ASSERT(GCI_OFFSETOF(sih, gci_chipctrl) == OFFSETOF(gciregs_t, gci_chipctrl));  in si_rffe_rfem_init()
9747 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_clk_ctrl), ALLONES_32, 0x101);  in si_rffe_rfem_init()
9750 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_change_detect_ovr_wlmc), ALLONES_32, 0);  in si_rffe_rfem_init()
9751 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_change_detect_ovr_wlac), ALLONES_32, 0);  in si_rffe_rfem_init()
9752 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_change_detect_ovr_wlsc), ALLONES_32, 0);  in si_rffe_rfem_init()
9753 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_change_detect_ovr_btmc), ALLONES_32, 0);  in si_rffe_rfem_init()
9754 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_change_detect_ovr_btsc), ALLONES_32, 0);  in si_rffe_rfem_init()
9762 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_misc_ctrl), ALLONES_32, 0x0016EC72);  in si_rffe_rfem_init()
9764 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_misc_ctrl), ALLONES_32, 0x0016EC32);  in si_rffe_rfem_init()
9771 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_clk_ctrl),  in si_rffe_rfem_init()
9788 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_misc_ctrl), RFFE_MISC_EN_PHYCYCLES,  in si_rffe_set_debug_mode()
9863 	uint32 gci_rffe_ctrl = si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), 0, 0);  in BCMPOSTTRAPFN()
9867 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), ALLONES_32, 0);  in BCMPOSTTRAPFN()
9885 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_config), ALLONES_32,  in BCMPOSTTRAPFN()
9887 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_rfem_addr), ALLONES_32, reg_addr);  in BCMPOSTTRAPFN()
9891 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl),  in BCMPOSTTRAPFN()
9894 		SPINWAIT(si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), 0, 0) &  in BCMPOSTTRAPFN()
9896 		if (si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), 0, 0) &  in BCMPOSTTRAPFN()
9901 			*val = si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_rfem_data0), 0, 0);  in BCMPOSTTRAPFN()
9903 			si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl),  in BCMPOSTTRAPFN()
9909 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), ALLONES_32, gci_rffe_ctrl);  in BCMPOSTTRAPFN()
9921 	uint32 gci_rffe_ctrl = si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), 0, 0);  in BCMPOSTTRAPFN()
9926 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), ALLONES_32, 0);  in BCMPOSTTRAPFN()
9946 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_config), ALLONES_32,  in BCMPOSTTRAPFN()
9948 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_rfem_addr), ALLONES_32, reg_addr);  in BCMPOSTTRAPFN()
9951 		si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_rfem_data0), ALLONES_32, data);  in BCMPOSTTRAPFN()
9954 			si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), RFFE_CTRL_START |  in BCMPOSTTRAPFN()
9957 			SPINWAIT(si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), 0, 0) &  in BCMPOSTTRAPFN()
9959 			if (si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), 0, 0) &  in BCMPOSTTRAPFN()
9968 	si_gci_direct(sih, OFFSETOF(gciregs_t, gci_rffe_ctrl), ALLONES_32, gci_rffe_ctrl);  in BCMPOSTTRAPFN()
10070 				OFFSETOF(chipcregs_t, chipstatus), 0, 0);  in si_btc_bt_status_in_reset()