895 	switch (CHIPID(sih->chip)) {  in BCMATTACHFN()
934 	switch (CHIPID(sih->chip)) {  in BCMATTACHFN()
1235 	switch (CHIPID(sih->chip))  in si_gpio_enable()
1283 	switch (CHIPID(sih->chip)) {  in BCMPOSTTRAPFN()
1297 		SI_ERROR(("host wake not supported for 0x%04x yet\n", CHIPID(sih->chip)));  in BCMPOSTTRAPFN()
1305 	switch (CHIPID(sih->chip)) {  in si_gci_time_sync_gpio_enable()
1316 		SI_ERROR(("Time sync not supported for 0x%04x yet\n", CHIPID(sih->chip)));  in si_gci_time_sync_gpio_enable()
1336 	switch (CHIPID(sih->chip)) {  in BCMATTACHFN()
1348 		SI_ERROR(("time sync not supported for 0x%04x yet\n", CHIPID(sih->chip)));  in BCMATTACHFN()
1471 	switch (CHIPID(sih->chip)) {  in BCMATTACHFN()
1473 		SI_ERROR(("device wake not supported for 0x%04x yet\n", CHIPID(sih->chip)));  in BCMATTACHFN()
1512 	switch (CHIPID(sih->chip)) {  in si_enable_device_wake()
1549 				CHIPID(sih->chip), device_wake_opt));  in si_enable_device_wake()
1553 		SI_ERROR(("device wake not supported for 0x%04x yet\n", CHIPID(sih->chip)));  in si_enable_device_wake()
1784 	if (CHIPID(sih->chip) == BCM43602_CHIP_ID) {  in si_gci_seci_init()
2916 		if (((CHIPID(sih->chip) == BCM4360_CHIP_ID) ||  in BCMATTACHFN()
2917 		     (CHIPID(sih->chip) == BCM43460_CHIP_ID) ||  in BCMATTACHFN()
2918 		     (CHIPID(sih->chip) == BCM4352_CHIP_ID)) &&  in BCMATTACHFN()
3161 			switch (CHIPID(sih->chip)) {  in BCMATTACHFN()
3236 	if ((CHIPID(sih->chip) == BCM43012_CHIP_ID) ||  in BCMATTACHFN()
3237 		(CHIPID(sih->chip) == BCM43013_CHIP_ID) ||  in BCMATTACHFN()
3238 		(CHIPID(sih->chip) == BCM43014_CHIP_ID) ||  in BCMATTACHFN()
4571 	switch (CHIPID(sih->chip)) {  in si_chip_hostif()
4710 		if ((CHIPID(sih->chip) == BCM43012_CHIP_ID) ||  in si_watchdog()
4711 			(CHIPID(sih->chip) == BCM43013_CHIP_ID) ||  in si_watchdog()
4712 			(CHIPID(sih->chip) == BCM43014_CHIP_ID)) {  in si_watchdog()
6936 	switch (CHIPID(sih->chip)) {  in si_gci_shif_config_wake_pin()
7689 		if ((CHIPID(sih->chip) == BCM4360_CHIP_ID) ||  in BCMINITFN()
7690 			(CHIPID(sih->chip) == BCM43460_CHIP_ID) ||  in BCMINITFN()
7691 			(CHIPID(sih->chip) == BCM43526_CHIP_ID) ||  in BCMINITFN()
7692 			(CHIPID(sih->chip) == BCM4352_CHIP_ID)) {  in BCMINITFN()
7993 	if ((CHIPID(sih->chip) == BCM4352_CHIP_ID) || (CHIPID(sih->chip) == BCM4360_CHIP_ID)) {  in si_seci_upd()
8185 	switch (CHIPID(sih->chip)) {  in si_pmu_avb_clk_set()
8275 	switch (CHIPID(sih->chip)) {  in si_is_sprom_available()
8311 	switch (CHIPID(sih->chip)) {  in si_is_sflash_available()
8323 	switch (CHIPID(sih->chip)) {  in si_is_otp_disabled()
8374 	switch (CHIPID(sih->chip)) {  in si_cis_source()
8428 	switch (CHIPID(sih->chip)) {  in BCMATTACHFN()
8548 	switch (CHIPID(sih->chip)) {  in si_update_masks()
8581 	switch (CHIPID(sih->chip)) {  in si_force_islanding()
8634 	switch (CHIPID(sih->chip)) {  in si_pmu_rfldo()
8841 		switch (CHIPID(sih->chip)) {  in si_lowpwr_opt()
8883 	if ((CHIPID(sih->chip) == BCM43012_CHIP_ID) ||  in si_lowpwr_opt()
8884 		(CHIPID(sih->chip) == BCM43013_CHIP_ID) ||  in si_lowpwr_opt()
8885 		(CHIPID(sih->chip) == BCM43014_CHIP_ID)) {  in si_lowpwr_opt()
9038 	switch (CHIPID(sih->chip)) {  in si_pll_sr_reinit()
9088 	switch (CHIPID(sih->chip)) {  in BCMATTACHFN()
9980 	switch (CHIPID(sih->chip)) {  in si_chipcap_sdio_ate_only()
10067 	switch (CHIPID(sih->chip)) {  in si_btc_bt_status_in_reset()
10161 	if (CHIPID(sih->chip) == BCM4369_CHIP_ID || CHIPID(sih->chip) == BCM4377_CHIP_ID) {  in si_configure_pwrthrottle_gpio()
10173 	if (CHIPID(sih->chip) == BCM4369_CHIP_ID || CHIPID(sih->chip) == BCM4377_CHIP_ID) {  in si_configure_onbody_gpio()
10189 	switch (CHIPID(sih->chip)) {  in si_jtag_udr_pwrsw_main_toggle()
10210 	switch (CHIPID(sih->chip)) {  in BCMATTACHFN()