Lines Matching +full:0 +full:x10001
30 #define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */
33 #define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */
34 #define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */
35 #define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */
36 #define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */
37 #define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */
38 #define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */
39 #define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */
40 #define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */
41 #define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */
42 #define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */
45 #define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */
46 #define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */
47 #define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */
48 #define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */
49 #define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */
50 #define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */
51 #define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */
52 #define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */
53 #define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */
54 #define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */
55 #define SBSDIO_FUNC1_MESBUSYCTRL 0x1001D /* MesBusyCtl at 0x1001D (rev 11) */
57 #define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
58 #define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */
61 #define SBSDIO_FUNC1_WAKEUPCTRL 0x1001E
62 #define SBSDIO_FUNC1_WCTRL_ALPWAIT_MASK 0x1
63 #define SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT 0
64 #define SBSDIO_FUNC1_WCTRL_HTWAIT_MASK 0x2
66 #define SBSDIO_FUNC1_SLEEPCSR 0x1001F
67 #define SBSDIO_FUNC1_SLEEPCSR_KSO_MASK 0x1
68 #define SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT 0
70 #define SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK 0x2
74 #define SBSDIO_SPROM_IDLE 0
82 #define SROM_SZ_MASK 0x03 /* SROM size, 1: 4k, 2: 16k */
83 #define SROM_BLANK 0x04 /* depreciated in corerev 6 */
84 #define SROM_OTP 0x80 /* OTP present */
87 #define SBSDIO_WATERMARK_MASK 0x7f /* number of words - 1 for sd device
95 #define SBSDIO_MESBUSYCTRL_MASK 0x7f
96 #define SBSDIO_MESBUSYCTRL_ENAB 0x80 /* Enable busy capability for MES access */
99 #define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when
102 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is
105 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host
108 #define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put
112 #define SBSDIO_DEVCTL_EN_F2_BLK_WATERMARK 0x10 /* Enable function 2 tx for each block */
113 #define SBSDIO_DEVCTL_F2WM_ENAB 0x10 /* Enable F2 Watermark */
114 #define SBSDIO_DEVCTL_NONDAT_PADS_ISO 0x20 /* Isolate sdio clk and cmd (non-data) */
117 #define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */
118 #define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */
119 #define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */
120 #define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */
121 #define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */
122 #define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */
123 #define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */
124 #define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */
126 #define SBSDIO_Rev8_HT_AVAIL 0x40
127 #define SBSDIO_Rev8_ALP_AVAIL 0x80
128 #define SBSDIO_CSR_MASK 0x1F
141 #define SBSDIO_PULLUP_D0 0x01 /* Enable D0/MISO pullup */
142 #define SBSDIO_PULLUP_D1 0x02 /* Enable D1/INT# pullup */
143 #define SBSDIO_PULLUP_D2 0x04 /* Enable D2 pullup */
144 #define SBSDIO_PULLUP_CMD 0x08 /* Enable CMD/MOSI pullup */
145 #define SBSDIO_PULLUP_ALL 0x0f /* All valid bits */
148 #define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */
149 #define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
150 #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */
154 #define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
155 #define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
156 #define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
157 #define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */
160 #define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */
162 #define SBSDIO_CIS_SIZE_LIMIT 0x100 /* maximum bytes in one spi CIS */
164 #define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */
166 #define SBSDIO_OTP_CIS_SIZE_LIMIT 0x078 /* maximum bytes OTP CIS */
168 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */
175 #define SBSDIO_SPROM_CIS_OFFSET 0x8 /* 8 control bytes first, CIS starts from
183 #define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */