Lines Matching +full:0 +full:x3fffc000
40 #define NAN_OUI_TYPE 0x13 /* Type/Version */
41 #define NAN_AF_OUI_TYPE 0x18 /* Type/Version */
43 #define NAN_IE_ID 0xdd
66 #define NAN_SRF_BLOOM_MASK 0x01
67 #define NAN_SRF_INCLUDE_MASK 0x02
68 #define NAN_SRF_INDEX_MASK 0x0C
73 #define NAN_BLOOM_CRC32_MASK 0xFFFF
76 #define NAN_ATTR_ID_OFF 0
98 #define NAN_SLOT_DUR_0TU 0
122 #define NAN_MAPID_SPECIFIC_MAP_MASK 0x01 /* apply to specific map */
123 #define NAN_MAPID_MAPID_MASK 0x1E
134 /* NAN_PUB_AF_CATEGORY 0x04 */
136 /* NAN_PUB_AF_ACTION 0x09 */
138 /* NAN_OUI 0x50-6F-9A */
140 /* NAN_OUI_TYPE 0x13 */
148 NAN_ATTR_MASTER_IND = 0,
200 NAN_AVAIL_RES_16_TU = 0,
207 uint8 id; /* IE ID: NAN_IE_ID 0xDD */
210 uint8 oui_type; /* NAN_OUI_TYPE 0x13 */
238 uint8 svcid[0]; /* 6*len of srvc IDs */
242 #define NAN_SC_PUBLISH 0x0
243 #define NAN_SC_SUBSCRIBE 0x1
244 #define NAN_SC_FOLLOWUP 0x2
246 #define NAN_SC_MATCHING_FILTER_PRESENT 0x4
248 #define NAN_SC_SR_FILTER_PRESENT 0x8
250 #define NAN_SC_SVC_INFO_PRESENT 0x10
252 #define NAN_SC_RANGE_LIMITED 0x20
254 #define NAN_SC_BINDING_BITMAP_PRESENT 0x40
258 /* Attribute ID - 0x03. */
275 /* Attribute ID - 0x07. */
283 [0-3]: Id for associated further avail map attribute
284 [4-5]: avail interval duration: 0:16ms; 1:32ms; 2:64ms; 3:reserved
285 [6] : repeat : 0 - applies to next DW, 1: 16 intervals max? wtf?
295 /* Attribute ID - 0x0B. */
305 /* Attribute ID - 0x0A. */
309 /* MAP id: val [0..15], values[16-255] reserved */
319 [0-1]: avail interval duration: 0:16ms; 1:32ms; 2:64ms;
332 #define NAN_MAPCTRL_IDMASK 0x7
334 #define NAN_MAPCTRL_DURMASK 0x30
335 #define NAN_MAPCTRL_REPEAT 0x40
338 #define NAN_VENDOR_TYPE_RTT 0
344 uint8 id; /* 0xDD */
355 uint8 id; /* 0xDD */
363 /* Attribute ID - 0x06. */
373 [0-3]: Id for associated further avail map attribute
374 [4-5]: avail interval duration: 0:16ms; 1:32ms; 2:64ms; 3:reserved
375 [6] : repeat : 0 - applies to next DW, 1: 16 intervals max? wtf?
384 #define NAN_RANGING_MAP_CTRL_ID_SHIFT 0
385 #define NAN_RANGING_MAP_CTRL_ID_MASK 0x0F
387 #define NAN_RANGING_MAP_CTRL_DUR_MASK 0x30
389 #define NAN_RANGING_MAP_CTRL_REPEAT_MASK 0x40
401 NAN_RANGING_PROTO_FTM = 0
405 uint8 id; /* 0x0C */
411 [0-3]: Id for associated further avail map attribute
412 [4-5]: avail interval duration: 0:16ms; 1:32ms; 2:64ms; 3:reserved
413 [6] : repeat : 0 - applies to next DW, 1: 16 intervals max? wtf?
418 uint8 protocol; /* FTM = 0 */
423 uint8 id; /* 0x1A */
427 0: LCI Local Coordinates
444 uint8 id; /* 0x1B */
447 uint8 type_status; /* bits 0-3 type, 4-7 status */
459 uint8 ranging_ctrl; /* Bit 0: ranging report required or not */
467 uint8 id; /* 0x1C */
470 See definition in 9.4.2.22.18 in 802.11mc D5.0
482 #define NAN_RNG_REPORT_REQUIRED 0x01
483 #define NAN_RNG_FTM_PARAMS_PRESENT 0x02
484 #define NAN_RNG_SCHED_ENTRY_PRESENT 0X04
487 #define NAN_RNG_LOCATION_FLAGS_LOCAL_CORD 0x1
488 #define NAN_RNG_LOCATION_FLAGS_GEO_SPATIAL 0x2
489 #define NAN_RNG_LOCATION_FLAGS_CIVIC 0x4
490 #define NAN_RNG_LOCATION_FLAGS_LAST_MVMT 0x8
493 #define NAN_RNG_LOCATION_MASK_LAST_MVT_TSF 0x3FFFC000
497 #define NAN_FTM_MAX_BURST_DUR_SHIFT 0
503 #define NAN_FTM_MAX_BURST_DUR_MASK 0x00000F
504 #define NAN_FTM_MIN_FTM_DELTA_MASK 0x00003F
505 #define NAN_FTM_NUM_FTM_MASK 0x00001F
506 #define NAN_FTM_FORMAT_BW_MASK 0x00003F
520 #define NAN_FTM_PARAMS_UINT32_TO_ATTR(ftm_u32, ftm_attr) {ftm_attr[0] = ftm_u32 & 0xFF; \
521 ftm_attr[1] = (ftm_u32 >> 8) & 0xFF; ftm_attr[2] = (ftm_u32 >> 16) & 0xFF;}
524 #define NAN_FTM_PARAMS_ATTR_TO_UINT32(ftm_p, ftm_u32) (ftm_u32 = ftm_p[0] | ftm_p[1] << 8 | \
537 #define NAN_CONN_CAPABILITY_WFD 0x0001
538 #define NAN_CONN_CAPABILITY_WFDS 0x0002
539 #define NAN_CONN_CAPABILITY_TDLS 0x0004
540 #define NAN_CONN_CAPABILITY_INFRA 0x0008
541 #define NAN_CONN_CAPABILITY_IBSS 0x0010
542 #define NAN_CONN_CAPABILITY_MESH 0x0020
544 #define NAN_DEFAULT_MAP_ID 0 /* nan default map id */
545 #define NAN_DEFAULT_MAP_CTRL 0 /* nan default map control */
548 /* Attribute ID - 0x04. */
557 uint8 id; /* id - 0x20 */
567 uint8 id; /* id - 0x12 */
593 uint8 aux_chan[0]; /* Auxiliary Channel bitmap */
605 #define NAN_ENTRY_CNTRL_TYPE_COMM_AVAIL_MASK 0x1
607 #define NAN_ENTRY_CNTRL_TYPE_POTEN_AVAIL_MASK 0x2
609 #define NAN_ENTRY_CNTRL_TYPE_COND_AVAIL_MASK 0x4
611 #define NAN_AVAIL_CTRL_MAP_ID_MASK 0x000F
613 #define NAN_AVAIL_CTRL_COMM_CHANGED_MASK 0x0010
615 #define NAN_AVAIL_CTRL_POTEN_CHANGED_MASK 0x0020
617 #define NAN_AVAIL_CTRL_PUBLIC_CHANGED_MASK 0x0040
619 #define NAN_AVAIL_CTRL_NDC_CHANGED_MASK 0x0080
621 #define NAN_AVAIL_CTRL_MCAST_CHANGED_MASK 0x0100
623 #define NAN_AVAIL_CTRL_MCAST_CHG_CHANGED_MASK 0x0200
625 #define NAN_AVAIL_CTRL_CHANGED_FLAGS_MASK 0x03f0
627 #define NAN_AVAIL_ENTRY_CTRL_AVAIL_TYPE_MASK 0x07
629 #define NAN_AVAIL_ENTRY_CTRL_USAGE_MASK 0x18
633 #define NAN_AVAIL_ENTRY_CTRL_UTIL_MASK 0xE0
637 #define NAN_AVAIL_ENTRY_CTRL_RX_NSS_MASK 0xF00
641 #define NAN_AVAIL_ENTRY_CTRL_BITMAP_PRESENT_MASK 0x1000
646 #define NAN_AVAIL_ENTRY_CTRL_USAGE_PREFERENCE 0x3
648 #define NAN_TIME_BMAP_CTRL_BITDUR_MASK 0x07
650 #define NAN_TIME_BMAP_CTRL_PERIOD_MASK 0x38
654 #define NAN_TIME_BMAP_CTRL_OFFSET_MASK 0x7FC0
662 #define NAN_AVAIL_CHAN_LIST_TYPE_BAND 0x00
663 #define NAN_AVAIL_CHAN_LIST_TYPE_CHANNEL 0x01
664 #define NAN_AVAIL_CHAN_LIST_NON_CONTIG_BW 0x02
665 #define NAN_AVAIL_CHAN_LIST_NUM_ENTRIES_MASK 0xF0
672 uint8 var[0];
676 #define NAN_CHAN_OP_CLASS_MASK 0x01
677 #define NAN_CHAN_NON_CONT_BW_MASK 0x02
678 #define NAN_CHAN_RSVD_MASK 0x03
679 #define NAN_CHAN_NUM_ENTRIES_MASK 0xF0
686 #define NAN_ENTRY_CNTRL_TYPE_COMM_AVAIL 0x1
688 #define NAN_ENTRY_CNTRL_TYPE_POTEN_AVAIL 0x2
690 #define NAN_ENTRY_CNTRL_TYPE_COND_AVAIL 0x4
699 #define NAN_ENTRY_CNTRL_TYPE_OF_AVAIL_MASK 0x07
700 #define NAN_ENTRY_CNTRL_TYPE_OF_AVAIL_SHIFT 0
702 #define NAN_ENTRY_CNTRL_USAGE_PREF_MASK 0x18
705 #define NAN_ENTRY_CNTRL_UTIL_MASK 0x1E0
711 #define NAN_TIME_BMP_CNTRL_RSVD_MASK 0x01
712 #define NAN_TIME_BMP_CNTRL_RSVD_SHIFT 0
714 #define NAN_TIME_BMP_CNTRL_BMP_LEN_MASK 0x7E
717 #define NAN_TIME_BMP_CNTRL_BIT_DUR_MASK 0x380
720 #define NAN_TIME_BMP_CNTRL_PERIOD_MASK 0x1C00
723 #define NAN_TIME_BMP_CNTRL_START_OFFSET_MASK 0x3FE000
726 #define NAN_TIME_BMP_CNTRL_RESERVED_MASK 0xC00000
743 NAN_TIME_BMP_BIT_DUR_16TU_IDX = 0,
771 #define NAN_CHAN_ENTRY_TYPE_MASK 0x01
772 #define NAN_CHAN_ENTRY_TYPE_SHIFT 0
774 #define NAN_CHAN_ENTRY_LEN_IND_MASK 0x02
777 #define NAN_CHAN_ENTRY_RESERVED_MASK 0x0C
780 #define NAN_CHAN_ENTRY_NO_OF_CHAN_ENTRY_MASK 0xF0
783 #define NAN_CHAN_ENTRY_TYPE_BANDS 0
786 #define NAN_CHAN_ENTRY_BW_LT_80MHZ 0
799 #define NDL_ATTR_CTRL_PEER_ID_PRESENT_MASK 0x01
800 #define NDL_ATTR_CTRL_PEER_ID_PRESENT_SHIFT 0
801 #define NDL_ATTR_CTRL_IM_SCHED_PRESENT_MASK 0x02
803 #define NDL_ATTR_CTRL_NDC_ATTR_PRESENT_MASK 0x04
805 #define NDL_ATTR_CTRL_QOS_ATTR_PRESENT_MASK 0x08
807 #define NDL_ATTR_CTRL_MAX_IDLE_PER_PRESENT_MASK 0x10 /* max idle period */
809 #define NDL_ATTR_CTRL_NDL_TYPE_MASK 0x20 /* NDL type */
811 #define NDL_ATTR_CTRL_NDL_SETUP_REASON_MASK 0xC0 /* NDL Setup Reason */
815 #define NDL_ATTR_CTRL_NDL_TYPE_S_NDL 0x0 /* S-NDL */
816 #define NDL_ATTR_CTRL_NDL_TYPE_P_NDL 0x1 /* P-NDL */
819 #define NDL_ATTR_CTRL_NDL_SETUP_REASON_NDP_RANG 0x0 /* NDP or Ranging */
820 #define NDL_ATTR_CTRL_NDL_SETUP_REASON_FSD_GAS 0x1 /* FSD using GAS */
822 #define NAN_NDL_TYPE_MASK 0x0F
823 #define NDL_ATTR_TYPE_STATUS_REQUEST 0x00
824 #define NDL_ATTR_TYPE_STATUS_RESPONSE 0x01
825 #define NDL_ATTR_TYPE_STATUS_CONFIRM 0x02
826 #define NDL_ATTR_TYPE_STATUS_CONTINUED 0x00
827 #define NDL_ATTR_TYPE_STATUS_ACCEPTED 0x10
828 #define NDL_ATTR_TYPE_STATUS_REJECTED 0x20
839 #define NAN_NDL_STATUS_MASK 0xF0
849 #define NDL_ATTR_CTRL_NONE 0
864 uint8 id; /* NAN_ATTR_NAN_NDL = 0x17 */
867 uint8 type_status; /* Bits[3-0] type subfield, Bits[7-4] status subfield */
884 #define NAN_NDL_QOS_MIN_SLOT_NO_PREF 0
886 #define NAN_NDL_QOS_MAX_LAT_NO_PREF 0xFFFF
891 uint8 id; /* 0x0F */
897 uint8 num_antennas; /* Bit 0-3 tx, 4-7 rx */
905 #define NAN_DEV_CAP_ALL_MAPS_FLAG_MASK 0x1 /* nan default map control */
906 #define NAN_DEV_CAP_ALL_MAPS_FLAG_SHIFT 0
908 #define NAN_DEV_CAP_MAPID_MASK 0x1E
914 #define NAN_DEV_CAP_AWAKE_DW_2G_MASK 0x07
916 #define NAN_DEV_CAP_AWAKE_DW_5G_MASK 0x38
918 #define NAN_DEV_CAP_AWAKE_DW_RSVD_MASK 0xC0
921 #define NAN_DEV_CAP_AWAKE_DW_2G_SHIFT 0
928 #define NAN_DEV_CAP_COMMIT_DW_2G_MASK 0x07
929 #define NAN_DEV_CAP_COMMIT_DW_2G_OVERWRITE_MASK 0x3C0
931 #define NAN_DEV_CAP_COMMIT_DW_5G_MASK 0x38
932 #define NAN_DEV_CAP_COMMIT_DW_5G_OVERWRITE_MASK 0x3C00
934 #define NAN_DEV_CAP_COMMIT_DW_RSVD_MASK 0xC000
936 #define NAN_DEV_CAP_COMMIT_DW_2G_SHIFT 0
941 #define NAN_DEV_CAP_OP_PHY_MODE_HT_ONLY 0x00
942 #define NAN_DEV_CAP_OP_PHY_MODE_VHT 0x01
943 #define NAN_DEV_CAP_OP_PHY_MODE_VHT_8080 0x02
944 #define NAN_DEV_CAP_OP_PHY_MODE_VHT_160 0x04
945 #define NAN_DEV_CAP_OP_PAGING_NDL 0x08
947 #define NAN_DEV_CAP_OP_MODE_VHT_MASK 0x01
948 #define NAN_DEV_CAP_OP_MODE_VHT_SHIFT 0
949 #define NAN_DEV_CAP_OP_MODE_VHT8080_MASK 0x02
951 #define NAN_DEV_CAP_OP_MODE_VHT160_MASK 0x04
953 #define NAN_DEV_CAP_OP_MODE_PAGING_NDL_MASK 0x08
957 #define NAN_DEV_CAP_TX_ANT_MASK 0x0F
958 #define NAN_DEV_CAP_RX_ANT_MASK 0xF0
966 #define NAN_DEV_CAP_DFS_MASTER_MASK 0x01
967 #define NAN_DEV_CAP_DFS_MASTER_SHIFT 0
969 #define NAN_DEV_CAP_EXT_KEYID_MASK 0x02
972 #define NAN_DEV_CAP_NDPE_ATTR_SUPPORT_MASK 0x08
977 NAN_BAND_ID_TVWS = 0,
994 #define NAN_ULW_ATTR_CTRL_SCHED_ID_MASK 0x000F
995 #define NAN_ULW_ATTR_CTRL_SCHED_ID_SHIFT 0
996 #define NAN_ULW_ATTR_CTRL_SEQ_ID_MASK 0xFF00
999 #define NAN_ULW_OVWR_ALL_MASK 0x01
1000 #define NAN_ULW_OVWR_ALL_SHIFT 0
1001 #define NAN_ULW_OVWR_MAP_ID_MASK 0x1E
1004 #define NAN_ULW_CTRL_TYPE_MASK 0x03
1005 #define NAN_ULW_CTRL_TYPE_SHIFT 0
1007 #define NAN_ULW_CTRL_CHAN_AVAIL_MASK 0x04
1011 #define NAN_ULW_CTRL_RX_NSS_MASK 0x78
1014 #define NAN_ULW_CTRL_TYPE_BAND 0
1018 #define NAN_ULW_CNT_DOWN_NO_EXPIRE 0xFF /* ULWs doen't end until next sched update */
1019 #define NAN_ULW_CNT_DOWN_CANCEL 0x0 /* cancel remaining ulws */
1031 * ulw[0] == optional field ULW control when present.
1041 /* NAN_PUB_AF_CATEGORY 0x04 */
1043 /* NAN_PUB_AF_ACTION 0x09 */
1045 /* NAN_OUI 0x50-6F-9A */
1058 /* Subtype-0 is Reserved */
1059 #define NAN_MGMT_FRM_SUBTYPE_RESERVED 0
1060 #define NAN_MGMT_FRM_SUBTYPE_INVALID 0
1089 #define NAN_MGMT_FRM_SUBTYPE_NAN_OOB_AF 0xDD
1096 #define NAN_REASON_RESERVED 0x0
1097 #define NAN_REASON_UNSPECIFIED 0x1
1098 #define NAN_REASON_RESOURCE_LIMIT 0x2
1099 #define NAN_REASON_INVALID_PARAMS 0x3
1100 #define NAN_REASON_FTM_PARAM_INCAP 0x4
1101 #define NAN_REASON_NO_MOVEMENT 0x5
1102 #define NAN_REASON_INVALID_AVAIL 0x6
1103 #define NAN_REASON_IMMUT_UNACCEPT 0x7
1104 #define NAN_REASON_SEC_POLICY 0x8
1105 #define NAN_REASON_QOS_UNACCEPT 0x9
1106 #define NAN_REASON_NDP_REJECT 0xa
1107 #define NAN_REASON_NDL_UNACCEPTABLE 0xb
1118 #define NAN_NDP_CTRL_CONFIRM_REQUIRED 0x01
1119 #define NAN_NDP_CTRL_SECURTIY_PRESENT 0x04
1120 #define NAN_NDP_CTRL_PUB_ID_PRESENT 0x08
1121 #define NAN_NDP_CTRL_RESP_NDI_PRESENT 0x10
1122 #define NAN_NDP_CTRL_SPEC_INFO_PRESENT 0x20
1123 #define NAN_NDP_CTRL_RESERVED 0xA0
1127 uint8 id; /* NDP: 0x10, NDPE: 0x29 */
1130 uint8 type_status; /* bits 0-3 type, 4-7 status */
1138 #define NAN_NDP_TYPE_MASK 0x0F
1139 #define NAN_NDP_TYPE_REQUEST 0x0
1140 #define NAN_NDP_TYPE_RESPONSE 0x1
1141 #define NAN_NDP_TYPE_CONFIRM 0x2
1142 #define NAN_NDP_TYPE_SECURITY 0x3
1143 #define NAN_NDP_TYPE_TERMINATE 0x4
1152 #define NAN_NDP_STATUS_MASK 0xF0
1153 #define NAN_NDP_STATUS_CONT (0 << NAN_NDP_STATUS_SHIFT)
1167 #define NAN_NDP_SETUP_STATUS_FAIL 0
1171 #define NDPE_TLV_TYPE_IPV6 0x00
1172 #define NDPE_TLV_TYPE_SVC_INFO 0x01
1180 #define NAN_RNG_TYPE_MASK 0x0F
1181 #define NAN_RNG_TYPE_REQUEST 0x0
1182 #define NAN_RNG_TYPE_RESPONSE 0x1
1183 #define NAN_RNG_TYPE_TERMINATE 0x2
1186 #define NAN_RNG_STATUS_MASK 0xF0
1187 #define NAN_RNG_STATUS_ACCEPT (0 << NAN_RNG_STATUS_SHIFT)
1203 #define NAN_SCHED_ENTRY_MAPID_MASK 0x0F
1208 #define NAN_DEV_ELE_MAPID_CTRL_MASK 0x1
1209 #define NAN_DEV_ELE_MAPID_CTRL_SHIFT 0
1210 #define NAN_DEV_ELE_MAPID_MASK 0x1E
1217 } while (0);
1227 } while (0);
1234 #define NAN_SCHED_ENTRY_MAPID_MASK 0x0F
1235 #define NAN_SCHED_ENTRY_MAPID_SHIFT 0
1241 } while (0);
1258 #define NAN_NDC_ATTR_PROPOSED_NDC_MASK 0x1
1259 #define NAN_NDC_ATTR_PROPOSED_NDC_SHIFT 0
1269 } while (0)
1273 /* Attribute ID - 0x11 */
1298 #define NAN_SDE_CF_FSD_REQUIRED (1 << 0)
1328 #define NAN_SEC_CIPHER_SUITE_CAP_REPLAY_4 0
1329 #define NAN_SEC_CIPHER_SUITE_CAP_REPLAY_16 (1 << 0)
1334 NAN_SEC_ALGO_NONE = 0,
1349 uint8 attr_id; /* 0x22 - NAN_ATTR_CIPHER_SUITE_INFO */
1360 #define NAN_SEC_CTX_ID_TYPE_PMKID (1 << 0)
1372 uint8 attr_id; /* 0x23 - NAN_ATTR_SEC_CTX_ID_INFO */
1387 uint8 attr_id; /* 0x24 - NAN_ATTR_SHARED_KEY_DESC */
1400 #define NAN_SEC_NCSSK_DESC_MASK 0x7
1401 #define NAN_SEC_NCSSK_DESC_SHIFT 0
1402 #define NAN_SEC_NCSSK_DESC_KEY_TYPE_MASK 0x8
1404 #define NAN_SEC_NCSSK_DESC_KEY_INSTALL_MASK 0x40
1406 #define NAN_SEC_NCSSK_DESC_KEY_ACK_MASK 0x80
1408 #define NAN_SEC_NCSSK_DESC_KEY_MIC_MASK 0x100
1410 #define NAN_SEC_NCSSK_DESC_KEY_SEC_MASK 0x200
1412 #define NAN_SEC_NCSSK_DESC_KEY_ERR_MASK 0x400
1414 #define NAN_SEC_NCSSK_DESC_KEY_REQ_MASK 0x800
1416 #define NAN_SEC_NCSSK_DESC_KEY_ENC_KEY_MASK 0x1000
1418 #define NAN_SEC_NCSSK_DESC_KEY_SMK_MSG_MASK 0x2000
1427 NAN_SEC_NCSSK_DESC_MASK);} while (0)
1433 NAN_SEC_NCSSK_DESC_KEY_TYPE_MASK);} while (0)
1440 NAN_SEC_NCSSK_DESC_KEY_INSTALL_MASK);} while (0)
1446 NAN_SEC_NCSSK_DESC_KEY_ACK_MASK);} while (0)
1452 NAN_SEC_NCSSK_DESC_KEY_MIC_MASK);} while (0)
1458 NAN_SEC_NCSSK_DESC_KEY_SEC_MASK);} while (0)
1464 NAN_SEC_NCSSK_DESC_KEY_ERR_MASK);} while (0)
1470 NAN_SEC_NCSSK_DESC_KEY_REQ_MASK);} while (0)
1477 NAN_SEC_NCSSK_DESC_KEY_ENC_KEY_MASK);} while (0)
1484 NAN_SEC_NCSSK_DESC_KEY_SMK_MSG_MASK);} while (0)
1487 #define NAN_SEC_NCSSK_KEY_DESC_VER 0 /* NCSSK-128/256 */
1497 #define NAN_NMSG_TYPE_MASK 0x0F
1498 #define NMSG_ATTR_TYPE_STATUS_REQUEST 0x00
1499 #define NMSG_ATTR_TYPE_STATUS_RESPONSE 0x01
1500 #define NMSG_ATTR_TYPE_STATUS_CONFIRM 0x02
1501 #define NMSG_ATTR_TYPE_STATUS_SEC_INSTALL 0x03
1502 #define NMSG_ATTR_TYPE_STATUS_TERMINATE 0x04
1503 #define NMSG_ATTR_TYPE_STATUS_IMPLICIT_ENROL 0x05
1505 #define NMSG_ATTR_TYPE_STATUS_CONTINUED 0x00
1506 #define NMSG_ATTR_TYPE_STATUS_ACCEPTED 0x10
1507 #define NMSG_ATTR_TYPE_STATUS_REJECTED 0x20
1509 #define NMSG_CTRL_PUB_ID_PRESENT 0x0001
1510 #define NMSG_CTRL_NMSG_ID_PRESENT 0x0002
1511 #define NMSG_CTRL_SECURITY_PRESENT 0x0004
1512 #define NMSG_CTRL_MANY_TO_MANY_PRESENT 0x0008
1513 #define NMSG_CTRL_SVC_INFO_PRESENT 0x0010
1517 uint8 id; /* Attribute ID - 0x11 */
1525 uint8 var[0];
1528 #define NMSG_ATTR_MCAST_SCHED_MAP_ID_MASK 0x1E
1530 #define NMSG_ATTR_MCAST_SCHED_TIME_MAP_MASK 0x20
1535 uint8 id; /* 0x16 */