Lines Matching defs:sdioh_info
76 struct sdioh_info { struct
77 uint cfg_bar; /* pci cfg address for bar */
78 uint32 caps; /* cached value of capabilities reg */
80 void *bar0; /* BAR0 for PCI Device */
82 osl_t *osh; /* osh handler */
83 void *controller; /* Pointer to SPI Controller's private data struct */
84 uint lockcount; /* nest count of spi_lock() calls */
85 bool client_intr_enabled; /* interrupt connnected flag */
86 bool intr_handler_valid; /* client driver interrupt handler valid */
87 sdioh_cb_fn_t intr_handler; /* registered interrupt handler */
88 void *intr_handler_arg; /* argument to call interrupt handler */
89 bool initialized; /* card initialized */
90 uint32 target_dev; /* Target device ID */
91 uint32 intmask; /* Current active interrupts */
92 void *sdos_info; /* Pointer to per-OS private data */
93 uint32 controller_type; /* Host controller type */
94 uint8 version; /* Host Controller Spec Compliance Version */
95 uint irq; /* Client irq */
96 uint32 intrcount; /* Client interrupts */
97 uint32 local_intrcount; /* Controller interrupts */
98 bool host_init_done; /* Controller initted */
99 bool card_init_done; /* Client SDIO interface initted */
100 bool polled_mode; /* polling for command completion */
102 bool sd_use_dma; /* DMA on CMD53 */
103 bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */
105 bool use_client_ints; /* If this is false, make sure to restore */
107 int adapter_slot; /* Maybe dealing with multiple slots/controllers */
108 int sd_mode; /* SD1/SD4/SPI */
109 int client_block_size[SPI_MAX_IOFUNCS]; /* Blocksize */
110 uint32 data_xfer_count; /* Current transfer */
111 uint16 card_rca; /* Current Address */
112 uint8 num_funcs; /* Supported funcs on client */
113 uint32 card_dstatus; /* 32bit device status */
114 uint32 com_cis_ptr;
115 uint32 func_cis_ptr[SPI_MAX_IOFUNCS];
116 void *dma_buf;
117 ulong dma_phys;
118 int r_cnt; /* rx count */
119 int t_cnt; /* tx_count */
143 extern int spi_register_irq(sdioh_info_t *sd, uint irq); argument