Lines Matching refs:r_high
2986 uint32 r_high, r_low, int_part, frac_part, rounding_const; in BCMPOSTTRAPFN() local
3014 math_uint64_multiple_add(&r_high, &r_low, ndiv_frac, xf, rounding_const); in BCMPOSTTRAPFN()
3015 math_uint64_right_shift(&frac_part, r_high, r_low, BBPLL_NDIV_FRAC_BITS); in BCMPOSTTRAPFN()
3030 math_uint64_multiple_add(&r_high, &r_low, (int_part + frac_part), in BCMPOSTTRAPFN()
3032 math_uint64_right_shift(&fvco, r_high, r_low, P1_DIV_SCALE_BITS); in BCMPOSTTRAPFN()
3049 uint32 r_high, r_low, int_part, frac_part, rounding_const; in BCMPOSTTRAPFN() local
3090 math_uint64_multiple_add(&r_high, &r_low, ndiv_frac, xf, rounding_const); in BCMPOSTTRAPFN()
3091 math_uint64_right_shift(&frac_part, r_high, r_low, PMU43012_PLL_NDIV_FRAC_BITS); in BCMPOSTTRAPFN()
3096 math_uint64_multiple_add(&r_high, &r_low, (int_part + frac_part), in BCMPOSTTRAPFN()
3098 math_uint64_right_shift(&fvco, r_high, r_low, PMU43012_PLL_P_DIV_SCALE_BITS); in BCMPOSTTRAPFN()
6161 uint32 r_high, r_low, r; in si_pmu_pll28nm_fvco() local
6188 math_uint64_multiple_add(&r_high, &r_low, xf, ndiv_frac, 0); in si_pmu_pll28nm_fvco()
6192 ASSERT((r_high & 0xFFE00000) == 0); in si_pmu_pll28nm_fvco()
6193 math_uint64_right_shift(&r, r_high, r_low, 20); in si_pmu_pll28nm_fvco()