Lines Matching refs:pllctrlreg_val
3318 const uint32 *pllctrlreg_val) in si_pmu_pllctrlreg_update() argument
3344 pllctrlreg_val[indx*pll_ctrlcnt + reg_offset]); in si_pmu_pllctrlreg_update()
3511 const uint32 *pllctrlreg_val = NULL; in BCMATTACHFN() local
3552 pllctrlreg_val = pmu1_pllctrl_tab_43012_1600mhz; in BCMATTACHFN()
3557 pllctrlreg_val = pmu1_pllctrl_tab_4369_960p1mhz; in BCMATTACHFN()
3564 pllctrlreg_val = pmu1_pllctrl_tab_4362_960p1mhz; in BCMATTACHFN()
3575 pllctrlreg_val = NULL; in BCMATTACHFN()
3582 pllctrlreg_val = NULL; in BCMATTACHFN()
3588 pllctrlreg_val = pmu1_pllctrl_tab_4389_963mhz; in BCMATTACHFN()
3618 array_size, pllctrlreg_val); in BCMATTACHFN()
3645 if (pllctrlreg_val) { in BCMATTACHFN()
3647 pllctrlreg_val); in BCMATTACHFN()
7981 const uint32 *pllctrlreg_val; in si_pmu_openloop_cal_43012() local
8013 pllctrlreg_val = pmu1_pllctrl_tab_43012_1600mhz; in si_pmu_openloop_cal_43012()
8015 pllctrlreg_update, array_size, pllctrlreg_val); in si_pmu_openloop_cal_43012()
8063 pllctrlreg_val = pmu1_pllctrl_tab_43012_1600mhz; in si_pmu_openloop_cal_43012()
8065 pllctrlreg_update, array_size, pllctrlreg_val); in si_pmu_openloop_cal_43012()