6391 			PMU_REG(sih, pmucontrol_ext, PCTL_EXT_FASTSEQ_ENAB, PCTL_EXT_FASTSEQ_ENAB);  in BCMATTACHFN()
6440 		PMU_REG(sih, pmucontrol_ext, PCTL_EXT_FASTLPO_ENAB, PCTL_EXT_FASTLPO_ENAB);  in BCMATTACHFN()
6457 		PMU_REG(sih, pmucontrol_ext, PCTL_EXT_FASTLPO_SWENAB, PCTL_EXT_FASTLPO_SWENAB);  in BCMATTACHFN()
6478 			PMU_REG(sih, pmucontrol_ext, PCTL_EXT_FASTLPO_ENAB, PCTL_EXT_FASTLPO_ENAB);  in BCMATTACHFN()
6490 			PMU_REG(sih, pmucontrol_ext,  in BCMATTACHFN()
6524 			PMU_REG(sih, pmucontrol_ext,  in BCMATTACHFN()
7167 			PMU_REG(sih, pmucontrol_ext,  in BCMATTACHFN()
7385 				PMU_REG(sih, pmucontrol_ext, PCTL_EXT_FASTSEQ_ENAB,  in BCMATTACHFN()
7461 				PMU_REG(sih, pmucontrol_ext, PCTL_EXT_FASTSEQ_ENAB,  in BCMATTACHFN()
7762 		PMU_REG(sih, pmucontrol_ext, PCTL_EXT_FAST_TRANS_ENAB, PCTL_EXT_FAST_TRANS_ENAB);  in BCMATTACHFN()
7939 		PMU_REG(sih, pmucontrol_ext, PCTL_EXT_FAST_TRANS_ENAB, PCTL_EXT_FAST_TRANS_ENAB);  in BCMATTACHFN()
8919 	return (PMU_REG(sih, core_cap_ext, 0, 0) & PCAP_EXT_USE_MUXED_ILP_CLK_MASK) ? TRUE : FALSE;  in si_pmu_cap_fast_lpo()
8930 	PMU_REG(sih, pmucontrol_ext,  in si_pmu_fast_lpo_disable()
9644 		uint32 core_cap_ext = PMU_REG(sih, core_cap_ext, 0, 0);  in BCMPOSTTRAPFN()
9659 		uint32 core_cap_ext = PMU_REG(sih, core_cap_ext, 0, 0);  in BCMPOSTTRAPFN()
9845 		if (PMU_REG(sih, res_state, 0, 0) & PMURES_BIT(RES4387_PWRSW_MAIN)) {  in si_pmu_res_state_pwrsw_main_wait()
9846 			SPINWAIT((PMU_REG(sih, res_state, 0, 0) &  in si_pmu_res_state_pwrsw_main_wait()
9850 		ret = (PMU_REG(sih, res_state, 0, 0) & PMURES_BIT(RES4387_PWRSW_MAIN)) ?  in si_pmu_res_state_pwrsw_main_wait()
9927 	SPINWAIT(!(PMU_REG(sih, res_state, 0, 0) & PMURES_BIT(rsrc)), PMU_MAX_TRANSITION_DLY);  in si_pmu_res_state_wait()
9928 	ASSERT(PMU_REG(sih, res_state, 0, 0) & PMURES_BIT(rsrc));  in si_pmu_res_state_wait()