Lines Matching refs:PMU_MSG
93 #define PMU_MSG(args) printf args macro
95 #define PMU_MSG(args) macro
1956 PMU_MSG(("Changing rsrc %d res_dep_mask to 0x%x\n", i, in si_pmu_resdeptbl_upd()
1962 PMU_MSG(("Adding 0x%x to rsrc %d res_dep_mask\n", in si_pmu_resdeptbl_upd()
1968 PMU_MSG(("Removing 0x%x from rsrc %d res_dep_mask\n", in si_pmu_resdeptbl_upd()
2046 PMU_MSG(("si_pmu_dep_table_fll_pu_fixup: unsupported chip!\n")); in BCMATTACHFN()
2340 PMU_MSG(("Changing rsrc %d res_updn_timer to 0x%x\n", in BCMATTACHFN()
2369 PMU_MSG(("Applying %s=%s to rsrc %d res_updn_timer\n", name, val, i)); in BCMATTACHFN()
2378 PMU_MSG(("Changing rsrc %d substate %d res_subst_trans_timer to 0x%x\n", in BCMATTACHFN()
2399 PMU_MSG(("Applying %s=%s to rsrc %d res_dep_mask\n", name, val, i)); in BCMATTACHFN()
2434 PMU_MSG(("Applying brmax=%s to max_res_mask\n", val)); in BCMATTACHFN()
2440 PMU_MSG(("Applying brmin=%s to min_res_mask\n", val)); in BCMATTACHFN()
2500 PMU_MSG(("Changing min_res_mask to 0x%x\n", min_mask)); in BCMATTACHFN()
2506 PMU_MSG(("Changing max_res_mask to 0x%x\n", max_mask)); in BCMATTACHFN()
2925 PMU_MSG(("si_pmu1_xtaltab0: Unknown chipid %s\n", bcm_chipname(sih->chip, chn, 8))); in BCMPOSTTRAPFN()
2969 PMU_MSG(("si_pmu1_xtaldef0: Unknown chipid %s\n", bcm_chipname(sih->chip, chn, 8))); in BCMPOSTTRAPFN()
3150 PMU_MSG(("si_pmu1_pllfvco0: Unknown chipid %s\n", bcm_chipname(sih->chip, chn, 8))); in BCMPOSTTRAPFN()
3181 PMU_MSG(("si_pmu1_pllfvco0_pll2 : Unknown chipid %s\n", in BCMPOSTTRAPFN()
3716 PMU_MSG(("XTAL %d.%d MHz (%d)\n", xtal / 1000, xtal % 1000, xt->xf)); in BCMATTACHFN()
3717 PMU_MSG(("Programming PLL for %d.%d MHz\n", xt->fref / 1000, xt->fref % 1000)); in BCMATTACHFN()
4065 PMU_MSG(("si_pmu_pll_on_43012: time taken: %d us\n", total_time)); in si_pmu_pll_on_43012()
4090 PMU_MSG(("si_pmu_pll_off_43012: time taken: %d us\n", total_time)); in si_pmu_pll_off_43012()
4328 PMU_MSG(("PLL is already programmed\n")); in BCMATTACHFN()
4338 PMU_MSG(("Programming ARM CLK\n")); in BCMATTACHFN()
4579 PMU_MSG(("si_pmu1_cpuclk0: Unknown chipid %s\n", bcm_chipname(sih->chip, chn, 8))); in BCMPOSTTRAPFN()
4649 PMU_MSG(("si_pmu1_cpuclk0: ndiv_int %u ndiv_frac %u p2div %u p1div %u fvco %u\n", in BCMPOSTTRAPFN()
4706 PMU_MSG(("si_mac_clk: Unknown chipid %s\n", in si_mac_clk()
4798 PMU_MSG(("si_mac_clk: Unknown chipid %s\n", bcm_chipname(sih->chip, chn, 8))); in si_pmu_fvco_macdiv()
4955 PMU_MSG(("HTAVAIL is set, so not updating BBPLL Frequency \n")); in BCMATTACHFN()
5184 PMU_MSG(("No PLL init done for chip %s rev %d pmurev %d\n", in BCMATTACHFN()
5260 PMU_MSG(("No ALP clock specified " in BCMPOSTTRAPFN()
5383 PMU_MSG(("No backplane clock specified " in BCMPOSTTRAPFN()
5940 PMU_MSG(("si_pmu_res_uptime: rsrc %u uptime %u(deps 0x%08x uptime %u)\n", in BCMINITFN()
6010 PMU_MSG(("si_pmu_otp_power: OTP is disabled\n")); in si_pmu_otp_power()
6067 PMU_MSG(("OTP ready bit not %s after wait\n", (on ? "ON" : "OFF"))); in si_pmu_otp_power()
6087 PMU_MSG(("Adding rsrc 0x%x to min_res_mask\n", min_mask)); in si_pmu_otp_power()
6112 PMU_MSG(("Removing rsrc 0x%x from min_res_mask\n", min_mask)); in si_pmu_otp_power()
6118 PMU_MSG(("OTP ready bit not %s after wait\n", (on_check ? "ON" : "OFF"))); in si_pmu_otp_power()
6422 PMU_MSG(("si_pmu_fast_lpo_locked: LPO enable: unsupported chip!\n")); in si_pmu_fast_lpo_locked()
6449 PMU_MSG(("si_pmu_fast_lpo_enable: duration: %d\n", i*10)); in BCMATTACHFN()
6452 PMU_MSG(("si_pmu_fast_lpo_enable: FLL lock not present!")); in BCMATTACHFN()
6494 PMU_MSG(("pmu fast lpo enabled\n")); in BCMATTACHFN()
6499 PMU_MSG(("si_pmu_fast_lpo_enable: LPO enable: unsupported chip!\n")); in BCMATTACHFN()
6527 PMU_MSG(("pcie fast lpo enabled\n")); in BCMATTACHFN()
6533 PMU_MSG(("si_pmu_fast_lpo_enable_pcie: LPO enable: unsupported chip!\n")); in BCMATTACHFN()
6560 PMU_MSG(("pmu fast lpo enabled\n")); in BCMATTACHFN()
6566 PMU_MSG(("si_pmu_fast_lpo_enable_pmu: LPO enable: unsupported chip!\n")); in BCMATTACHFN()
6629 PMU_MSG(("si_pmu_fll_preload_enable: unsupported chip!\n")); in BCMATTACHFN()
7520 PMU_MSG(("Invalid memlpldo value: %d\n", memlpldo_volt)); in BCMATTACHFN()
7533 PMU_MSG(("Invalid lpldo value: %d\n", lpldo_volt)); in BCMATTACHFN()
7646 PMU_MSG(("Invalid memlpldo value: %d\n", memlpldo_volt)); in BCMATTACHFN()
7659 PMU_MSG(("Invalid lpldo value: %d\n", lpldo_volt)); in BCMATTACHFN()
7844 PMU_MSG(("Invalid memlpldo value: %d\n", memlpldo_volt)); in BCMATTACHFN()
7857 PMU_MSG(("Invalid lpldo value: %d\n", lpldo_volt)); in BCMATTACHFN()
7967 PMU_MSG(("si_pmu_openloop_cal: chip not supported!\n")); in si_pmu_openloop_cal()
7991 PMU_MSG(("si_pmu_openloop_cal_43012: NULL pmu pointer \n")); in si_pmu_openloop_cal_43012()
8057 PMU_MSG(("DCO_CODE = %d\n", y3)); in si_pmu_openloop_cal_43012()
8074 PMU_MSG(("openloop_dco_code = %x\n", final_dco_code)); in si_pmu_openloop_cal_43012()
8992 PMU_MSG(("si_pmu_pll6val_armclk_calc, armclk %d, xtal %d, q %d, r 0x%8x, pll6val 0x%8x\n", in si_pmu_pll6val_armclk_calc()