2003 	sbpcieregs_t *sbpcieregs;  in dhdpcie_dongle_attach()
2211 	sbpcieregs = (sbpcieregs_t*)(bus->regs);  in dhdpcie_dongle_attach()
2847 				OFFSETOF(sbpcieregs_t, configaddr), ~0, PCIE_CFG_MSICAP_OFFSET);  in dhdpcie_bus_release_dongle()
2849 				OFFSETOF(sbpcieregs_t, configdata), ~0,  in dhdpcie_bus_release_dongle()
2869 				OFFSETOF(sbpcieregs_t, u.pcie2.ltr_state), ~0, 0);  in dhdpcie_bus_release_dongle()
2874 			                         (sbpcieregs_t *) bus->regs);  in dhdpcie_bus_release_dongle()
7125 		OFFSETOF(sbpcieregs_t, ftn_ctrl.control), ~0,  in dhdpcie_enum_reg_init()
7130 		OFFSETOF(sbpcieregs_t, ftn_ctrl.intmask), ~0, 0);  in dhdpcie_enum_reg_init()
7133 		OFFSETOF(sbpcieregs_t, ftn_ctrl.intstatus), ~0,  in dhdpcie_enum_reg_init()
7135 			OFFSETOF(sbpcieregs_t, ftn_ctrl.intstatus), 0, 0));  in dhdpcie_enum_reg_init()
7139 		OFFSETOF(sbpcieregs_t, ftn_ctrl.msi_vector), ~0, 0);  in dhdpcie_enum_reg_init()
7142 		OFFSETOF(sbpcieregs_t, ftn_ctrl.msi_intmask), ~0, 0);  in dhdpcie_enum_reg_init()
7145 		OFFSETOF(sbpcieregs_t, ftn_ctrl.msi_intstatus), ~0,  in dhdpcie_enum_reg_init()
7147 			OFFSETOF(sbpcieregs_t, ftn_ctrl.msi_intstatus), 0, 0));  in dhdpcie_enum_reg_init()
7151 		OFFSETOF(sbpcieregs_t, ftn_ctrl.pwr_intmask), ~0, 0);  in dhdpcie_enum_reg_init()
7154 		OFFSETOF(sbpcieregs_t, ftn_ctrl.pwr_intstatus), ~0,  in dhdpcie_enum_reg_init()
7156 			OFFSETOF(sbpcieregs_t, ftn_ctrl.pwr_intstatus), 0, 0));  in dhdpcie_enum_reg_init()
7160 		OFFSETOF(sbpcieregs_t, ftn_ctrl.mbox_intmask), ~0, 0);  in dhdpcie_enum_reg_init()
7163 		OFFSETOF(sbpcieregs_t, ftn_ctrl.mbox_intstatus), ~0,  in dhdpcie_enum_reg_init()
7165 			OFFSETOF(sbpcieregs_t, ftn_ctrl.mbox_intstatus), 0, 0));  in dhdpcie_enum_reg_init()
8058 					OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8061 					OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8064 					OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8068 					OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8071 					OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8074 					OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8083 			OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8087 			OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8091 			OFFSETOF(sbpcieregs_t,  in dhdpcie_bus_doiovar()
8095 			OFFSETOF(sbpcieregs_t, configdata), ~0, 0);  in dhdpcie_bus_doiovar()
8116 		si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configaddr), ~0,  in dhdpcie_bus_doiovar()
8118 		si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configdata), ~0,  in dhdpcie_bus_doiovar()
8124 		si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configaddr), ~0,  in dhdpcie_bus_doiovar()
8127 			OFFSETOF(sbpcieregs_t, configdata), 0, 0);  in dhdpcie_bus_doiovar()
10142 		OFFSETOF(sbpcieregs_t, u.pcie2.clk_ctl_st), CCS_FORCEALP, CCS_FORCEALP);  in dhdpcie_force_alp()
10145 			OFFSETOF(sbpcieregs_t, u.pcie2.clk_ctl_st), CCS_FORCEALP, 0);  in dhdpcie_force_alp()
10158 	si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configaddr), ~0,  in dhdpcie_set_l1_entry_time()
10161 		OFFSETOF(sbpcieregs_t, configdata), 0, 0);  in dhdpcie_set_l1_entry_time()
10163 	si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configdata), ~0,  in dhdpcie_set_l1_entry_time()
15142 		pcie_corereg(bus->osh, regsva, OFFSETOF(sbpcieregs_t, ctoctrl), ~0, val);  in dhdpcie_cto_init()
15144 		pcie_corereg(bus->osh, regsva, OFFSETOF(sbpcieregs_t, ctoctrl), ~0, 0);  in dhdpcie_cto_init()
15147 	ctoctrl = pcie_corereg(bus->osh, regsva, OFFSETOF(sbpcieregs_t, ctoctrl), 0, 0);  in dhdpcie_cto_init()
17618 			(uint)OFFSETOF(sbpcieregs_t, u.pcie2.err_hdr_logreg1),  in dhd_pcie_debug_info_dump()
17620 				OFFSETOF(sbpcieregs_t, u.pcie2.err_hdr_logreg1), 0, 0),  in dhd_pcie_debug_info_dump()
17621 			(uint)OFFSETOF(sbpcieregs_t, u.pcie2.err_hdr_logreg2),  in dhd_pcie_debug_info_dump()
17623 				OFFSETOF(sbpcieregs_t, u.pcie2.err_hdr_logreg2), 0, 0),  in dhd_pcie_debug_info_dump()
17624 			(uint)OFFSETOF(sbpcieregs_t, u.pcie2.err_hdr_logreg3),  in dhd_pcie_debug_info_dump()
17626 				OFFSETOF(sbpcieregs_t, u.pcie2.err_hdr_logreg3), 0, 0),  in dhd_pcie_debug_info_dump()
17627 			(uint)OFFSETOF(sbpcieregs_t, u.pcie2.err_hdr_logreg4),  in dhd_pcie_debug_info_dump()
17629 				OFFSETOF(sbpcieregs_t, u.pcie2.err_hdr_logreg4), 0, 0)));  in dhd_pcie_debug_info_dump()
17631 			(uint)OFFSETOF(sbpcieregs_t, u.pcie2.err_code_logreg),  in dhd_pcie_debug_info_dump()
17633 				OFFSETOF(sbpcieregs_t, u.pcie2.err_code_logreg), 0, 0)));  in dhd_pcie_debug_info_dump()