Lines Matching full:bus
2 * DHD Bus Module for PCIE
156 #define DHD_PCIE_SHARED_MEMBER_ADDR(bus, member) \ argument
157 (bus)->shared_addr + OFFSETOF(pciedev_shared_t, member)
160 #define DHD_RING_INFO_MEMBER_ADDR(bus, member) \ argument
161 (bus)->pcie_sh->rings_info_ptr + OFFSETOF(ring_info_t, member)
164 #define DHD_RING_MEM_MEMBER_ADDR(bus, ringid, member) \ argument
165 (bus)->ring_sh[ringid].ring_mem_addr + OFFSETOF(ring_mem_t, member)
200 static int dhdpcie_checkdied(dhd_bus_t *bus, char *data, uint size);
201 static int dhdpcie_bus_readconsole(dhd_bus_t *bus);
203 static int dhdpcie_mem_dump(dhd_bus_t *bus);
204 static int dhdpcie_get_mem_dump(dhd_bus_t *bus);
207 static int dhdpcie_bus_membytes(dhd_bus_t *bus, bool write, ulong address, uint8 *data, uint size);
208 static int dhdpcie_bus_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, uint32 actionid,
211 static int dhdpcie_bus_lpback_req(struct dhd_bus *bus, uint32 intval);
212 static int dhdpcie_bus_dmaxfer_req(struct dhd_bus *bus,
217 static int dhdpcie_bus_set_tx_lpback(struct dhd_bus *bus, bool enable);
218 static int dhdpcie_bus_get_tx_lpback(struct dhd_bus *bus);
219 static uint64 serialized_backplane_access_64(dhd_bus_t* bus, uint addr, uint size, uint64* val,
222 static uint serialized_backplane_access(dhd_bus_t* bus, uint addr, uint size, uint* val, bool read);
223 static int dhdpcie_bus_download_state(dhd_bus_t *bus, bool enter);
224 static int _dhdpcie_download_firmware(struct dhd_bus *bus);
225 static int dhdpcie_download_firmware(dhd_bus_t *bus, osl_t *osh);
228 static int dhdpcie_bus_download_fw_signature(dhd_bus_t *bus, bool *do_write);
229 static int dhdpcie_bus_download_ram_bootloader(dhd_bus_t *bus);
230 static int dhdpcie_bus_write_fws_status(dhd_bus_t *bus);
231 static int dhdpcie_bus_write_fws_mem_info(dhd_bus_t *bus);
232 static int dhdpcie_bus_write_fwsig(dhd_bus_t *bus, char *fwsig_path, char *nvsig_path);
233 static int dhdpcie_download_rtlv_end(dhd_bus_t *bus);
234 static int dhdpcie_bus_save_download_info(dhd_bus_t *bus, uint32 download_addr,
239 static int dhdpcie_bus_write_vars(dhd_bus_t *bus);
240 static bool dhdpcie_bus_process_mailbox_intr(dhd_bus_t *bus, uint32 intstatus);
241 static bool dhdpci_bus_read_frames(dhd_bus_t *bus);
242 static int dhdpcie_readshared(dhd_bus_t *bus);
243 static void dhdpcie_init_shared_addr(dhd_bus_t *bus);
244 static bool dhdpcie_dongle_attach(dhd_bus_t *bus);
245 static void dhdpcie_bus_dongle_setmemsize(dhd_bus_t *bus, int mem_size);
246 static void dhdpcie_bus_release_dongle(dhd_bus_t *bus, osl_t *osh,
248 static void dhdpcie_bus_release_malloc(dhd_bus_t *bus, osl_t *osh);
249 static int dhdpcie_downloadvars(dhd_bus_t *bus, void *arg, int len);
250 static void dhdpcie_setbar1win(dhd_bus_t *bus, uint32 addr);
251 static void dhd_init_bar1_switch_lock(dhd_bus_t *bus);
252 static void dhd_deinit_bar1_switch_lock(dhd_bus_t *bus);
253 static void dhd_init_pwr_req_lock(dhd_bus_t *bus);
254 static void dhd_deinit_pwr_req_lock(dhd_bus_t *bus);
255 static void dhd_init_bus_lp_state_lock(dhd_bus_t *bus);
256 static void dhd_deinit_bus_lp_state_lock(dhd_bus_t *bus);
257 static void dhd_init_backplane_access_lock(dhd_bus_t *bus);
258 static void dhd_deinit_backplane_access_lock(dhd_bus_t *bus);
259 static uint8 dhdpcie_bus_rtcm8(dhd_bus_t *bus, ulong offset);
260 static void dhdpcie_bus_wtcm8(dhd_bus_t *bus, ulong offset, uint8 data);
261 static void dhdpcie_bus_wtcm16(dhd_bus_t *bus, ulong offset, uint16 data);
262 static uint16 dhdpcie_bus_rtcm16(dhd_bus_t *bus, ulong offset);
263 static void dhdpcie_bus_wtcm32(dhd_bus_t *bus, ulong offset, uint32 data);
264 static uint32 dhdpcie_bus_rtcm32(dhd_bus_t *bus, ulong offset);
266 static void dhdpcie_bus_wtcm64(dhd_bus_t *bus, ulong offset, uint64 data) __attribute__ ((used));
267 static uint64 dhdpcie_bus_rtcm64(dhd_bus_t *bus, ulong offset) __attribute__ ((used));
269 static void dhdpcie_bus_cfg_set_bar0_win(dhd_bus_t *bus, uint32 data);
271 static int dhdpcie_cc_nvmshadow(dhd_bus_t *bus, struct bcmstrbuf *b);
272 static void dhdpcie_fw_trap(dhd_bus_t *bus);
273 static void dhd_fillup_ring_sharedptr_info(dhd_bus_t *bus, ring_info_t *ring_info);
274 static void dhdpcie_handle_mb_data(dhd_bus_t *bus);
277 static void dhd_bus_ds_trace(dhd_bus_t *bus, uint32 dsval,
280 static void dhd_bus_ds_trace(dhd_bus_t *bus, uint32 dsval, bool d2h);
283 static void dhd_bus_mmio_trace(dhd_bus_t *bus, uint32 addr, uint32 value, bool set);
290 static void dhd_bus_check_idle_scan(dhd_bus_t *bus);
291 static void dhd_bus_idle_scan(dhd_bus_t *bus);
295 static int dhdpcie_download_code_array(dhd_bus_t *bus);
302 struct dhd_bus *bus, unsigned char **p_dlarray,
316 static void dhdpci_bus_rte_log_time_sync_poll(dhd_bus_t *bus);
335 static int dhdpcie_cto_error_recovery(struct dhd_bus *bus);
337 static int dhdpcie_init_d11status(struct dhd_bus *bus);
339 static int dhdpcie_wrt_rnd(struct dhd_bus *bus);
349 static uint16 dhd_bus_set_hp2p_ring_max_size(struct dhd_bus *bus, bool tx, uint16 val);
357 static bool dhd_bus_tcm_test(struct dhd_bus *bus);
361 static int dhd_bus_dump_fws(dhd_bus_t *bus, struct bcmstrbuf *strbuf);
363 static void dhdpcie_pme_stat_clear(dhd_bus_t *bus);
657 /** the GDB debugger layer will call back into this (bus) layer to read/write dongle memory */
666 dhd_bus_get_flr_force_fail(struct dhd_bus *bus) in dhd_bus_get_flr_force_fail() argument
668 return bus->flr_force_fail; in dhd_bus_get_flr_force_fail()
673 * link with the bus driver, in order to look for or await the device.
711 dhd_bus_db0_addr_get(struct dhd_bus *bus) in dhd_bus_db0_addr_get() argument
714 uint dar_addr = DAR_PCIH2D_DB0_0(bus->sih->buscorerev); in dhd_bus_db0_addr_get()
717 if (bus->dma_chan == 1) { in dhd_bus_db0_addr_get()
719 dar_addr = DAR_PCIH2D_DB1_0(bus->sih->buscorerev); in dhd_bus_db0_addr_get()
720 } else if (bus->dma_chan == 2) { in dhd_bus_db0_addr_get()
722 dar_addr = DAR_PCIH2D_DB2_0(bus->sih->buscorerev); in dhd_bus_db0_addr_get()
726 return ((DAR_ACTIVE(bus->dhd)) ? dar_addr : addr); in dhd_bus_db0_addr_get()
730 dhd_bus_db0_addr_2_get(struct dhd_bus *bus) in dhd_bus_db0_addr_2_get() argument
732 return ((DAR_ACTIVE(bus->dhd)) ? DAR_PCIH2D_DB2_0(bus->sih->buscorerev) : PCIH2D_MailBox_2); in dhd_bus_db0_addr_2_get()
736 dhd_bus_db1_addr_get(struct dhd_bus *bus) in dhd_bus_db1_addr_get() argument
738 return ((DAR_ACTIVE(bus->dhd)) ? DAR_PCIH2D_DB0_1(bus->sih->buscorerev) : PCIH2D_DB1); in dhd_bus_db1_addr_get()
742 dhd_bus_db1_addr_3_get(struct dhd_bus *bus) in dhd_bus_db1_addr_3_get() argument
744 return ((DAR_ACTIVE(bus->dhd)) ? DAR_PCIH2D_DB3_1(bus->sih->buscorerev) : PCIH2D_DB1_3); in dhd_bus_db1_addr_3_get()
748 dhd_init_pwr_req_lock(dhd_bus_t *bus) in dhd_init_pwr_req_lock() argument
750 if (!bus->pwr_req_lock) { in dhd_init_pwr_req_lock()
751 bus->pwr_req_lock = osl_spin_lock_init(bus->osh); in dhd_init_pwr_req_lock()
756 dhd_deinit_pwr_req_lock(dhd_bus_t *bus) in dhd_deinit_pwr_req_lock() argument
758 if (bus->pwr_req_lock) { in dhd_deinit_pwr_req_lock()
759 osl_spin_lock_deinit(bus->osh, bus->pwr_req_lock); in dhd_deinit_pwr_req_lock()
760 bus->pwr_req_lock = NULL; in dhd_deinit_pwr_req_lock()
766 dhdpcie_set_dongle_deepsleep(dhd_bus_t *bus, bool val) in dhdpcie_set_dongle_deepsleep() argument
769 if (INBAND_DW_ENAB(bus)) { in dhdpcie_set_dongle_deepsleep()
770 DHD_BUS_DONGLE_DS_LOCK(bus->dongle_ds_lock, flags_ds); in dhdpcie_set_dongle_deepsleep()
771 bus->dongle_in_deepsleep = val; in dhdpcie_set_dongle_deepsleep()
772 DHD_BUS_DONGLE_DS_UNLOCK(bus->dongle_ds_lock, flags_ds); in dhdpcie_set_dongle_deepsleep()
776 dhd_init_dongle_ds_lock(dhd_bus_t *bus) in dhd_init_dongle_ds_lock() argument
778 if (!bus->dongle_ds_lock) { in dhd_init_dongle_ds_lock()
779 bus->dongle_ds_lock = osl_spin_lock_init(bus->osh); in dhd_init_dongle_ds_lock()
783 dhd_deinit_dongle_ds_lock(dhd_bus_t *bus) in dhd_deinit_dongle_ds_lock() argument
785 if (bus->dongle_ds_lock) { in dhd_deinit_dongle_ds_lock()
786 osl_spin_lock_deinit(bus->osh, bus->dongle_ds_lock); in dhd_deinit_dongle_ds_lock()
787 bus->dongle_ds_lock = NULL; in dhd_deinit_dongle_ds_lock()
796 dhd_bus_pcie_pwr_req_wl_domain(struct dhd_bus *bus, uint offset, bool enable) in dhd_bus_pcie_pwr_req_wl_domain() argument
799 si_corereg(bus->sih, bus->sih->buscoreidx, offset, in dhd_bus_pcie_pwr_req_wl_domain()
803 si_corereg(bus->sih, bus->sih->buscoreidx, offset, in dhd_bus_pcie_pwr_req_wl_domain()
809 _dhd_bus_pcie_pwr_req_clear_cmn(struct dhd_bus *bus) in _dhd_bus_pcie_pwr_req_clear_cmn() argument
818 if (bus->pwr_req_ref > 1) { in _dhd_bus_pcie_pwr_req_clear_cmn()
819 bus->pwr_req_ref--; in _dhd_bus_pcie_pwr_req_clear_cmn()
823 ASSERT(bus->pwr_req_ref == 1); in _dhd_bus_pcie_pwr_req_clear_cmn()
825 if (MULTIBP_ENAB(bus->sih)) { in _dhd_bus_pcie_pwr_req_clear_cmn()
832 si_srpwr_request(bus->sih, mask, 0); in _dhd_bus_pcie_pwr_req_clear_cmn()
833 bus->pwr_req_ref = 0; in _dhd_bus_pcie_pwr_req_clear_cmn()
837 dhd_bus_pcie_pwr_req_clear(struct dhd_bus *bus) in dhd_bus_pcie_pwr_req_clear() argument
841 DHD_BUS_PWR_REQ_LOCK(bus->pwr_req_lock, flags); in dhd_bus_pcie_pwr_req_clear()
842 _dhd_bus_pcie_pwr_req_clear_cmn(bus); in dhd_bus_pcie_pwr_req_clear()
843 DHD_BUS_PWR_REQ_UNLOCK(bus->pwr_req_lock, flags); in dhd_bus_pcie_pwr_req_clear()
847 dhd_bus_pcie_pwr_req_clear_nolock(struct dhd_bus *bus) in dhd_bus_pcie_pwr_req_clear_nolock() argument
849 _dhd_bus_pcie_pwr_req_clear_cmn(bus); in dhd_bus_pcie_pwr_req_clear_nolock()
853 _dhd_bus_pcie_pwr_req_cmn(struct dhd_bus *bus) in _dhd_bus_pcie_pwr_req_cmn() argument
858 if (bus->pwr_req_ref > 0) { in _dhd_bus_pcie_pwr_req_cmn()
859 bus->pwr_req_ref++; in _dhd_bus_pcie_pwr_req_cmn()
863 ASSERT(bus->pwr_req_ref == 0); in _dhd_bus_pcie_pwr_req_cmn()
865 if (MULTIBP_ENAB(bus->sih)) { in _dhd_bus_pcie_pwr_req_cmn()
874 si_srpwr_request(bus->sih, mask, val); in _dhd_bus_pcie_pwr_req_cmn()
876 bus->pwr_req_ref = 1; in _dhd_bus_pcie_pwr_req_cmn()
880 dhd_bus_pcie_pwr_req(struct dhd_bus *bus) in dhd_bus_pcie_pwr_req() argument
884 DHD_BUS_PWR_REQ_LOCK(bus->pwr_req_lock, flags); in dhd_bus_pcie_pwr_req()
885 _dhd_bus_pcie_pwr_req_cmn(bus); in dhd_bus_pcie_pwr_req()
886 DHD_BUS_PWR_REQ_UNLOCK(bus->pwr_req_lock, flags); in dhd_bus_pcie_pwr_req()
890 _dhd_bus_pcie_pwr_req_pd0123_cmn(struct dhd_bus *bus) in _dhd_bus_pcie_pwr_req_pd0123_cmn() argument
894 mask = SRPWR_DMN_ALL_MASK(bus->sih); in _dhd_bus_pcie_pwr_req_pd0123_cmn()
895 val = SRPWR_DMN_ALL_MASK(bus->sih); in _dhd_bus_pcie_pwr_req_pd0123_cmn()
897 si_srpwr_request(bus->sih, mask, val); in _dhd_bus_pcie_pwr_req_pd0123_cmn()
901 dhd_bus_pcie_pwr_req_reload_war(struct dhd_bus *bus) in dhd_bus_pcie_pwr_req_reload_war() argument
909 if (!(PCIE_PWR_REQ_RELOAD_WAR_ENAB(bus->sih->buscorerev))) { in dhd_bus_pcie_pwr_req_reload_war()
913 DHD_BUS_PWR_REQ_LOCK(bus->pwr_req_lock, flags); in dhd_bus_pcie_pwr_req_reload_war()
914 _dhd_bus_pcie_pwr_req_pd0123_cmn(bus); in dhd_bus_pcie_pwr_req_reload_war()
915 DHD_BUS_PWR_REQ_UNLOCK(bus->pwr_req_lock, flags); in dhd_bus_pcie_pwr_req_reload_war()
919 _dhd_bus_pcie_pwr_req_clear_pd0123_cmn(struct dhd_bus *bus) in _dhd_bus_pcie_pwr_req_clear_pd0123_cmn() argument
923 mask = SRPWR_DMN_ALL_MASK(bus->sih); in _dhd_bus_pcie_pwr_req_clear_pd0123_cmn()
925 si_srpwr_request(bus->sih, mask, 0); in _dhd_bus_pcie_pwr_req_clear_pd0123_cmn()
929 dhd_bus_pcie_pwr_req_clear_reload_war(struct dhd_bus *bus) in dhd_bus_pcie_pwr_req_clear_reload_war() argument
934 if (!(PCIE_PWR_REQ_RELOAD_WAR_ENAB(bus->sih->buscorerev))) { in dhd_bus_pcie_pwr_req_clear_reload_war()
937 DHD_BUS_PWR_REQ_LOCK(bus->pwr_req_lock, flags); in dhd_bus_pcie_pwr_req_clear_reload_war()
938 _dhd_bus_pcie_pwr_req_clear_pd0123_cmn(bus); in dhd_bus_pcie_pwr_req_clear_reload_war()
939 DHD_BUS_PWR_REQ_UNLOCK(bus->pwr_req_lock, flags); in dhd_bus_pcie_pwr_req_clear_reload_war()
943 dhd_bus_pcie_pwr_req_nolock(struct dhd_bus *bus) in dhd_bus_pcie_pwr_req_nolock() argument
945 _dhd_bus_pcie_pwr_req_cmn(bus); in dhd_bus_pcie_pwr_req_nolock()
949 dhdpcie_chip_support_msi(dhd_bus_t *bus) in dhdpcie_chip_support_msi() argument
959 __FUNCTION__, bus->sih->buscorerev, si_chipid(bus->sih))); in dhdpcie_chip_support_msi()
960 if (bus->sih->buscorerev <= 14 || in dhdpcie_chip_support_msi()
961 si_chipid(bus->sih) == BCM4389_CHIP_ID || in dhdpcie_chip_support_msi()
962 si_chipid(bus->sih) == BCM4385_CHIP_ID || in dhdpcie_chip_support_msi()
963 si_chipid(bus->sih) == BCM4375_CHIP_ID || in dhdpcie_chip_support_msi()
964 si_chipid(bus->sih) == BCM4376_CHIP_ID || in dhdpcie_chip_support_msi()
965 si_chipid(bus->sih) == BCM4362_CHIP_ID || in dhdpcie_chip_support_msi()
966 si_chipid(bus->sih) == BCM43751_CHIP_ID || in dhdpcie_chip_support_msi()
967 si_chipid(bus->sih) == BCM43752_CHIP_ID || in dhdpcie_chip_support_msi()
968 si_chipid(bus->sih) == BCM4361_CHIP_ID || in dhdpcie_chip_support_msi()
969 si_chipid(bus->sih) == BCM4359_CHIP_ID) { in dhdpcie_chip_support_msi()
988 dhd_bus_t *bus = NULL; in dhdpcie_bus_attach() local
994 if (!(bus = MALLOCZ(osh, sizeof(dhd_bus_t)))) { in dhdpcie_bus_attach()
999 bus->bus = adapter->bus_type; in dhdpcie_bus_attach()
1000 bus->bus_num = adapter->bus_num; in dhdpcie_bus_attach()
1001 bus->slot_num = adapter->slot_num; in dhdpcie_bus_attach()
1003 bus->regs = regs; in dhdpcie_bus_attach()
1004 bus->tcm = tcm; in dhdpcie_bus_attach()
1005 bus->osh = osh; in dhdpcie_bus_attach()
1008 bus->dev = (struct pci_dev *)pci_dev; in dhdpcie_bus_attach()
1011 bus->pcie_dev = pci_dev; in dhdpcie_bus_attach()
1014 dll_init(&bus->flowring_active_list); in dhdpcie_bus_attach()
1016 bus->active_list_last_process_ts = OSL_SYSUPTIME(); in dhdpcie_bus_attach()
1021 bus->dev_tx_stuck_monitor = TRUE; in dhdpcie_bus_attach()
1022 bus->device_tx_stuck_check = OSL_SYSUPTIME(); in dhdpcie_bus_attach()
1026 if (!(bus->pcie_sh = MALLOCZ(osh, sizeof(pciedev_shared_t)))) { in dhdpcie_bus_attach()
1027 DHD_ERROR(("%s: MALLOC of bus->pcie_sh failed\n", __FUNCTION__)); in dhdpcie_bus_attach()
1034 if (dhdpcie_dongle_attach(bus)) { in dhdpcie_bus_attach()
1041 if (!(bus->dhd = dhd_attach(osh, bus, PCMSGBUF_HDRLEN))) { in dhdpcie_bus_attach()
1047 dhd_conf_get_otp(bus->dhd, bus->sih); in dhdpcie_bus_attach()
1050 bus->dhd->busstate = DHD_BUS_DOWN; in dhdpcie_bus_attach()
1051 bus->dhd->hostrdy_after_init = TRUE; in dhdpcie_bus_attach()
1052 bus->db1_for_mb = TRUE; in dhdpcie_bus_attach()
1053 bus->dhd->hang_report = TRUE; in dhdpcie_bus_attach()
1054 bus->use_mailbox = FALSE; in dhdpcie_bus_attach()
1055 bus->use_d0_inform = FALSE; in dhdpcie_bus_attach()
1056 bus->intr_enabled = FALSE; in dhdpcie_bus_attach()
1057 bus->flr_force_fail = FALSE; in dhdpcie_bus_attach()
1060 dhdpcie_set_dma_ring_indices(bus->dhd, dma_ring_indices); in dhdpcie_bus_attach()
1063 bus->dhd->h2d_phase_supported = h2d_phase ? TRUE : FALSE; in dhdpcie_bus_attach()
1065 bus->dhd->force_dongletrap_on_bad_h2d_phase = in dhdpcie_bus_attach()
1068 bus->dhd->bt_logging_enabled = TRUE; in dhdpcie_bus_attach()
1071 bus->enable_idle_flowring_mgmt = FALSE; in dhdpcie_bus_attach()
1073 bus->irq_registered = FALSE; in dhdpcie_bus_attach()
1076 bus->d2h_intr_method = enable_msi && dhdpcie_chip_support_msi(bus) ? in dhdpcie_bus_attach()
1078 if (bus->dhd->conf->d2h_intr_method >= 0) in dhdpcie_bus_attach()
1079 bus->d2h_intr_method = bus->dhd->conf->d2h_intr_method; in dhdpcie_bus_attach()
1081 bus->d2h_intr_method = PCIE_INTX; in dhdpcie_bus_attach()
1085 if (bus->d2h_intr_method == PCIE_MSI) { in dhdpcie_bus_attach()
1086 bus->d2h_intr_control = PCIE_HOST_IRQ_CTRL; in dhdpcie_bus_attach()
1088 bus->d2h_intr_control = PCIE_D2H_INTMASK_CTRL; in dhdpcie_bus_attach()
1092 bus->hp2p_txcpl_max_items = DHD_MAX_ITEMS_HPP_TXCPL_RING; in dhdpcie_bus_attach()
1093 bus->hp2p_rxcpl_max_items = DHD_MAX_ITEMS_HPP_RXCPL_RING; in dhdpcie_bus_attach()
1098 g_dhd_bus = bus; in dhdpcie_bus_attach()
1099 *bus_ptr = bus; in dhdpcie_bus_attach()
1106 * so 'bus' should not be freed here, it is freed during unload in dhdpcie_bus_attach()
1108 if (bus) { in dhdpcie_bus_attach()
1109 *bus_ptr = bus; in dhdpcie_bus_attach()
1112 if (bus && bus->pcie_sh) { in dhdpcie_bus_attach()
1113 MFREE(osh, bus->pcie_sh, sizeof(pciedev_shared_t)); in dhdpcie_bus_attach()
1116 if (bus) { in dhdpcie_bus_attach()
1117 MFREE(osh, bus, sizeof(dhd_bus_t)); in dhdpcie_bus_attach()
1136 dhd_bus_chip(struct dhd_bus *bus) in dhd_bus_chip() argument
1138 ASSERT(bus->sih != NULL); in dhd_bus_chip()
1139 return bus->sih->chip; in dhd_bus_chip()
1143 dhd_bus_chiprev(struct dhd_bus *bus) in dhd_bus_chiprev() argument
1145 ASSERT(bus); in dhd_bus_chiprev()
1146 ASSERT(bus->sih != NULL); in dhd_bus_chiprev()
1147 return bus->sih->chiprev; in dhd_bus_chiprev()
1151 dhd_bus_pub(struct dhd_bus *bus) in dhd_bus_pub() argument
1153 return bus->dhd; in dhd_bus_pub()
1157 dhd_bus_sih(struct dhd_bus *bus) in dhd_bus_sih() argument
1159 return (void *)bus->sih; in dhd_bus_sih()
1163 dhd_bus_txq(struct dhd_bus *bus) in dhd_bus_txq() argument
1165 return &bus->txq; in dhd_bus_txq()
1171 dhd_bus_t *bus = dhdp->bus; in dhd_bus_chip_id() local
1172 return bus->sih->chip; in dhd_bus_chip_id()
1178 dhd_bus_t *bus = dhdp->bus; in dhd_bus_chiprev_id() local
1179 return bus->sih->chiprev; in dhd_bus_chiprev_id()
1185 dhd_bus_t *bus = dhdp->bus; in dhd_bus_chippkg_id() local
1186 return bus->sih->chippkg; in dhd_bus_chippkg_id()
1189 int dhd_bus_get_ids(struct dhd_bus *bus, uint32 *bus_type, uint32 *bus_num, uint32 *slot_num) in dhd_bus_get_ids() argument
1191 *bus_type = bus->bus; in dhd_bus_get_ids()
1192 *bus_num = bus->bus_num; in dhd_bus_get_ids()
1193 *slot_num = bus->slot_num; in dhd_bus_get_ids()
1238 dhd_bus_t *bus = dhdp->bus; in dhd_bus_query_dpc_sched_errors() local
1241 if (bus->dpc_entry_time < bus->isr_exit_time) { in dhd_bus_query_dpc_sched_errors()
1244 } else if (bus->dpc_entry_time < bus->resched_dpc_time) { in dhd_bus_query_dpc_sched_errors()
1261 GET_SEC_USEC(bus->isr_entry_time), in dhd_bus_query_dpc_sched_errors()
1262 GET_SEC_USEC(bus->isr_exit_time), in dhd_bus_query_dpc_sched_errors()
1263 GET_SEC_USEC(bus->dpc_entry_time), in dhd_bus_query_dpc_sched_errors()
1264 GET_SEC_USEC(bus->dpc_exit_time), in dhd_bus_query_dpc_sched_errors()
1265 GET_SEC_USEC(bus->isr_sched_dpc_time), in dhd_bus_query_dpc_sched_errors()
1266 GET_SEC_USEC(bus->resched_dpc_time))); in dhd_bus_query_dpc_sched_errors()
1274 dhdpcie_bus_intstatus(dhd_bus_t *bus) in dhdpcie_bus_intstatus() argument
1279 if (__DHD_CHK_BUS_LPS_D3_ACKED(bus)) { in dhdpcie_bus_intstatus()
1288 if ((bus->sih->buscorerev == 6) || (bus->sih->buscorerev == 4) || in dhdpcie_bus_intstatus()
1289 (bus->sih->buscorerev == 2)) { in dhdpcie_bus_intstatus()
1290 intstatus = dhdpcie_bus_cfg_read_dword(bus, PCIIntstatus, 4); in dhdpcie_bus_intstatus()
1291 dhdpcie_bus_cfg_write_dword(bus, PCIIntstatus, 4, intstatus); in dhdpcie_bus_intstatus()
1295 intstatus = si_corereg(bus->sih, bus->sih->buscoreidx, bus->pcie_mailbox_int, 0, 0); in dhdpcie_bus_intstatus()
1298 dhd_bus_mmio_trace(bus, bus->pcie_mailbox_int, intstatus, FALSE); in dhdpcie_bus_intstatus()
1302 intmask = si_corereg(bus->sih, bus->sih->buscoreidx, bus->pcie_mailbox_mask, 0, 0); in dhdpcie_bus_intstatus()
1308 bus->is_linkdown = TRUE; in dhdpcie_bus_intstatus()
1309 dhd_pcie_debug_info_dump(bus->dhd); in dhdpcie_bus_intstatus()
1314 bus->no_cfg_restore = 1; in dhdpcie_bus_intstatus()
1317 bus->dhd->hang_reason = HANG_REASON_PCIE_LINK_DOWN_EP_DETECT; in dhdpcie_bus_intstatus()
1319 copy_hang_info_linkdown(bus->dhd); in dhdpcie_bus_intstatus()
1321 dhd_os_send_hang_message(bus->dhd); in dhdpcie_bus_intstatus()
1332 dhd_bus_mmio_trace(bus, bus->pcie_mailbox_mask, intmask, FALSE); in dhdpcie_bus_intstatus()
1343 dhd_bus_mmio_trace(bus, bus->pcie_mailbox_int, intstatus, TRUE); in dhdpcie_bus_intstatus()
1345 si_corereg(bus->sih, bus->sih->buscoreidx, bus->pcie_mailbox_int, bus->def_intmask, in dhdpcie_bus_intstatus()
1348 intstatus &= bus->def_intmask; in dhdpcie_bus_intstatus()
1357 dhd_bus_t *bus = dhd->bus; in dhdpcie_cto_recovery_handler() local
1372 ret = dhdpcie_cto_error_recovery(bus); in dhdpcie_cto_recovery_handler()
1377 dhd_prot_debug_info_print(bus->dhd); in dhdpcie_cto_recovery_handler()
1379 dhd_bus_dump_console_buffer(bus); in dhdpcie_cto_recovery_handler()
1382 if (!bus->is_linkdown && bus->dhd->memdump_enabled) { in dhdpcie_cto_recovery_handler()
1385 bus->dhd->collect_sssr = TRUE; in dhdpcie_cto_recovery_handler()
1387 bus->dhd->memdump_type = DUMP_TYPE_CTO_RECOVERY; in dhdpcie_cto_recovery_handler()
1388 dhdpcie_mem_dump(bus); in dhdpcie_cto_recovery_handler()
1395 bus->no_cfg_restore = 1; in dhdpcie_cto_recovery_handler()
1398 bus->is_linkdown = TRUE; in dhdpcie_cto_recovery_handler()
1399 bus->dhd->hang_reason = HANG_REASON_PCIE_CTO_DETECT; in dhdpcie_cto_recovery_handler()
1401 dhd_os_send_hang_message(bus->dhd); in dhdpcie_cto_recovery_handler()
1406 dhd_bus_dump_imp_cfg_registers(struct dhd_bus *bus) in dhd_bus_dump_imp_cfg_registers() argument
1408 uint32 status_cmd = dhd_pcie_config_read(bus, PCIECFGREG_STATUS_CMD, sizeof(uint32)); in dhd_bus_dump_imp_cfg_registers()
1409 uint32 pmcsr = dhd_pcie_config_read(bus, PCIE_CFG_PMCSR, sizeof(uint32)); in dhd_bus_dump_imp_cfg_registers()
1410 uint32 base_addr0 = dhd_pcie_config_read(bus, PCIECFGREG_BASEADDR0, sizeof(uint32)); in dhd_bus_dump_imp_cfg_registers()
1411 uint32 base_addr1 = dhd_pcie_config_read(bus, PCIECFGREG_BASEADDR1, sizeof(uint32)); in dhd_bus_dump_imp_cfg_registers()
1412 uint32 linkctl = dhd_pcie_config_read(bus, PCIECFGREG_LINK_STATUS_CTRL, sizeof(uint32)); in dhd_bus_dump_imp_cfg_registers()
1414 dhd_pcie_config_read(bus, PCIECFGREG_PML1_SUB_CTRL1, sizeof(uint32)); in dhd_bus_dump_imp_cfg_registers()
1415 uint32 devctl = dhd_pcie_config_read(bus, PCIECFGREG_DEV_STATUS_CTRL, sizeof(uint32)); in dhd_bus_dump_imp_cfg_registers()
1416 uint32 devctl2 = dhd_pcie_config_read(bus, PCIECFGGEN_DEV_STATUS_CTRL2, sizeof(uint32)); in dhd_bus_dump_imp_cfg_registers()
1445 dhdpcie_bus_isr(dhd_bus_t *bus) in dhdpcie_bus_isr() argument
1452 if (!bus) { in dhdpcie_bus_isr()
1453 DHD_LOG_MEM(("%s : bus is null pointer, exit \n", __FUNCTION__)); in dhdpcie_bus_isr()
1457 if (bus->dhd->dongle_reset) { in dhdpcie_bus_isr()
1462 if (bus->dhd->busstate == DHD_BUS_DOWN) { in dhdpcie_bus_isr()
1463 DHD_LOG_MEM(("%s : bus is down \n", __FUNCTION__)); in dhdpcie_bus_isr()
1468 if (!bus->intr_enabled) { in dhdpcie_bus_isr()
1473 if (PCIECTO_ENAB(bus)) { in dhdpcie_bus_isr()
1475 intstatus = dhdpcie_bus_cfg_read_dword(bus, PCI_INT_STATUS, 4); in dhdpcie_bus_isr()
1480 bus->is_linkdown = 1; in dhdpcie_bus_isr()
1481 dhdpcie_disable_irq_nosync(bus); in dhdpcie_bus_isr()
1482 dhd_prot_debug_info_print(bus->dhd); in dhdpcie_bus_isr()
1489 intstatus, bus->cto_enable)); in dhdpcie_bus_isr()
1490 bus->cto_triggered = 1; in dhdpcie_bus_isr()
1491 dhd_bus_dump_imp_cfg_registers(bus); in dhdpcie_bus_isr()
1495 dhd_bus_dump_dar_registers(bus); in dhdpcie_bus_isr()
1499 dhdpcie_disable_irq_nosync(bus); /* Disable interrupt!! */ in dhdpcie_bus_isr()
1502 dhd_bus_stop_queue(bus); in dhdpcie_bus_isr()
1505 dhd_schedule_cto_recovery(bus->dhd); in dhdpcie_bus_isr()
1511 if (bus->d2h_intr_method == PCIE_MSI && in dhdpcie_bus_isr()
1512 !dhd_conf_legacy_msi_chip(bus->dhd)) { in dhdpcie_bus_isr()
1518 intstatus = dhdpcie_bus_intstatus(bus); in dhdpcie_bus_isr()
1522 bus->non_ours_irq_count++; in dhdpcie_bus_isr()
1523 bus->last_non_ours_irq_time = OSL_LOCALTIME_NS(); in dhdpcie_bus_isr()
1529 bus->intstatus = intstatus; in dhdpcie_bus_isr()
1535 bus->is_linkdown = 1; in dhdpcie_bus_isr()
1536 dhdpcie_disable_irq_nosync(bus); in dhdpcie_bus_isr()
1549 bus->intrcount++; in dhdpcie_bus_isr()
1552 bus->ipend = TRUE; in dhdpcie_bus_isr()
1554 bus->isr_intr_disable_count++; in dhdpcie_bus_isr()
1556 if (bus->d2h_intr_control == PCIE_D2H_INTMASK_CTRL) { in dhdpcie_bus_isr()
1557 dhdpcie_bus_intr_disable(bus); /* Disable interrupt using IntMask!! */ in dhdpcie_bus_isr()
1564 dhdpcie_disable_irq_nosync(bus); /* Disable interrupt!! */ in dhdpcie_bus_isr()
1567 bus->intdis = TRUE; in dhdpcie_bus_isr()
1569 if (bus->dhd->dma_h2d_ring_upd_support && bus->dhd->dma_d2h_ring_upd_support && in dhdpcie_bus_isr()
1570 (bus->dhd->ring_attached == TRUE)) { in dhdpcie_bus_isr()
1571 dhd_bus_flow_ring_status_isr_trace(bus->dhd); in dhdpcie_bus_isr()
1577 DHD_OS_WAKE_LOCK(bus->dhd); in dhdpcie_bus_isr()
1578 while (dhd_bus_dpc(bus)); in dhdpcie_bus_isr()
1579 DHD_OS_WAKE_UNLOCK(bus->dhd); in dhdpcie_bus_isr()
1581 bus->dpc_sched = TRUE; in dhdpcie_bus_isr()
1582 bus->isr_sched_dpc_time = OSL_LOCALTIME_NS(); in dhdpcie_bus_isr()
1584 dhd_sched_dpc(bus->dhd); /* queue DPC now!! */ in dhdpcie_bus_isr()
1598 dhdpcie_set_pwr_state(dhd_bus_t *bus, uint state) in dhdpcie_set_pwr_state() argument
1602 osl_t *osh = bus->osh; in dhdpcie_set_pwr_state()
1654 dhdpcie_config_check(dhd_bus_t *bus) in dhdpcie_config_check() argument
1660 val = OSL_PCI_READ_CONFIG(bus->osh, PCI_CFG_VID, sizeof(uint32)); in dhdpcie_config_check()
1672 dhdpcie_config_restore(dhd_bus_t *bus, bool restore_pmcsr) in dhdpcie_config_restore() argument
1675 osl_t *osh = bus->osh; in dhdpcie_config_restore()
1677 if (BCME_OK != dhdpcie_config_check(bus)) { in dhdpcie_config_restore()
1682 OSL_PCI_WRITE_CONFIG(osh, i << 2, sizeof(uint32), bus->saved_config.header[i]); in dhdpcie_config_restore()
1684 OSL_PCI_WRITE_CONFIG(osh, PCI_CFG_CMD, sizeof(uint32), bus->saved_config.header[1]); in dhdpcie_config_restore()
1688 sizeof(uint32), bus->saved_config.pmcsr); in dhdpcie_config_restore()
1690 OSL_PCI_WRITE_CONFIG(osh, PCIECFGREG_MSI_CAP, sizeof(uint32), bus->saved_config.msi_cap); in dhdpcie_config_restore()
1692 bus->saved_config.msi_addr0); in dhdpcie_config_restore()
1694 sizeof(uint32), bus->saved_config.msi_addr1); in dhdpcie_config_restore()
1696 sizeof(uint32), bus->saved_config.msi_data); in dhdpcie_config_restore()
1699 sizeof(uint32), bus->saved_config.exp_dev_ctrl_stat); in dhdpcie_config_restore()
1701 sizeof(uint32), bus->saved_config.exp_dev_ctrl_stat2); in dhdpcie_config_restore()
1703 sizeof(uint32), bus->saved_config.exp_link_ctrl_stat); in dhdpcie_config_restore()
1705 sizeof(uint32), bus->saved_config.exp_link_ctrl_stat2); in dhdpcie_config_restore()
1708 sizeof(uint32), bus->saved_config.l1pm0); in dhdpcie_config_restore()
1710 sizeof(uint32), bus->saved_config.l1pm1); in dhdpcie_config_restore()
1712 OSL_PCI_WRITE_CONFIG(bus->osh, PCI_BAR0_WIN, sizeof(uint32), in dhdpcie_config_restore()
1713 bus->saved_config.bar0_win); in dhdpcie_config_restore()
1714 dhdpcie_setbar1win(bus, bus->saved_config.bar1_win); in dhdpcie_config_restore()
1720 dhdpcie_config_save(dhd_bus_t *bus) in dhdpcie_config_save() argument
1723 osl_t *osh = bus->osh; in dhdpcie_config_save()
1725 if (BCME_OK != dhdpcie_config_check(bus)) { in dhdpcie_config_save()
1730 bus->saved_config.header[i] = OSL_PCI_READ_CONFIG(osh, i << 2, sizeof(uint32)); in dhdpcie_config_save()
1733 bus->saved_config.pmcsr = OSL_PCI_READ_CONFIG(osh, PCIECFGREG_PM_CSR, sizeof(uint32)); in dhdpcie_config_save()
1735 bus->saved_config.msi_cap = OSL_PCI_READ_CONFIG(osh, PCIECFGREG_MSI_CAP, in dhdpcie_config_save()
1737 bus->saved_config.msi_addr0 = OSL_PCI_READ_CONFIG(osh, PCIECFGREG_MSI_ADDR_L, in dhdpcie_config_save()
1739 bus->saved_config.msi_addr1 = OSL_PCI_READ_CONFIG(osh, PCIECFGREG_MSI_ADDR_H, in dhdpcie_config_save()
1741 bus->saved_config.msi_data = OSL_PCI_READ_CONFIG(osh, PCIECFGREG_MSI_DATA, in dhdpcie_config_save()
1744 bus->saved_config.exp_dev_ctrl_stat = OSL_PCI_READ_CONFIG(osh, in dhdpcie_config_save()
1746 bus->saved_config.exp_dev_ctrl_stat2 = OSL_PCI_READ_CONFIG(osh, in dhdpcie_config_save()
1748 bus->saved_config.exp_link_ctrl_stat = OSL_PCI_READ_CONFIG(osh, in dhdpcie_config_save()
1750 bus->saved_config.exp_link_ctrl_stat2 = OSL_PCI_READ_CONFIG(osh, in dhdpcie_config_save()
1753 bus->saved_config.l1pm0 = OSL_PCI_READ_CONFIG(osh, PCIECFGREG_PML1_SUB_CTRL1, in dhdpcie_config_save()
1755 bus->saved_config.l1pm1 = OSL_PCI_READ_CONFIG(osh, PCIECFGREG_PML1_SUB_CTRL2, in dhdpcie_config_save()
1758 bus->saved_config.bar0_win = OSL_PCI_READ_CONFIG(osh, PCI_BAR0_WIN, in dhdpcie_config_save()
1760 bus->saved_config.bar1_win = OSL_PCI_READ_CONFIG(osh, PCI_BAR1_WIN, in dhdpcie_config_save()
1771 dhdpcie_bus_intr_init(dhd_bus_t *bus) in dhdpcie_bus_intr_init() argument
1773 uint buscorerev = bus->sih->buscorerev; in dhdpcie_bus_intr_init()
1774 bus->pcie_mailbox_int = PCIMailBoxInt(buscorerev); in dhdpcie_bus_intr_init()
1775 bus->pcie_mailbox_mask = PCIMailBoxMask(buscorerev); in dhdpcie_bus_intr_init()
1776 bus->d2h_mb_mask = PCIE_MB_D2H_MB_MASK(buscorerev); in dhdpcie_bus_intr_init()
1777 bus->def_intmask = PCIE_MB_D2H_MB_MASK(buscorerev); in dhdpcie_bus_intr_init()
1779 bus->def_intmask |= PCIE_MB_TOPCIE_FN0_0 | PCIE_MB_TOPCIE_FN0_1; in dhdpcie_bus_intr_init()
1784 dhdpcie_cc_watchdog_reset(dhd_bus_t *bus) in dhdpcie_cc_watchdog_reset() argument
1786 uint32 wd_en = (bus->sih->buscorerev >= 66) ? WD_SSRESET_PCIE_F0_EN : in dhdpcie_cc_watchdog_reset()
1788 pcie_watchdog_reset(bus->osh, bus->sih, WD_ENABLE_MASK, wd_en); in dhdpcie_cc_watchdog_reset()
1792 dhdpcie_dongle_reset(dhd_bus_t *bus) in dhdpcie_dongle_reset() argument
1798 if (bus->is_linkdown) { in dhdpcie_dongle_reset()
1805 (void)dhd_bus_cfg_sprom_ctrl_bp_reset(bus); in dhdpcie_dongle_reset()
1809 (void)dhd_bus_cfg_ss_ctrl_bp_reset(bus); in dhdpcie_dongle_reset()
1818 if (qt_flr_reset && (dhd_bus_perform_flr(bus, FALSE) != BCME_UNSUPPORTED)) { in dhdpcie_dongle_reset()
1823 if (dhd_bus_perform_flr(bus, FALSE) == BCME_UNSUPPORTED) in dhdpcie_dongle_reset()
1827 dhdpcie_cc_watchdog_reset(bus); in dhdpcie_dongle_reset()
1847 void dhdpcie_htclkratio_cal(dhd_bus_t *bus) in dhdpcie_htclkratio_cal() argument
1859 cur_coreidx = si_coreidx(bus->sih); in dhdpcie_htclkratio_cal()
1860 if (!si_setcore(bus->sih, PMU_CORE_ID, 0)) { in dhdpcie_htclkratio_cal()
1865 pmu_idx = si_coreidx(bus->sih); in dhdpcie_htclkratio_cal()
1868 ilp_start = si_corereg(bus->sih, pmu_idx, offsetof(pmuregs_t, pmutimer), 0, 0); in dhdpcie_htclkratio_cal()
1870 ilp_tick = si_corereg(bus->sih, pmu_idx, offsetof(pmuregs_t, pmutimer), 0, 0); in dhdpcie_htclkratio_cal()
1875 xtal_ratio = si_corereg(bus->sih, pmu_idx, offsetof(pmuregs_t, pmu_xtalfreq), 0, 0); in dhdpcie_htclkratio_cal()
1879 si_setcoreidx(bus->sih, cur_coreidx); in dhdpcie_htclkratio_cal()
1892 bus->xtalfreq = xtalfreq; in dhdpcie_htclkratio_cal()
1893 bus->ilp_tick = ilp_tick; in dhdpcie_htclkratio_cal()
1894 bus->xtal_ratio = xtal_ratio; in dhdpcie_htclkratio_cal()
1901 void dhdpcie_htclkratio_recal(dhd_bus_t *bus, char *nvram, uint nvram_sz) in dhdpcie_htclkratio_recal() argument
1936 if (xtalfreq == 0 || bus->xtalfreq == 0 || xtalfreq == bus->xtalfreq) { in dhdpcie_htclkratio_recal()
1945 xtalfreq, bus->xtalfreq)); in dhdpcie_htclkratio_recal()
1947 htclkratio = xtalfreq / (bus->ilp_tick * bus->xtal_ratio); in dhdpcie_htclkratio_recal()
1948 bus->xtalfreq = xtalfreq; in dhdpcie_htclkratio_recal()
1956 is_bmpu_supported(dhd_bus_t *bus) in is_bmpu_supported() argument
1958 if (BCM4378_CHIP(bus->sih->chip) || in is_bmpu_supported()
1959 BCM4376_CHIP(bus->sih->chip) || in is_bmpu_supported()
1960 BCM4387_CHIP(bus->sih->chip) || in is_bmpu_supported()
1961 BCM4385_CHIP(bus->sih->chip)) { in is_bmpu_supported()
1970 dhdpcie_bus_mpu_disable(dhd_bus_t *bus) in dhdpcie_bus_mpu_disable() argument
1975 if (is_bmpu_supported(bus) == FALSE) { in dhdpcie_bus_mpu_disable()
1980 (void)serialized_backplane_access(bus, CHIP_COMMON_SCR_DHD_TO_BL_ADDR(bus->sih), in dhdpcie_bus_mpu_disable()
1982 (void)serialized_backplane_access(bus, CHIP_COMMON_SCR_BL_TO_DHD_ADDR(bus->sih), in dhdpcie_bus_mpu_disable()
1985 cr4_regs = si_setcore(bus->sih, ARMCR4_CORE_ID, 0); in dhdpcie_bus_mpu_disable()
1990 if (R_REG(bus->osh, cr4_regs + ARMCR4REG_CORECAP) & ACC_MPU_MASK) { in dhdpcie_bus_mpu_disable()
1991 /* bus mpu is supported */ in dhdpcie_bus_mpu_disable()
1992 W_REG(bus->osh, cr4_regs + ARMCR4REG_MPUCTRL, 0); in dhdpcie_bus_mpu_disable()
1997 dhdpcie_dongle_attach(dhd_bus_t *bus) in dhdpcie_dongle_attach() argument
1999 osl_t *osh = bus->osh; in dhdpcie_dongle_attach()
2000 volatile void *regsva = (volatile void*)bus->regs; in dhdpcie_dongle_attach()
2014 bus->cto_enable = FALSE; in dhdpcie_dongle_attach()
2017 chipid = dhd_get_chipid(bus); in dhdpcie_dongle_attach()
2021 bus->cto_enable = FALSE; in dhdpcie_dongle_attach()
2024 bus->cto_enable = TRUE; in dhdpcie_dongle_attach()
2028 bus->cto_enable = FALSE; in dhdpcie_dongle_attach()
2032 if (PCIECTO_ENAB(bus)) { in dhdpcie_dongle_attach()
2033 dhdpcie_cto_init(bus, TRUE); in dhdpcie_dongle_attach()
2037 link_recovery = bus->dhd; in dhdpcie_dongle_attach()
2040 dhd_init_pwr_req_lock(bus); in dhdpcie_dongle_attach()
2041 dhd_init_bus_lp_state_lock(bus); in dhdpcie_dongle_attach()
2042 dhd_init_backplane_access_lock(bus); in dhdpcie_dongle_attach()
2044 bus->alp_only = TRUE; in dhdpcie_dongle_attach()
2045 bus->sih = NULL; in dhdpcie_dongle_attach()
2047 /* Checking PCIe bus status with reading configuration space */ in dhdpcie_dongle_attach()
2054 bus->cl_devid = devid; in dhdpcie_dongle_attach()
2057 dhdpcie_bus_cfg_set_bar0_win(bus, si_enum_base(devid)); in dhdpcie_dongle_attach()
2071 if (BCME_OK != dhdpcie_config_save(bus)) { in dhdpcie_dongle_attach()
2078 if (!(bus->sih = si_attach((uint)devid, osh, regsva, PCI_BUS, bus, in dhdpcie_dongle_attach()
2079 &bus->vars, &bus->varsz))) { in dhdpcie_dongle_attach()
2084 if (MULTIBP_ENAB(bus->sih) && (bus->sih->buscorerev >= 66)) { in dhdpcie_dongle_attach()
2090 if (PCIE_ENUM_RESET_WAR_ENAB(bus->sih->buscorerev)) { in dhdpcie_dongle_attach()
2091 dhdpcie_ssreset_dis_enum_rst(bus); in dhdpcie_dongle_attach()
2098 bus->pwr_req_ref = 0; in dhdpcie_dongle_attach()
2101 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_dongle_attach()
2102 dhd_bus_pcie_pwr_req_nolock(bus); in dhdpcie_dongle_attach()
2107 if ((si_setcore(bus->sih, ARM7S_CORE_ID, 0)) || in dhdpcie_dongle_attach()
2108 (si_setcore(bus->sih, ARMCM3_CORE_ID, 0)) || in dhdpcie_dongle_attach()
2109 (si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) || in dhdpcie_dongle_attach()
2110 (si_setcore(bus->sih, ARMCA7_CORE_ID, 0))) { in dhdpcie_dongle_attach()
2111 bus->armrev = si_corerev(bus->sih); in dhdpcie_dongle_attach()
2112 bus->coreid = si_coreid(bus->sih); in dhdpcie_dongle_attach()
2119 if (bus->coreid == ARMCA7_CORE_ID) { in dhdpcie_dongle_attach()
2120 val = dhdpcie_bus_cfg_read_dword(bus, PCIE_CFG_SUBSYSTEM_CONTROL, 4); in dhdpcie_dongle_attach()
2121 dhdpcie_bus_cfg_write_dword(bus, PCIE_CFG_SUBSYSTEM_CONTROL, 4, in dhdpcie_dongle_attach()
2129 if (!dhdpcie_is_arm_halted(bus)) { in dhdpcie_dongle_attach()
2145 dhdpcie_clkreq(bus->osh, 1, 1); in dhdpcie_dongle_attach()
2150 dhdpcie_htclkratio_cal(bus); in dhdpcie_dongle_attach()
2154 * bus->dhd will be NULL if it is called from dhd_bus_attach, so need to reset in dhdpcie_dongle_attach()
2159 if (bus->dhd == NULL) { in dhdpcie_dongle_attach()
2168 dongle_reset_needed = !(bus->dhd->dongle_isolation); in dhdpcie_dongle_attach()
2172 if (BCM4397_CHIP(dhd_get_chipid(bus)) && (bus->sih->chiprev == 0)) { in dhdpcie_dongle_attach()
2175 origidx = si_coreidx(bus->sih); in dhdpcie_dongle_attach()
2176 pmu_corereg(bus->sih, SI_CC_IDX, chipcontrol_addr, ~0, PMU_CHIPCTL18); in dhdpcie_dongle_attach()
2177 pmu_corereg(bus->sih, SI_CC_IDX, chipcontrol_data, in dhdpcie_dongle_attach()
2182 si_setcore(bus->sih, origidx, 0); in dhdpcie_dongle_attach()
2191 dhdpcie_dongle_reset(bus); in dhdpcie_dongle_attach()
2197 bus->force_bt_quiesce = TRUE; in dhdpcie_dongle_attach()
2202 if (bus->sih->buscorerev >= 66) { in dhdpcie_dongle_attach()
2203 bus->force_bt_quiesce = FALSE; in dhdpcie_dongle_attach()
2206 dhdpcie_dongle_flr_or_pwr_toggle(bus); in dhdpcie_dongle_attach()
2208 dhdpcie_bus_mpu_disable(bus); in dhdpcie_dongle_attach()
2210 si_setcore(bus->sih, PCIE2_CORE_ID, 0); in dhdpcie_dongle_attach()
2211 sbpcieregs = (sbpcieregs_t*)(bus->regs); in dhdpcie_dongle_attach()
2219 if (si_setcore(bus->sih, SYSMEM_CORE_ID, 0)) { in dhdpcie_dongle_attach()
2220 if (!(bus->orig_ramsize = si_sysmem_size(bus->sih))) { in dhdpcie_dongle_attach()
2225 switch ((uint16)bus->sih->chip) { in dhdpcie_dongle_attach()
2227 bus->dongle_ram_base = CA7_4385_RAM_BASE; in dhdpcie_dongle_attach()
2231 bus->dongle_ram_base = CA7_4389_RAM_BASE; in dhdpcie_dongle_attach()
2235 bus->dongle_ram_base = CA7_4389_RAM_BASE; in dhdpcie_dongle_attach()
2240 bus->dongle_ram_base = 0x200000; in dhdpcie_dongle_attach()
2242 __FUNCTION__, bus->dongle_ram_base)); in dhdpcie_dongle_attach()
2245 } else if (!si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) { in dhdpcie_dongle_attach()
2246 if (!(bus->orig_ramsize = si_socram_size(bus->sih))) { in dhdpcie_dongle_attach()
2252 if (!(bus->orig_ramsize = si_tcm_size(bus->sih))) { in dhdpcie_dongle_attach()
2257 switch ((uint16)bus->sih->chip) { in dhdpcie_dongle_attach()
2260 bus->dongle_ram_base = CR4_4335_RAM_BASE; in dhdpcie_dongle_attach()
2268 bus->dongle_ram_base = CR4_4350_RAM_BASE; in dhdpcie_dongle_attach()
2271 bus->dongle_ram_base = CR4_4360_RAM_BASE; in dhdpcie_dongle_attach()
2275 bus->dongle_ram_base = CR4_4364_RAM_BASE; in dhdpcie_dongle_attach()
2279 bus->dongle_ram_base = (bus->sih->chiprev < 6) /* changed at 4345C0 */ in dhdpcie_dongle_attach()
2283 bus->dongle_ram_base = CR4_43602_RAM_BASE; in dhdpcie_dongle_attach()
2287 bus->dongle_ram_base = ((bus->sih->chiprev < 9) ? in dhdpcie_dongle_attach()
2293 bus->dongle_ram_base = CR4_4347_RAM_BASE; in dhdpcie_dongle_attach()
2296 bus->dongle_ram_base = CR4_43751_RAM_BASE; in dhdpcie_dongle_attach()
2299 bus->dongle_ram_base = CR4_43752_RAM_BASE; in dhdpcie_dongle_attach()
2302 bus->dongle_ram_base = CR4_4376_RAM_BASE; in dhdpcie_dongle_attach()
2305 bus->dongle_ram_base = CR4_4378_RAM_BASE; in dhdpcie_dongle_attach()
2308 bus->dongle_ram_base = CR4_4362_RAM_BASE; in dhdpcie_dongle_attach()
2312 bus->dongle_ram_base = CR4_4369_RAM_BASE; in dhdpcie_dongle_attach()
2315 bus->dongle_ram_base = CR4_4377_RAM_BASE; in dhdpcie_dongle_attach()
2318 bus->dongle_ram_base = CR4_4387_RAM_BASE; in dhdpcie_dongle_attach()
2321 bus->dongle_ram_base = CR4_4385_RAM_BASE; in dhdpcie_dongle_attach()
2324 bus->dongle_ram_base = 0; in dhdpcie_dongle_attach()
2326 __FUNCTION__, bus->dongle_ram_base)); in dhdpcie_dongle_attach()
2329 bus->ramsize = bus->orig_ramsize; in dhdpcie_dongle_attach()
2331 dhdpcie_bus_dongle_setmemsize(bus, dhd_dongle_ramsize); in dhdpcie_dongle_attach()
2334 if (bus->ramsize > DONGLE_TCM_MAP_SIZE) { in dhdpcie_dongle_attach()
2336 __FUNCTION__, bus->ramsize, bus->ramsize)); in dhdpcie_dongle_attach()
2341 bus->ramsize, bus->orig_ramsize, bus->dongle_ram_base)); in dhdpcie_dongle_attach()
2343 dhdpcie_bar1_window_switch_enab(bus); in dhdpcie_dongle_attach()
2346 dhd_init_bar1_switch_lock(bus); in dhdpcie_dongle_attach()
2348 bus->srmemsize = si_socram_srmem_size(bus->sih); in dhdpcie_dongle_attach()
2350 dhdpcie_bus_intr_init(bus); in dhdpcie_dongle_attach()
2353 bus->intr = (bool)dhd_intr; in dhdpcie_dongle_attach()
2354 if ((bus->poll = (bool)dhd_poll)) in dhdpcie_dongle_attach()
2355 bus->pollrate = 1; in dhdpcie_dongle_attach()
2357 dhd_bus_aspm_enable_rc_ep(bus, FALSE); in dhdpcie_dongle_attach()
2360 dhdpcie_oob_init(bus); in dhdpcie_dongle_attach()
2363 bus->inb_enabled = TRUE; in dhdpcie_dongle_attach()
2366 bus->ds_enabled = TRUE; in dhdpcie_dongle_attach()
2367 bus->deep_sleep = TRUE; in dhdpcie_dongle_attach()
2370 bus->idma_enabled = TRUE; in dhdpcie_dongle_attach()
2371 bus->ifrm_enabled = TRUE; in dhdpcie_dongle_attach()
2373 bus->dma_chan = 0; in dhdpcie_dongle_attach()
2376 dhdpcie_pme_stat_clear(bus); in dhdpcie_dongle_attach()
2378 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_dongle_attach()
2379 dhd_bus_pcie_pwr_req_clear_nolock(bus); in dhdpcie_dongle_attach()
2387 si_srpwr_request(bus->sih, SRPWR_DMN0_PCIE_MASK, 0); in dhdpcie_dongle_attach()
2393 if (bus->sih->buscorerev >= 68) { in dhdpcie_dongle_attach()
2394 dhd_bus_pcie_pwr_req_wl_domain(bus, in dhdpcie_dongle_attach()
2395 DAR_PCIE_PWR_CTRL((bus->sih)->buscorerev), TRUE); in dhdpcie_dongle_attach()
2412 dhd_bus_dump_imp_cfg_registers(bus); in dhdpcie_dongle_attach()
2414 if (PCIECTO_ENAB(bus)) { in dhdpcie_dongle_attach()
2417 dhdpcie_bus_cfg_read_dword(bus, PCI_INT_STATUS, 4); in dhdpcie_dongle_attach()
2424 pci_intstatus, bus->cto_enable)); in dhdpcie_dongle_attach()
2427 dhd_deinit_pwr_req_lock(bus); in dhdpcie_dongle_attach()
2428 dhd_deinit_bus_lp_state_lock(bus); in dhdpcie_dongle_attach()
2429 dhd_deinit_backplane_access_lock(bus); in dhdpcie_dongle_attach()
2431 if (bus->sih != NULL) { in dhdpcie_dongle_attach()
2433 dhd_bus_dump_dar_registers(bus); in dhdpcie_dongle_attach()
2434 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_dongle_attach()
2435 dhd_bus_pcie_pwr_req_clear_nolock(bus); in dhdpcie_dongle_attach()
2438 si_detach(bus->sih); in dhdpcie_dongle_attach()
2439 bus->sih = NULL; in dhdpcie_dongle_attach()
2448 dhpcie_bus_unmask_interrupt(dhd_bus_t *bus) in dhpcie_bus_unmask_interrupt() argument
2450 dhdpcie_bus_cfg_write_dword(bus, PCIIntmask, 4, I_MB); in dhpcie_bus_unmask_interrupt()
2454 dhpcie_bus_mask_interrupt(dhd_bus_t *bus) in dhpcie_bus_mask_interrupt() argument
2456 dhdpcie_bus_cfg_write_dword(bus, PCIIntmask, 4, 0x0); in dhpcie_bus_mask_interrupt()
2462 dhdpcie_bus_intr_enable(dhd_bus_t *bus) in dhdpcie_bus_intr_enable() argument
2465 if (bus) { in dhdpcie_bus_intr_enable()
2466 if (bus->sih && !bus->is_linkdown) { in dhdpcie_bus_intr_enable()
2468 if (bus->bus_low_power_state == DHD_BUS_D3_ACK_RECIEVED) { in dhdpcie_bus_intr_enable()
2471 if ((bus->sih->buscorerev == 2) || (bus->sih->buscorerev == 6) || in dhdpcie_bus_intr_enable()
2472 (bus->sih->buscorerev == 4)) { in dhdpcie_bus_intr_enable()
2473 dhpcie_bus_unmask_interrupt(bus); in dhdpcie_bus_intr_enable()
2476 dhd_bus_mmio_trace(bus, bus->pcie_mailbox_mask, in dhdpcie_bus_intr_enable()
2477 bus->def_intmask, TRUE); in dhdpcie_bus_intr_enable()
2479 si_corereg(bus->sih, bus->sih->buscoreidx, bus->pcie_mailbox_mask, in dhdpcie_bus_intr_enable()
2480 bus->def_intmask, bus->def_intmask); in dhdpcie_bus_intr_enable()
2485 dhd_msix_message_set(bus->dhd, 0, 0, TRUE); in dhdpcie_bus_intr_enable()
2494 dhdpcie_bus_intr_disable(dhd_bus_t *bus) in dhdpcie_bus_intr_disable() argument
2497 if (bus && bus->sih && !bus->is_linkdown) { in dhdpcie_bus_intr_disable()
2499 if (DHD_CHK_BUS_LPS_D3_ACKED(bus)) { in dhdpcie_bus_intr_disable()
2503 if ((bus->sih->buscorerev == 2) || (bus->sih->buscorerev == 6) || in dhdpcie_bus_intr_disable()
2504 (bus->sih->buscorerev == 4)) { in dhdpcie_bus_intr_disable()
2505 dhpcie_bus_mask_interrupt(bus); in dhdpcie_bus_intr_disable()
2508 dhd_bus_mmio_trace(bus, bus->pcie_mailbox_mask, 0, TRUE); in dhdpcie_bus_intr_disable()
2510 si_corereg(bus->sih, bus->sih->buscoreidx, bus->pcie_mailbox_mask, in dhdpcie_bus_intr_disable()
2511 bus->def_intmask, 0); in dhdpcie_bus_intr_disable()
2518 * with dhd = NULL during attach time. So check for bus->dhd NULL before in dhdpcie_bus_intr_disable()
2521 if (bus && bus->dhd) { in dhdpcie_bus_intr_disable()
2522 dhd_msix_message_set(bus->dhd, 0, 0, FALSE); in dhdpcie_bus_intr_disable()
2531 * to other bus user contexts like Tx, Rx, IOVAR, WD etc and it waits for other contexts
2532 * to gracefully exit. All the bus usage contexts before marking busstate as busy, will check for
2562 dhdpcie_fw_trap(dhdp->bus); in dhdpcie_advertise_bus_cleanup()
2583 * bus usage context is not clearing the respective usage bit, print in dhdpcie_advertise_bus_cleanup()
2615 dhdpcie_bus_remove_prep(dhd_bus_t *bus) in dhdpcie_bus_remove_prep() argument
2620 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_remove_prep()
2622 bus->dhd->busstate = DHD_BUS_DOWN; in dhdpcie_bus_remove_prep()
2623 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_remove_prep()
2627 if (bus->inb_lock) { in dhdpcie_bus_remove_prep()
2628 osl_spin_lock_deinit(bus->dhd->osh, bus->inb_lock); in dhdpcie_bus_remove_prep()
2629 bus->inb_lock = NULL; in dhdpcie_bus_remove_prep()
2633 dhd_os_sdlock(bus->dhd); in dhdpcie_bus_remove_prep()
2635 if (bus->sih && !bus->dhd->dongle_isolation) { in dhdpcie_bus_remove_prep()
2637 dhd_bus_pcie_pwr_req_reload_war(bus); in dhdpcie_bus_remove_prep()
2642 if ((bus->sih->buscorerev == 19) || (bus->sih->buscorerev == 23)) { in dhdpcie_bus_remove_prep()
2643 pcie_set_trefup_time_100us(bus->sih); in dhdpcie_bus_remove_prep()
2650 if ((PMUREV(bus->sih->pmurev) > 31) && in dhdpcie_bus_remove_prep()
2651 !(PCIE_FASTLPO_ENABLED(bus->sih->buscorerev))) { in dhdpcie_bus_remove_prep()
2652 si_pmu_fast_lpo_disable(bus->sih); in dhdpcie_bus_remove_prep()
2660 if (!bus->is_linkdown) { in dhdpcie_bus_remove_prep()
2669 dhdpcie_dongle_reset(bus); in dhdpcie_bus_remove_prep()
2673 bus->dhd->is_pcie_watchdog_reset = TRUE; in dhdpcie_bus_remove_prep()
2676 dhd_os_sdunlock(bus->dhd); in dhdpcie_bus_remove_prep()
2682 dhd_init_bus_lp_state_lock(dhd_bus_t *bus) in dhd_init_bus_lp_state_lock() argument
2684 if (!bus->bus_lp_state_lock) { in dhd_init_bus_lp_state_lock()
2685 bus->bus_lp_state_lock = osl_spin_lock_init(bus->osh); in dhd_init_bus_lp_state_lock()
2690 dhd_deinit_bus_lp_state_lock(dhd_bus_t *bus) in dhd_deinit_bus_lp_state_lock() argument
2692 if (bus->bus_lp_state_lock) { in dhd_deinit_bus_lp_state_lock()
2693 osl_spin_lock_deinit(bus->osh, bus->bus_lp_state_lock); in dhd_deinit_bus_lp_state_lock()
2694 bus->bus_lp_state_lock = NULL; in dhd_deinit_bus_lp_state_lock()
2699 dhd_init_backplane_access_lock(dhd_bus_t *bus) in dhd_init_backplane_access_lock() argument
2701 if (!bus->backplane_access_lock) { in dhd_init_backplane_access_lock()
2702 bus->backplane_access_lock = osl_spin_lock_init(bus->osh); in dhd_init_backplane_access_lock()
2707 dhd_deinit_backplane_access_lock(dhd_bus_t *bus) in dhd_deinit_backplane_access_lock() argument
2709 if (bus->backplane_access_lock) { in dhd_deinit_backplane_access_lock()
2710 osl_spin_lock_deinit(bus->osh, bus->backplane_access_lock); in dhd_deinit_backplane_access_lock()
2711 bus->backplane_access_lock = NULL; in dhd_deinit_backplane_access_lock()
2717 dhdpcie_bus_release(dhd_bus_t *bus) in dhdpcie_bus_release() argument
2727 if (bus) { in dhdpcie_bus_release()
2729 osh = bus->osh; in dhdpcie_bus_release()
2732 if (bus->dhd) { in dhdpcie_bus_release()
2736 dhdpcie_advertise_bus_remove(bus->dhd); in dhdpcie_bus_release()
2737 dongle_isolation = bus->dhd->dongle_isolation; in dhdpcie_bus_release()
2738 bus->dhd->is_pcie_watchdog_reset = FALSE; in dhdpcie_bus_release()
2739 dhdpcie_bus_remove_prep(bus); in dhdpcie_bus_release()
2741 if (bus->intr) { in dhdpcie_bus_release()
2742 dhdpcie_bus_intr_disable(bus); in dhdpcie_bus_release()
2743 dhdpcie_free_irq(bus); in dhdpcie_bus_release()
2745 dhd_deinit_bus_lp_state_lock(bus); in dhdpcie_bus_release()
2746 dhd_deinit_bar1_switch_lock(bus); in dhdpcie_bus_release()
2747 dhd_deinit_backplane_access_lock(bus); in dhdpcie_bus_release()
2748 dhd_deinit_pwr_req_lock(bus); in dhdpcie_bus_release()
2750 dhd_deinit_dongle_ds_lock(bus); in dhdpcie_bus_release()
2753 if (IDMA_ACTIVE(bus->dhd)) { in dhdpcie_bus_release()
2759 buscorerev = bus->sih->buscorerev; in dhdpcie_bus_release()
2760 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_release()
2765 * dhdpcie_bus_release_dongle free bus->sih handle, which is needed to in dhdpcie_bus_release()
2770 dhd_detach(bus->dhd); in dhdpcie_bus_release()
2771 dhdpcie_bus_release_dongle(bus, osh, dongle_isolation, TRUE); in dhdpcie_bus_release()
2772 dhd_free(bus->dhd); in dhdpcie_bus_release()
2773 bus->dhd = NULL; in dhdpcie_bus_release()
2777 if (bus->intr) { in dhdpcie_bus_release()
2778 dhdpcie_bus_intr_disable(bus); in dhdpcie_bus_release()
2779 dhdpcie_free_irq(bus); in dhdpcie_bus_release()
2781 dhdpcie_bus_release_dongle(bus, osh, dongle_isolation, TRUE); in dhdpcie_bus_release()
2785 if (bus->regs) { in dhdpcie_bus_release()
2786 dhdpcie_bus_reg_unmap(osh, bus->regs, DONGLE_REG_MAP_SIZE); in dhdpcie_bus_release()
2787 bus->regs = NULL; in dhdpcie_bus_release()
2789 if (bus->tcm) { in dhdpcie_bus_release()
2790 dhdpcie_bus_reg_unmap(osh, bus->tcm, DONGLE_TCM_MAP_SIZE); in dhdpcie_bus_release()
2791 bus->tcm = NULL; in dhdpcie_bus_release()
2794 dhdpcie_bus_release_malloc(bus, osh); in dhdpcie_bus_release()
2796 if (bus->pcie_sh) { in dhdpcie_bus_release()
2797 MFREE(osh, bus->pcie_sh, sizeof(pciedev_shared_t)); in dhdpcie_bus_release()
2800 if (bus->console.buf != NULL) { in dhdpcie_bus_release()
2801 MFREE(osh, bus->console.buf, bus->console.bufsize); in dhdpcie_bus_release()
2805 if (bus->msi_sim) { in dhdpcie_bus_release()
2806 DMA_UNMAP(osh, bus->msi_sim_phys, MSI_SIM_BUFSIZE, DMA_RX, 0, 0); in dhdpcie_bus_release()
2807 MFREE(osh, bus->msi_sim_addr, MSI_SIM_BUFSIZE); in dhdpcie_bus_release()
2811 if (bus->hostfw_buf.va) { in dhdpcie_bus_release()
2812 DMA_FREE_CONSISTENT(osh, bus->hostfw_buf.va, bus->hostfw_buf._alloced, in dhdpcie_bus_release()
2813 bus->hostfw_buf.pa, bus->hostfw_buf.dmah); in dhdpcie_bus_release()
2814 memset(&bus->hostfw_buf, 0, sizeof(bus->hostfw_buf)); in dhdpcie_bus_release()
2818 /* Finally free bus info */ in dhdpcie_bus_release()
2819 MFREE(osh, bus, sizeof(dhd_bus_t)); in dhdpcie_bus_release()
2828 dhdpcie_bus_release_dongle(dhd_bus_t *bus, osl_t *osh, bool dongle_isolation, bool reset_flag) in dhdpcie_bus_release_dongle() argument
2830 DHD_TRACE(("%s: Enter bus->dhd %p bus->dhd->dongle_reset %d \n", __FUNCTION__, in dhdpcie_bus_release_dongle()
2831 bus->dhd, bus->dhd->dongle_reset)); in dhdpcie_bus_release_dongle()
2833 if ((bus->dhd && bus->dhd->dongle_reset) && reset_flag) { in dhdpcie_bus_release_dongle()
2837 if (bus->is_linkdown) { in dhdpcie_bus_release_dongle()
2842 if (bus->sih) { in dhdpcie_bus_release_dongle()
2844 if (bus->msi_sim) { in dhdpcie_bus_release_dongle()
2846 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_release_dongle()
2848 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_release_dongle()
2860 bus->dhd && !bus->dhd->is_pcie_watchdog_reset) { in dhdpcie_bus_release_dongle()
2861 dhdpcie_dongle_reset(bus); in dhdpcie_bus_release_dongle()
2865 dhdpcie_dongle_flr_or_pwr_toggle(bus); in dhdpcie_bus_release_dongle()
2867 if (bus->ltrsleep_on_unload) { in dhdpcie_bus_release_dongle()
2868 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_release_dongle()
2872 if (bus->sih->buscorerev == 13) in dhdpcie_bus_release_dongle()
2873 pcie_serdes_iddqdisable(bus->osh, bus->sih, in dhdpcie_bus_release_dongle()
2874 (sbpcieregs_t *) bus->regs); in dhdpcie_bus_release_dongle()
2884 dhdpcie_clkreq(bus->osh, 1, 0); in dhdpcie_bus_release_dongle()
2889 if (bus->sih) { in dhdpcie_bus_release_dongle()
2890 si_detach(bus->sih); in dhdpcie_bus_release_dongle()
2891 bus->sih = NULL; in dhdpcie_bus_release_dongle()
2893 if (bus->vars && bus->varsz) { in dhdpcie_bus_release_dongle()
2894 MFREE(osh, bus->vars, bus->varsz); in dhdpcie_bus_release_dongle()
2895 bus->vars = NULL; in dhdpcie_bus_release_dongle()
2902 dhdpcie_bus_cfg_read_dword(dhd_bus_t *bus, uint32 addr, uint32 size) in dhdpcie_bus_cfg_read_dword() argument
2904 uint32 data = OSL_PCI_READ_CONFIG(bus->osh, addr, size); in dhdpcie_bus_cfg_read_dword()
2910 dhdpcie_bus_cfg_write_dword(dhd_bus_t *bus, uint32 addr, uint32 size, uint32 data) in dhdpcie_bus_cfg_write_dword() argument
2912 OSL_PCI_WRITE_CONFIG(bus->osh, addr, size, data); in dhdpcie_bus_cfg_write_dword()
2916 dhdpcie_bus_cfg_set_bar0_win(dhd_bus_t *bus, uint32 data) in dhdpcie_bus_cfg_set_bar0_win() argument
2918 OSL_PCI_WRITE_CONFIG(bus->osh, PCI_BAR0_WIN, 4, data); in dhdpcie_bus_cfg_set_bar0_win()
2922 dhdpcie_bus_dongle_setmemsize(struct dhd_bus *bus, int mem_size) in dhdpcie_bus_dongle_setmemsize() argument
2927 mem_size, min_size, (int32)bus->orig_ramsize)); in dhdpcie_bus_dongle_setmemsize()
2929 (mem_size < (int32)bus->orig_ramsize)) { in dhdpcie_bus_dongle_setmemsize()
2930 bus->ramsize = mem_size; in dhdpcie_bus_dongle_setmemsize()
2937 dhdpcie_bus_release_malloc(dhd_bus_t *bus, osl_t *osh) in dhdpcie_bus_release_malloc() argument
2941 if (bus->dhd && bus->dhd->dongle_reset) in dhdpcie_bus_release_malloc()
2944 if (bus->vars && bus->varsz) { in dhdpcie_bus_release_malloc()
2945 MFREE(osh, bus->vars, bus->varsz); in dhdpcie_bus_release_malloc()
2953 /** Stop bus module: clear pending frames, disable data flow */
2954 void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex) in dhd_bus_stop() argument
2960 if (!bus->dhd) in dhd_bus_stop()
2963 if (bus->dhd->busstate == DHD_BUS_DOWN) { in dhd_bus_stop()
2968 DHD_STOP_RPM_TIMER(bus->dhd); in dhd_bus_stop()
2970 DHD_GENERAL_LOCK(bus->dhd, flags); in dhd_bus_stop()
2972 bus->dhd->busstate = DHD_BUS_DOWN; in dhd_bus_stop()
2973 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhd_bus_stop()
2976 atomic_set(&bus->dhd->block_bus, TRUE); in dhd_bus_stop()
2979 dhdpcie_bus_intr_disable(bus); in dhd_bus_stop()
2981 if (!bus->is_linkdown) { in dhd_bus_stop()
2983 status = dhdpcie_bus_cfg_read_dword(bus, PCIIntstatus, 4); in dhd_bus_stop()
2984 dhdpcie_bus_cfg_write_dword(bus, PCIIntstatus, 4, status); in dhd_bus_stop()
2989 dhd_dpc_kill(bus->dhd); in dhd_bus_stop()
2994 pm_runtime_disable(dhd_bus_to_dev(bus)); in dhd_bus_stop()
2995 pm_runtime_set_suspended(dhd_bus_to_dev(bus)); in dhd_bus_stop()
2996 pm_runtime_enable(dhd_bus_to_dev(bus)); in dhd_bus_stop()
3002 dhd_wakeup_ioctl_event(bus->dhd, IOCTL_RETURN_ON_BUS_STOP); in dhd_bus_stop()
3033 dhd_bus_device_tx_stuck_scan(dhd_bus_t *bus) in dhd_bus_device_tx_stuck_scan() argument
3040 if_flow_lkup_t *if_flow_lkup = (if_flow_lkup_t *)bus->dhd->if_flow_lkup; in dhd_bus_device_tx_stuck_scan()
3053 DHD_FLOWRING_LIST_LOCK(bus->dhd->flowring_list_lock, list_lock_flags); in dhd_bus_device_tx_stuck_scan()
3055 for (item = dll_tail_p(&bus->flowring_active_list); in dhd_bus_device_tx_stuck_scan()
3056 !dll_end(&bus->flowring_active_list, item); item = prev) { in dhd_bus_device_tx_stuck_scan()
3072 ring_empty = dhd_prot_is_cmpl_ring_empty(bus->dhd, flow_ring_node->prot_info); in dhd_bus_device_tx_stuck_scan()
3137 DHD_FLOWRING_LIST_UNLOCK(bus->dhd->flowring_list_lock, list_lock_flags); in dhd_bus_device_tx_stuck_scan()
3144 dhd_bus_device_stuck_scan(dhd_bus_t *bus) in dhd_bus_device_stuck_scan() argument
3150 if (bus->dhd->dongle_trap_occured) { in dhd_bus_device_stuck_scan()
3154 diff = time_stamp - bus->device_tx_stuck_check; in dhd_bus_device_stuck_scan()
3156 dhd_bus_device_tx_stuck_scan(bus); in dhd_bus_device_stuck_scan()
3157 bus->device_tx_stuck_check = OSL_SYSUPTIME(); in dhd_bus_device_stuck_scan()
3170 dhd_bus_t *bus = dhd->bus; in dhd_bus_watchdog() local
3172 if (dhd_query_bus_erros(bus->dhd)) { in dhd_bus_watchdog()
3190 if ((bus->msi_sim) && (++bus->polltick >= bus->pollrate)) { in dhd_bus_watchdog()
3192 bus->polltick = 0; in dhd_bus_watchdog()
3193 val = *(uint32 *)bus->msi_sim_addr; in dhd_bus_watchdog()
3194 *(uint32 *)bus->msi_sim_addr = 0; in dhd_bus_watchdog()
3197 dhdpcie_bus_isr(bus); in dhd_bus_watchdog()
3209 DHD_CHK_BUS_NOT_IN_LPS(bus)) { in dhd_bus_watchdog()
3210 bus->console.count += dhd_watchdog_ms; in dhd_bus_watchdog()
3211 if (bus->console.count >= dhd->dhd_console_ms) { in dhd_bus_watchdog()
3212 bus->console.count -= dhd->dhd_console_ms; in dhd_bus_watchdog()
3214 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_watchdog()
3215 dhd_bus_pcie_pwr_req(bus); in dhd_bus_watchdog()
3220 if (dhdpcie_bus_readconsole(bus) < 0) { in dhd_bus_watchdog()
3226 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_watchdog()
3227 dhd_bus_pcie_pwr_req_clear(bus); in dhd_bus_watchdog()
3233 if (bus->poll) { in dhd_bus_watchdog()
3234 bus->ipend = TRUE; in dhd_bus_watchdog()
3235 bus->dpc_sched = TRUE; in dhd_bus_watchdog()
3236 dhd_sched_dpc(bus->dhd); /* queue DPC now!! */ in dhd_bus_watchdog()
3241 if (dhd->bus->dev_tx_stuck_monitor == TRUE) { in dhd_bus_watchdog()
3242 dhd_bus_device_stuck_scan(bus); in dhd_bus_watchdog()
3251 dhd->bus->inb_dw_deassert_cnt += dhd_watchdog_ms; in dhd_bus_watchdog()
3252 if (dhd->bus->inb_dw_deassert_cnt >= in dhd_bus_watchdog()
3254 dhd->bus->inb_dw_deassert_cnt = 0; in dhd_bus_watchdog()
3267 static int concate_revision_bcm4358(dhd_bus_t *bus, char *fw_path, char *nv_path) in concate_revision_bcm4358() argument
3276 chiprev = dhd_bus_chiprev(bus); in concate_revision_bcm4358()
3320 static int concate_revision_bcm4359(dhd_bus_t *bus, char *fw_path, char *nv_path) in concate_revision_bcm4359() argument
3329 chip_ver = bus->sih->chiprev; in concate_revision_bcm4359()
3375 concate_revision_from_cisinfo(dhd_bus_t *bus, char *fw_path, char *nv_path) in concate_revision_from_cisinfo() argument
3388 info = dhd_find_naming_info(bus->dhd, module_type); in concate_revision_from_cisinfo()
3391 info = dhd_find_naming_info_by_chip_rev(bus->dhd, &is_murata_fem); in concate_revision_from_cisinfo()
3414 int revid = bus->sih->chiprev; in concate_revision_from_cisinfo()
3421 ret = concate_nvram_by_vid(bus, nv_path, chipstr); in concate_revision_from_cisinfo()
3446 concate_revision(dhd_bus_t *bus, char *fw_path, char *nv_path) in concate_revision() argument
3450 if (!bus || !bus->sih) { in concate_revision()
3451 DHD_ERROR(("%s:Bus is Invalid\n", __FUNCTION__)); in concate_revision()
3460 switch (si_chipid(bus->sih)) { in concate_revision()
3464 res = concate_revision_bcm4358(bus, fw_path, nv_path); in concate_revision()
3468 res = concate_revision_bcm4359(bus, fw_path, nv_path); in concate_revision()
3474 res = concate_revision_from_cisinfo(bus, fw_path, nv_path); in concate_revision()
3486 dhd_get_chipid(struct dhd_bus *bus) in dhd_get_chipid() argument
3488 if (bus && bus->sih) { in dhd_get_chipid()
3489 return (uint16)si_chipid(bus->sih); in dhd_get_chipid()
3490 } else if (bus && bus->regs) { in dhd_get_chipid()
3491 chipcregs_t *cc = (chipcregs_t *)bus->regs; in dhd_get_chipid()
3495 dhdpcie_bus_cfg_set_bar0_win(bus, si_enum_base(0)); in dhd_get_chipid()
3497 w = R_REG(bus->osh, &cc->chipid); in dhd_get_chipid()
3514 * If bus->fw_path is empty, or if the download of bus->fw_path failed, firmware contained in header
3520 dhd_bus_download_firmware(struct dhd_bus *bus, osl_t *osh, in dhd_bus_download_firmware() argument
3526 bus->fw_path = pfw_path; in dhd_bus_download_firmware()
3527 bus->nv_path = pnv_path; in dhd_bus_download_firmware()
3528 bus->dhd->clm_path = pclm_path; in dhd_bus_download_firmware()
3529 bus->dhd->conf_path = pconf_path; in dhd_bus_download_firmware()
3532 if (concate_revision(bus, bus->fw_path, bus->nv_path) != 0) { in dhd_bus_download_firmware()
3543 dhd_set_blob_support(bus->dhd, bus->fw_path); in dhd_bus_download_firmware()
3547 __FUNCTION__, bus->fw_path, bus->nv_path)); in dhd_bus_download_firmware()
3549 dhdpcie_dump_resource(bus); in dhd_bus_download_firmware()
3552 ret = dhdpcie_download_firmware(bus, osh); in dhd_bus_download_firmware()
3558 dhd_set_bus_params(struct dhd_bus *bus) in dhd_set_bus_params() argument
3560 struct dhd_conf *conf = bus->dhd->conf; in dhd_set_bus_params()
3563 bus->poll = conf->dhd_poll; in dhd_set_bus_params()
3564 if (!bus->pollrate) in dhd_set_bus_params()
3565 bus->pollrate = 1; in dhd_set_bus_params()
3569 bus->d2h_intr_control = conf->d2h_intr_control; in dhd_set_bus_params()
3571 bus->d2h_intr_method ? "PCIE_MSI" : "PCIE_INTX", bus->d2h_intr_method, in dhd_set_bus_params()
3572 bus->d2h_intr_control ? "HOST_IRQ" : "D2H_INTMASK", bus->d2h_intr_control); in dhd_set_bus_params()
3576 dhd_bus_aspm_enable_rc_ep(bus, aspm); in dhd_set_bus_params()
3580 dhd_bus_l1ss_enable_rc_ep(bus, l1ss); in dhd_set_bus_params()
3585 * Loads firmware given by 'bus->fw_path' into PCIe dongle.
3592 * If bus->fw_path is empty, or if the download of bus->fw_path failed, firmware contained in header
3598 dhdpcie_download_firmware(struct dhd_bus *bus, osl_t *osh) in dhdpcie_download_firmware() argument
3602 uint chipid = bus->sih->chip; in dhdpcie_download_firmware()
3603 uint revid = bus->sih->chiprev; in dhdpcie_download_firmware()
3606 bus->fw_path = fw_path; in dhdpcie_download_firmware()
3607 bus->nv_path = nv_path; in dhdpcie_download_firmware()
3630 snprintf(bus->nv_path, sizeof(nv_path), "%s.nvm", fw_path); in dhdpcie_download_firmware()
3632 snprintf(bus->fw_path, sizeof(fw_path), "%s-firmware.bin", fw_path); in dhdpcie_download_firmware()
3635 DHD_OS_WAKE_LOCK(bus->dhd); in dhdpcie_download_firmware()
3637 dhd_conf_set_path_params(bus->dhd, bus->fw_path, bus->nv_path); in dhdpcie_download_firmware()
3638 dhd_set_bus_params(bus); in dhdpcie_download_firmware()
3640 ret = _dhdpcie_download_firmware(bus); in dhdpcie_download_firmware()
3642 DHD_OS_WAKE_UNLOCK(bus->dhd); in dhdpcie_download_firmware()
3732 dhdpcie_sbtopcie_translation_config(struct dhd_bus *bus, int bp_window, dmaaddr_t addr) in dhdpcie_sbtopcie_translation_config() argument
3763 si_corereg(bus->sih, bus->sih->buscoreidx, trans_reg_offset, ~0, in dhdpcie_sbtopcie_translation_config()
3765 si_corereg(bus->sih, bus->sih->buscoreidx, trans_u_reg_offset, ~0, PHYSADDRHI(addr)); in dhdpcie_sbtopcie_translation_config()
3777 dhdpcie_hybridfw_download(struct dhd_bus *bus, char *fp) in dhdpcie_hybridfw_download() argument
3781 dhd_dma_buf_t *hstfw = &bus->hostfw_buf; in dhdpcie_hybridfw_download()
3815 if ((ptr = MALLOC(bus->dhd->osh, len)) == NULL) { in dhdpcie_hybridfw_download()
3822 MFREE(bus->dhd->osh, ptr, len); in dhdpcie_hybridfw_download()
3832 MFREE(bus->dhd->osh, ptr, len); in dhdpcie_hybridfw_download()
3841 if ((uint32)len > bus->ramsize) { in dhdpcie_hybridfw_download()
3859 DMA_FREE_CONSISTENT(bus->dhd->osh, hstfw->va, in dhdpcie_hybridfw_download()
3867 hstfw->va = DMA_ALLOC_CONSISTENT(bus->dhd->osh, hstfw->len, in dhdpcie_hybridfw_download()
3870 MFREE(bus->dhd->osh, ptr, len); in dhdpcie_hybridfw_download()
3877 MFREE(bus->dhd->osh, ptr, len); in dhdpcie_hybridfw_download()
3883 MFREE(bus->dhd->osh, ptr, len); in dhdpcie_hybridfw_download()
3898 bus->hostfw_base = *(uint32 *)(dnglfw + *(uint32 *)dngltbl); in dhdpcie_hybridfw_download()
3899 bus->hostfw_base &= PCIE_HYBRIDFW_HOSTOFFSET_MASK; in dhdpcie_hybridfw_download()
3902 __FUNCTION__, bus->hostfw_base)); in dhdpcie_hybridfw_download()
3911 MFREE(bus->dhd->osh, ptr, len); in dhdpcie_hybridfw_download()
3953 if (si_setcore(bus->sih, ARMCR4_CORE_ID, 0) || si_setcore(bus->sih, ARMCA7_CORE_ID, 0)) { in dhdpcie_hybridfw_download()
3954 bus->resetinstr = *(((uint32*)dnglfw)); in dhdpcie_hybridfw_download()
3956 offset += bus->dongle_ram_base; in dhdpcie_hybridfw_download()
3959 ret = dhdpcie_bus_membytes(bus, TRUE, offset, (uint8 *)dnglfw, dnglfw_sz); in dhdpcie_hybridfw_download()
3967 bus->bp_base = PCIEDEV_ARM_ADDR(PHYSADDRLO(hstfw->pa), PCIEDEV_TRANS_WIN_HOSTMEM); in dhdpcie_hybridfw_download()
3968 dhdpcie_sbtopcie_translation_config(bus, PCIEDEV_TRANS_WIN_HOSTMEM, hstfw->pa); in dhdpcie_hybridfw_download()
3971 if (((bus->bp_base + hstfw->len) & PCIEDEV_ARM_ADDR_SPACE) < in dhdpcie_hybridfw_download()
3972 (bus->bp_base & PCIEDEV_ARM_ADDR_SPACE)) { in dhdpcie_hybridfw_download()
3985 MFREE(bus->dhd->osh, dnglfw, dnglfw_sz); in dhdpcie_hybridfw_download()
3989 MFREE(bus->dhd->osh, dngltbl, dngltbl_sz); in dhdpcie_hybridfw_download()
3993 MFREE(bus->dhd->osh, hsttbl, hsttbl_sz); in dhdpcie_hybridfw_download()
3997 DMA_FREE_CONSISTENT(bus->dhd->osh, hstfw->va, hstfw->_alloced, in dhdpcie_hybridfw_download()
4008 dhdpcie_download_code_file(struct dhd_bus *bus, char *pfw_path) in dhdpcie_download_code_file() argument
4014 int offset_end = bus->ramsize; in dhdpcie_download_code_file()
4022 if (dhd_bus_get_fw_mode(bus->dhd) == DHD_FLAG_MFG_MODE) { in dhdpcie_download_code_file()
4030 if (dhd_tcm_test_enable && !dhd_bus_tcm_test(bus)) { in dhdpcie_download_code_file()
4039 store_reset = (si_setcore(bus->sih, ARMCR4_CORE_ID, 0) || in dhdpcie_download_code_file()
4040 si_setcore(bus->sih, ARMCA7_CORE_ID, 0)); in dhdpcie_download_code_file()
4042 bcmerror = dhd_os_get_img_fwreq(&fw, bus->fw_path); in dhdpcie_download_code_file()
4049 if (bus->dhd->conf->fwchk) { in dhdpcie_download_code_file()
4050 memptr_tmp = MALLOC(bus->dhd->osh, MEMBLOCK + DHD_SDALIGN); in dhdpcie_download_code_file()
4064 bus->resetinstr = *(((uint32*)fw->data + buf_offset)); in dhdpcie_download_code_file()
4066 offset += bus->dongle_ram_base; in dhdpcie_download_code_file()
4071 bcmerror = dhdpcie_bus_membytes(bus, TRUE, offset, in dhdpcie_download_code_file()
4079 if (bus->dhd->conf->fwchk) { in dhdpcie_download_code_file()
4080 bcmerror = dhdpcie_bus_membytes(bus, FALSE, offset, memptr_tmp, len); in dhdpcie_download_code_file()
4108 MFREE(bus->dhd->osh, memptr_tmp, MEMBLOCK + DHD_SDALIGN); in dhdpcie_download_code_file()
4125 dhdpcie_download_code_file(struct dhd_bus *bus, char *pfw_path) in dhdpcie_download_code_file() argument
4136 int offset_end = bus->ramsize; in dhdpcie_download_code_file()
4146 if (dhd_bus_get_fw_mode(bus->dhd) == DHD_FLAG_MFG_MODE) { in dhdpcie_download_code_file()
4154 if (dhd_tcm_test_enable && !dhd_bus_tcm_test(bus)) { in dhdpcie_download_code_file()
4167 imgbuf = dhd_os_open_image1(bus->dhd, pfw_path); in dhdpcie_download_code_file()
4185 bcmerror = dhdpcie_hybridfw_download(bus, imgbuf); in dhdpcie_download_code_file()
4193 dhd_os_close_image1(bus->dhd, imgbuf); in dhdpcie_download_code_file()
4194 imgbuf = dhd_os_open_image1(bus->dhd, pfw_path); in dhdpcie_download_code_file()
4200 memptr = memblock = MALLOC(bus->dhd->osh, MEMBLOCK + DHD_SDALIGN); in dhdpcie_download_code_file()
4207 if (bus->dhd->conf->fwchk) { in dhdpcie_download_code_file()
4208 memptr_tmp = MALLOC(bus->dhd->osh, MEMBLOCK + DHD_SDALIGN); in dhdpcie_download_code_file()
4220 store_reset = (si_setcore(bus->sih, ARMCR4_CORE_ID, 0) || in dhdpcie_download_code_file()
4221 si_setcore(bus->sih, ARMCA7_CORE_ID, 0)); in dhdpcie_download_code_file()
4223 total_len = bus->ramsize; in dhdpcie_download_code_file()
4227 bcmerror = dhd_get_download_buffer(bus->dhd, pfw_path, FW, &dnld_buf, &total_len); in dhdpcie_download_code_file()
4266 bus->resetinstr = *(((uint32*)memptr)); in dhdpcie_download_code_file()
4268 offset += bus->dongle_ram_base; in dhdpcie_download_code_file()
4273 bcmerror = dhdpcie_bus_membytes(bus, TRUE, offset, (uint8 *)memptr, len); in dhdpcie_download_code_file()
4281 if (bus->dhd->conf->fwchk) { in dhdpcie_download_code_file()
4282 bcmerror = dhdpcie_bus_membytes(bus, FALSE, offset, memptr_tmp, len); in dhdpcie_download_code_file()
4311 MFREE(bus->dhd->osh, memblock, MEMBLOCK + DHD_SDALIGN); in dhdpcie_download_code_file()
4314 MFREE(bus->dhd->osh, memptr_tmp, MEMBLOCK + DHD_SDALIGN); in dhdpcie_download_code_file()
4319 dhd_os_close_image1(bus->dhd, imgbuf); in dhdpcie_download_code_file()
4331 dhdpcie_download_nvram(struct dhd_bus *bus) in dhdpcie_download_nvram() argument
4341 pnv_path = bus->nv_path; in dhdpcie_download_nvram()
4347 dhd_get_download_buffer(bus->dhd, NULL, NVRAM, &memblock, (int *)&len); in dhdpcie_download_nvram()
4354 dhd_get_download_buffer(bus->dhd, pnv_path, NVRAM, &memblock, (int *)&len); in dhdpcie_download_nvram()
4360 else if (bus->nvram_params_len) { in dhdpcie_download_nvram()
4361 memblock = MALLOCZ(bus->dhd->osh, MAX_NVRAMBUF_SIZE); in dhdpcie_download_nvram()
4369 len = bus->nvram_params_len; in dhdpcie_download_nvram()
4371 memcpy(memblock, bus->nvram_params, len); in dhdpcie_download_nvram()
4393 dhd_insert_random_mac_addr(bus->dhd, bufp, &len); in dhdpcie_download_nvram()
4398 if (bus->processed_nvram_params_len) { in dhdpcie_download_nvram()
4399 len = bus->processed_nvram_params_len; in dhdpcie_download_nvram()
4402 if (!bus->processed_nvram_params_len) { in dhdpcie_download_nvram()
4406 bus->processed_nvram_params_len = len; in dhdpcie_download_nvram()
4434 bcmerror = dhdpcie_downloadvars(bus, memblock, len + 1); in dhdpcie_download_nvram()
4444 MFREE(bus->dhd->osh, memblock, MAX_NVRAMBUF_SIZE); in dhdpcie_download_nvram()
4446 dhd_free_download_buffer(bus->dhd, memblock, memblock_len); in dhdpcie_download_nvram()
4508 struct dhd_bus *bus, unsigned char **p_dlarray, in select_fd_image() argument
4524 if ((chipid == bus->sih->chip) && (chiprev == bus->sih->chiprev) && in select_fd_image()
4525 (chippkg_opt == bus->sih->chippkg)) { in select_fd_image()
4544 __FUNCTION__, bus->sih->chip, bus->sih->chiprev, bus->sih->chippkg)); in select_fd_image()
4551 dhdpcie_download_code_array(struct dhd_bus *bus) in dhdpcie_download_code_array() argument
4576 select_fd_image(bus, &p_dlarray, &p_dlimagename, &p_dlimagever, in dhdpcie_download_code_array()
4582 if ((p_dlarray == 0) || (dlarray_size == 0) ||(dlarray_size > bus->ramsize) || in dhdpcie_download_code_array()
4587 memptr = memblock = MALLOC(bus->dhd->osh, MEMBLOCK + DHD_SDALIGN); in dhdpcie_download_code_array()
4604 if (si_setcore(bus->sih, ARMCR4_CORE_ID, 0) || in dhdpcie_download_code_array()
4605 si_setcore(bus->sih, SYSMEM_CORE_ID, 0)) { in dhdpcie_download_code_array()
4608 bus->resetinstr = *(((uint32*)memptr)); in dhdpcie_download_code_array()
4610 offset += bus->dongle_ram_base; in dhdpcie_download_code_array()
4613 bcmerror = dhdpcie_bus_membytes(bus, TRUE, offset, (uint8 *)memptr, len); in dhdpcie_download_code_array()
4630 ularray = MALLOC(bus->dhd->osh, dlarray_size); in dhdpcie_download_code_array()
4634 offset = bus->dongle_ram_base; in dhdpcie_download_code_array()
4642 bcmerror = dhdpcie_bus_membytes(bus, FALSE, offset, in dhdpcie_download_code_array()
4672 MFREE(bus->dhd->osh, ularray, dlarray_size); in dhdpcie_download_code_array()
4678 MFREE(bus->dhd->osh, memblock, MEMBLOCK + DHD_SDALIGN); in dhdpcie_download_code_array()
4686 _dhdpcie_get_nvram_params(struct dhd_bus *bus) in _dhdpcie_get_nvram_params() argument
4694 bus->nvram_params = MALLOC(bus->dhd->osh, nvram_len); in _dhdpcie_get_nvram_params()
4695 if (!bus->nvram_params) { in _dhdpcie_get_nvram_params()
4700 bus->nvram_params[0] = 0; in _dhdpcie_get_nvram_params()
4701 ptr = bus->nvram_params; in _dhdpcie_get_nvram_params()
4713 snprintf(ptr, tmp_nvram_len, "wlunit=%d", dhd_get_instance(bus->dhd)); in _dhdpcie_get_nvram_params()
4717 if ((boardrev_str = si_getdevpathvar(bus->sih, "boardrev")) == NULL) in _dhdpcie_get_nvram_params()
4727 if ((boardtype_str = si_getdevpathvar(bus->sih, "boardtype")) == NULL) { in _dhdpcie_get_nvram_params()
4739 if (dbushost_initvars_flash(bus->sih, in _dhdpcie_get_nvram_params()
4740 bus->osh, &ptr, in _dhdpcie_get_nvram_params()
4745 tmp_nvram_len = (int)(ptr - bus->nvram_params); in _dhdpcie_get_nvram_params()
4749 bus->nvram_params_len = tmp_nvram_len; in _dhdpcie_get_nvram_params()
4754 _dhdpcie_free_nvram_params(struct dhd_bus *bus) in _dhdpcie_free_nvram_params() argument
4756 if (bus->nvram_params) { in _dhdpcie_free_nvram_params()
4757 MFREE(bus->dhd->osh, bus->nvram_params, MAX_NVRAMBUF_SIZE); in _dhdpcie_free_nvram_params()
4763 dhdpcie_handle_dongle_trap(struct dhd_bus *bus) in dhdpcie_handle_dongle_trap() argument
4767 /* Call the bus module watchdog */ in dhdpcie_handle_dongle_trap()
4768 dhd_bus_watchdog(bus->dhd); in dhdpcie_handle_dongle_trap()
4773 failed_if = dhd_ifname(bus->dhd, 0); in dhdpcie_handle_dongle_trap()
4774 dhd_schedule_trap_log_dump(bus->dhd, (uint8 *)failed_if, strlen(failed_if)); in dhdpcie_handle_dongle_trap()
4780 * Downloads firmware file given by 'bus->fw_path' into PCIe dongle
4783 * If bus->fw_path is empty, or if the download of bus->fw_path failed, firmware contained in header
4788 _dhdpcie_download_firmware(struct dhd_bus *bus) in _dhdpcie_download_firmware() argument
4796 if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0')) { in _dhdpcie_download_firmware()
4805 if (_dhdpcie_get_nvram_params(bus) < 0) { in _dhdpcie_download_firmware()
4811 if (dhdpcie_bus_download_state(bus, TRUE)) { in _dhdpcie_download_firmware()
4817 if ((bus->fw_path != NULL) && (bus->fw_path[0] != '\0')) { in _dhdpcie_download_firmware()
4818 if (dhdpcie_download_code_file(bus, bus->fw_path)) { in _dhdpcie_download_firmware()
4834 if (dhdpcie_download_code_array(bus)) { in _dhdpcie_download_firmware()
4851 /* dhd_bus_set_nvram_params(bus, (char *)&nvram_array); */ in _dhdpcie_download_firmware()
4854 if (dhdpcie_download_nvram(bus)) { in _dhdpcie_download_firmware()
4860 if (dhdpcie_bus_download_state(bus, FALSE)) { in _dhdpcie_download_firmware()
4869 _dhdpcie_free_nvram_params(bus); in _dhdpcie_download_firmware()
4875 dhdpcie_bus_readconsole(dhd_bus_t *bus) in dhdpcie_bus_readconsole() argument
4877 dhd_console_t *c = &bus->console; in dhdpcie_bus_readconsole()
4885 if (bus->console_addr == 0) in dhdpcie_bus_readconsole()
4889 addr = bus->console_addr + OFFSETOF(hnd_cons_t, log); in dhdpcie_bus_readconsole()
4891 if ((rv = dhdpcie_bus_membytes(bus, FALSE, addr, (uint8 *)&c->log, sizeof(c->log))) < 0) in dhdpcie_bus_readconsole()
4897 if ((c->buf = MALLOC(bus->dhd->osh, c->bufsize)) == NULL) in dhdpcie_bus_readconsole()
4925 if ((rv = dhdpcie_bus_membytes(bus, FALSE, in dhdpcie_bus_readconsole()
4931 if ((rv = dhdpcie_bus_membytes(bus, FALSE, in dhdpcie_bus_readconsole()
4941 if ((rv = dhdpcie_bus_membytes(bus, FALSE, in dhdpcie_bus_readconsole()
4973 dhd_bus_dump_console_buffer(dhd_bus_t *bus) in dhd_bus_dump_console_buffer() argument
4984 if (bus->is_linkdown) { in dhd_bus_dump_console_buffer()
4989 addr = bus->pcie_sh->console_addr + OFFSETOF(hnd_cons_t, log); in dhd_bus_dump_console_buffer()
4990 if ((rv = dhdpcie_bus_membytes(bus, FALSE, addr, in dhd_bus_dump_console_buffer()
4995 addr = bus->pcie_sh->console_addr + OFFSETOF(hnd_cons_t, log.buf_size); in dhd_bus_dump_console_buffer()
4996 if ((rv = dhdpcie_bus_membytes(bus, FALSE, addr, in dhd_bus_dump_console_buffer()
5001 addr = bus->pcie_sh->console_addr + OFFSETOF(hnd_cons_t, log.idx); in dhd_bus_dump_console_buffer()
5002 if ((rv = dhdpcie_bus_membytes(bus, FALSE, addr, in dhd_bus_dump_console_buffer()
5012 !(console_buffer = MALLOC(bus->dhd->osh, console_size))) { in dhd_bus_dump_console_buffer()
5016 if ((rv = dhdpcie_bus_membytes(bus, FALSE, console_ptr, in dhd_bus_dump_console_buffer()
5044 MFREE(bus->dhd->osh, console_buffer, console_size); in dhd_bus_dump_console_buffer()
5049 dhdpcie_schedule_log_dump(dhd_bus_t *bus) in dhdpcie_schedule_log_dump() argument
5055 flush_type = MALLOCZ(bus->dhd->osh, sizeof(log_dump_type_t)); in dhdpcie_schedule_log_dump()
5058 dhd_schedule_log_dump(bus->dhd, flush_type); in dhdpcie_schedule_log_dump()
5066 * Opens the file given by bus->fw_path, reads part of the file into a buffer and closes the file.
5071 dhdpcie_checkdied(dhd_bus_t *bus, char *data, uint size) in dhdpcie_checkdied() argument
5078 pciedev_shared_t *local_pciedev_shared = bus->pcie_sh; in dhdpcie_checkdied()
5095 mbuffer = data = MALLOC(bus->dhd->osh, msize); in dhdpcie_checkdied()
5104 if ((str = MALLOC(bus->dhd->osh, maxstrlen)) == NULL) { in dhdpcie_checkdied()
5109 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_checkdied()
5110 DHD_BUS_BUSY_SET_IN_CHECKDIED(bus->dhd); in dhdpcie_checkdied()
5111 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_checkdied()
5113 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_checkdied()
5114 dhd_bus_pcie_pwr_req(bus); in dhdpcie_checkdied()
5116 if ((bcmerror = dhdpcie_readshared(bus)) < 0) { in dhdpcie_checkdied()
5132 if ((bus->pcie_sh->flags & (PCIE_SHARED_ASSERT|PCIE_SHARED_TRAP)) == 0) { in dhdpcie_checkdied()
5137 (bus->pcie_sh->flags & PCIE_SHARED_ASSERT_BUILT) in dhdpcie_checkdied()
5140 if (bus->pcie_sh->flags & PCIE_SHARED_ASSERT) { in dhdpcie_checkdied()
5143 if (bus->pcie_sh->assert_exp_addr != 0) { in dhdpcie_checkdied()
5145 if ((bcmerror = dhdpcie_bus_membytes(bus, FALSE, in dhdpcie_checkdied()
5146 bus->pcie_sh->assert_exp_addr, in dhdpcie_checkdied()
5155 if (bus->pcie_sh->assert_file_addr != 0) { in dhdpcie_checkdied()
5157 if ((bcmerror = dhdpcie_bus_membytes(bus, FALSE, in dhdpcie_checkdied()
5158 bus->pcie_sh->assert_file_addr, in dhdpcie_checkdied()
5167 bcm_bprintf(&strbuf, " line %d ", bus->pcie_sh->assert_line); in dhdpcie_checkdied()
5170 if (bus->pcie_sh->flags & PCIE_SHARED_TRAP) { in dhdpcie_checkdied()
5171 trap_t *tr = &bus->dhd->last_trap_info; in dhdpcie_checkdied()
5173 if ((bcmerror = dhdpcie_bus_membytes(bus, FALSE, in dhdpcie_checkdied()
5174 bus->pcie_sh->trap_addr, (uint8*)tr, sizeof(trap_t))) < 0) { in dhdpcie_checkdied()
5175 bus->dhd->dongle_trap_occured = TRUE; in dhdpcie_checkdied()
5178 dhd_bus_dump_trap_info(bus, &strbuf); in dhdpcie_checkdied()
5182 if (bus->pcie_sh->flags & (PCIE_SHARED_ASSERT | PCIE_SHARED_TRAP)) { in dhdpcie_checkdied()
5188 if (dhd_stop_scan_timer(bus->dhd, FALSE, 0)) { in dhdpcie_checkdied()
5192 if (dhd_stop_bus_timer(bus->dhd)) { in dhdpcie_checkdied()
5196 if (dhd_stop_cmd_timer(bus->dhd)) { in dhdpcie_checkdied()
5200 if (dhd_stop_join_timer(bus->dhd)) { in dhdpcie_checkdied()
5207 dhd_wakeup_ioctl_event(bus->dhd, IOCTL_RETURN_ON_TRAP); in dhdpcie_checkdied()
5209 dhd_bus_dump_console_buffer(bus); in dhdpcie_checkdied()
5210 dhd_prot_debug_info_print(bus->dhd); in dhdpcie_checkdied()
5214 if (bus->dhd->memdump_enabled) { in dhdpcie_checkdied()
5217 bus->dhd->collect_sssr = TRUE; in dhdpcie_checkdied()
5221 bus->dhd->collect_sdtc = TRUE; in dhdpcie_checkdied()
5223 bus->dhd->memdump_type = DUMP_TYPE_DONGLE_TRAP; in dhdpcie_checkdied()
5224 dhdpcie_mem_dump(bus); in dhdpcie_checkdied()
5232 bus->dhd->dongle_trap_occured = TRUE; in dhdpcie_checkdied()
5233 if (bus->dhd->check_trap_rot && in dhdpcie_checkdied()
5234 bus->dhd->ext_trap_data_supported && in dhdpcie_checkdied()
5235 bus->pcie_sh->flags2 & PCIE_SHARED2_ETD_ADDR_SUPPORT) { in dhdpcie_checkdied()
5236 uint32 trap_data = *(uint32 *)bus->dhd->extended_trap_data; in dhdpcie_checkdied()
5239 uint32 *ext_data = bus->dhd->extended_trap_data; in dhdpcie_checkdied()
5243 if (dhdpcie_bus_membytes(bus, FALSE, in dhdpcie_checkdied()
5258 copy_hang_info_trap(bus->dhd); in dhdpcie_checkdied()
5261 dhd_schedule_reset(bus->dhd); in dhdpcie_checkdied()
5267 dhd_bus_check_died(bus); in dhdpcie_checkdied()
5278 bus->dhd->dongle_trap_occured = TRUE; in dhdpcie_checkdied()
5279 dhdpcie_schedule_log_dump(bus); in dhdpcie_checkdied()
5281 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_checkdied()
5282 dhd_bus_pcie_pwr_req_clear(bus); in dhdpcie_checkdied()
5285 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_checkdied()
5286 DHD_BUS_BUSY_CLEAR_IN_CHECKDIED(bus->dhd); in dhdpcie_checkdied()
5287 dhd_os_busbusy_wake(bus->dhd); in dhdpcie_checkdied()
5288 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_checkdied()
5291 MFREE(bus->dhd->osh, mbuffer, msize); in dhdpcie_checkdied()
5293 MFREE(bus->dhd->osh, str, maxstrlen); in dhdpcie_checkdied()
5299 void dhdpcie_mem_dump_bugcheck(dhd_bus_t *bus, uint8 *buf) in dhdpcie_mem_dump_bugcheck() argument
5307 if (bus == NULL) { in dhdpcie_mem_dump_bugcheck()
5311 start = bus->dongle_ram_base; in dhdpcie_mem_dump_bugcheck()
5313 /* check for dead bus */ in dhdpcie_mem_dump_bugcheck()
5316 ret = dhdpcie_bus_membytes(bus, FALSE, start, (uint8*)&test_word, read_size); in dhdpcie_mem_dump_bugcheck()
5317 /* if read error or bus timeout */ in dhdpcie_mem_dump_bugcheck()
5324 size = bus->ramsize; in dhdpcie_mem_dump_bugcheck()
5329 if ((ret = dhdpcie_bus_membytes(bus, FALSE, start, databuf, read_size))) { in dhdpcie_mem_dump_bugcheck()
5338 bus->dhd->soc_ram = buf; in dhdpcie_mem_dump_bugcheck()
5339 bus->dhd->soc_ram_length = bus->ramsize; in dhdpcie_mem_dump_bugcheck()
5345 dhdpcie_get_mem_dump(dhd_bus_t *bus) in dhdpcie_get_mem_dump() argument
5356 if (!bus) { in dhdpcie_get_mem_dump()
5357 DHD_ERROR(("%s: bus is NULL\n", __FUNCTION__)); in dhdpcie_get_mem_dump()
5361 if (!bus->dhd) { in dhdpcie_get_mem_dump()
5366 size = bus->ramsize; /* Full mem size */ in dhdpcie_get_mem_dump()
5367 start = bus->dongle_ram_base; /* Start address */ in dhdpcie_get_mem_dump()
5370 p_buf = dhd_get_fwdump_buf(bus->dhd, size); in dhdpcie_get_mem_dump()
5384 /* Hold BUS_LP_STATE_LOCK to avoid simultaneous bus access */ in dhdpcie_get_mem_dump()
5385 DHD_BUS_LP_STATE_LOCK(bus->bus_lp_state_lock, flags_bus); in dhdpcie_get_mem_dump()
5387 ret = dhdpcie_bus_membytes(bus, FALSE, start, databuf, read_size); in dhdpcie_get_mem_dump()
5389 DHD_BUS_LP_STATE_UNLOCK(bus->bus_lp_state_lock, flags_bus); in dhdpcie_get_mem_dump()
5394 bus->dhd->memdump_success = FALSE; in dhdpcie_get_mem_dump()
5409 dhdpcie_mem_dump(dhd_bus_t *bus) in dhdpcie_mem_dump() argument
5415 dhdp = bus->dhd; in dhdpcie_mem_dump()
5432 if (bus->is_linkdown) { in dhdpcie_mem_dump()
5435 ASSERT(bus->dhd->memdump_enabled != DUMP_MEMFILE_BUGON); in dhdpcie_mem_dump()
5442 DHD_ERROR(("%s: bus is down! can't collect mem dump. \n", __FUNCTION__)); in dhdpcie_mem_dump()
5473 dhdpcie_fw_trap(dhdp->bus); in dhdpcie_mem_dump()
5485 if (pm_runtime_get_sync(dhd_bus_to_dev(bus)) < 0) in dhdpcie_mem_dump()
5489 ret = dhdpcie_get_mem_dump(bus); in dhdpcie_mem_dump()
5496 bus->dhd->memdump_success = TRUE; in dhdpcie_mem_dump()
5509 pm_runtime_mark_last_busy(dhd_bus_to_dev(bus)); in dhdpcie_mem_dump()
5510 pm_runtime_put_autosuspend(dhd_bus_to_dev(bus)); in dhdpcie_mem_dump()
5530 return dhdpcie_get_mem_dump(dhdp->bus); in dhd_bus_get_mem_dump()
5536 dhd_bus_t *bus = dhdp->bus; in dhd_bus_mem_dump() local
5540 DHD_ERROR(("%s bus is down\n", __FUNCTION__)); in dhd_bus_mem_dump()
5551 DHD_ERROR(("%s: bus is in suspend(%d) or suspending(0x%x) state, so skip\n", in dhd_bus_mem_dump()
5557 ret = dhdpcie_mem_dump(bus); in dhd_bus_mem_dump()
5564 dhd_socram_dump(dhd_bus_t *bus) in dhd_socram_dump() argument
5567 DHD_OS_WAKE_LOCK(bus->dhd); in dhd_socram_dump()
5568 dhd_bus_mem_dump(bus->dhd); in dhd_socram_dump()
5569 DHD_OS_WAKE_UNLOCK(bus->dhd); in dhd_socram_dump()
5581 dhdpcie_bus_membytes(dhd_bus_t *bus, bool write, ulong address, uint8 *data, uint size) in dhdpcie_bus_membytes() argument
5587 if (write && bus->is_linkdown) { in dhdpcie_bus_membytes()
5592 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_bus_membytes()
5593 dhd_bus_pcie_pwr_req(bus); in dhdpcie_bus_membytes()
5617 dhdpcie_bus_wtcm64(bus, address, *((uint64 *)data)); in dhdpcie_bus_membytes()
5621 dhdpcie_bus_wtcm32(bus, address, *((uint32*)data)); in dhdpcie_bus_membytes()
5626 dhdpcie_bus_wtcm8(bus, address, *data); in dhdpcie_bus_membytes()
5640 *(uint64 *)data = dhdpcie_bus_rtcm64(bus, address); in dhdpcie_bus_membytes()
5645 *(uint32 *)data = dhdpcie_bus_rtcm32(bus, address); in dhdpcie_bus_membytes()
5650 *data = dhdpcie_bus_rtcm8(bus, address); in dhdpcie_bus_membytes()
5660 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_bus_membytes()
5661 dhd_bus_pcie_pwr_req_clear(bus); in dhdpcie_bus_membytes()
5672 BCMFASTPATH(dhd_bus_schedule_queue)(struct dhd_bus *bus, uint16 flow_id, bool txs) in BCMFASTPATH()
5678 dhd_pub_t *dhdp = bus->dhd; in BCMFASTPATH()
5684 if (flow_id >= bus->max_submission_rings) { in BCMFASTPATH()
5686 flow_id, bus->max_submission_rings)); in BCMFASTPATH()
5690 flow_ring_node = DHD_FLOW_RING(bus->dhd, flow_id); in BCMFASTPATH()
5723 while ((txp = dhd_flow_queue_dequeue(bus->dhd, queue)) != NULL) { in BCMFASTPATH()
5724 if (bus->dhd->conf->orphan_move <= 1) in BCMFASTPATH()
5725 PKTORPHAN(txp, bus->dhd->conf->tsq); in BCMFASTPATH()
5735 if (PKTLEN(bus->dhd->osh, txp) < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { in BCMFASTPATH()
5736 PKTSETLEN(bus->dhd->osh, txp, (ETHER_MIN_LEN - ETHER_CRC_LEN)); in BCMFASTPATH()
5741 if (bus->dhd->tcpack_sup_mode != TCPACK_SUP_HOLD) { in BCMFASTPATH()
5742 ret = dhd_tcpack_check_xmit(bus->dhd, txp); in BCMFASTPATH()
5753 if ((bus->dhd->conf->data_drop_mode == TXPKT_DROP) && (pktlen > 500)) in BCMFASTPATH()
5757 ret = dhd_prot_txdata(bus->dhd, txp, flow_ring_node->flow_info.ifindex); in BCMFASTPATH()
5762 dhd_prot_schedule_aggregate_h2d_db(bus->dhd, flow_id); in BCMFASTPATH()
5766 dhd_prot_txdata_write_flush(bus->dhd, flow_id); in BCMFASTPATH()
5769 dhd_flow_queue_reinsert(bus->dhd, queue, txp); in BCMFASTPATH()
5777 DHD_MEM_STATS_LOCK(bus->dhd->mem_stats_lock, flags); in BCMFASTPATH()
5778 bus->dhd->txpath_mem += PKTLEN(bus->dhd->osh, txp); in BCMFASTPATH()
5780 __FUNCTION__, bus->dhd->txpath_mem, PKTLEN(bus->dhd->osh, txp))); in BCMFASTPATH()
5781 DHD_MEM_STATS_UNLOCK(bus->dhd->mem_stats_lock, flags); in BCMFASTPATH()
5791 dhd_prot_schedule_aggregate_h2d_db(bus->dhd, flow_id); in BCMFASTPATH()
5795 dhd_prot_txdata_write_flush(bus->dhd, flow_id); in BCMFASTPATH()
5807 BCMFASTPATH(dhd_bus_txdata)(struct dhd_bus *bus, void *txp, uint8 ifidx) in BCMFASTPATH()
5822 uint8 *pktdata = (uint8 *)PKTDATA(bus->dhd->osh, txp); in BCMFASTPATH()
5824 if (!bus->dhd->flowid_allocator) { in BCMFASTPATH()
5831 flow_ring_node = DHD_FLOW_RING(bus->dhd, flowid); in BCMFASTPATH()
5837 if ((flowid > bus->dhd->max_tx_flowid) || in BCMFASTPATH()
5862 if (bus->enable_idle_flowring_mgmt) { in BCMFASTPATH()
5864 dhd_flow_ring_move_to_active_list_head(bus, flow_ring_node); in BCMFASTPATH()
5871 dhd_bus_flow_ring_resume_request(bus, in BCMFASTPATH()
5904 if ((ret = dhd_flow_queue_enqueue(bus->dhd, queue, txp)) != BCME_OK) { in BCMFASTPATH()
5911 if (dhd_match_pkt_type(bus->dhd, pktdata, (uint32)PKTLEN(bus->dhd->osh, txp))) { in BCMFASTPATH()
5912 if ((ret = dhd_flow_queue_enqueue_head(bus->dhd, queue, txp)) != BCME_OK) in BCMFASTPATH()
5915 if ((ret = dhd_flow_queue_enqueue(bus->dhd, queue, txp)) != BCME_OK) in BCMFASTPATH()
5931 ret = dhd_bus_schedule_queue(bus, flowid, FALSE); /* from queue to flowring */ in BCMFASTPATH()
5943 if ((ret = dhd_flow_queue_enqueue(bus->dhd, queue, txp_pend)) in BCMFASTPATH()
5952 if (dhd_match_pkt_type(bus->dhd, pktdata, (uint32)PKTLEN(bus->dhd->osh, txp))) { in BCMFASTPATH()
5953 if ((ret = dhd_flow_queue_enqueue_head(bus->dhd, queue, txp_pend)) != BCME_OK) { in BCMFASTPATH()
5959 if ((ret = dhd_flow_queue_enqueue(bus->dhd, queue, txp_pend)) != BCME_OK) { in BCMFASTPATH()
5977 PKTCFREE(bus->dhd->osh, txp, FALSE); in BCMFASTPATH()
5979 PKTCFREE(bus->dhd->osh, txp, TRUE); in BCMFASTPATH()
5985 dhd_bus_stop_queue(struct dhd_bus *bus) in dhd_bus_stop_queue() argument
5987 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, ON); in dhd_bus_stop_queue()
5991 dhd_bus_start_queue(struct dhd_bus *bus) in dhd_bus_start_queue() argument
5995 * bus is not in a state to turn on. in dhd_bus_start_queue()
6001 if (dhd_prot_check_tx_resource(bus->dhd)) { in dhd_bus_start_queue()
6006 dhd_txflowcontrol(bus->dhd, ALL_INTERFACES, OFF); in dhd_bus_start_queue()
6012 dhd_bus_t *bus = dhd->bus; in dhd_bus_console_in() local
6020 if (bus->console_addr == 0) in dhd_bus_console_in()
6024 if (bus->dhd->dongle_reset) { in dhd_bus_console_in()
6029 addr = bus->console_addr + OFFSETOF(hnd_cons_t, cbuf_idx); in dhd_bus_console_in()
6035 if ((rv = dhdpcie_bus_membytes(bus, TRUE, addr, (uint8 *)&val, sizeof(val))) < 0) in dhd_bus_console_in()
6039 addr = bus->console_addr + OFFSETOF(hnd_cons_t, cbuf); in dhd_bus_console_in()
6044 if ((rv = dhdpcie_bus_membytes(bus, TRUE, addr, (uint8 *)msg, msglen)) < 0) in dhd_bus_console_in()
6048 addr = bus->console_addr + OFFSETOF(hnd_cons_t, vcons_in); in dhd_bus_console_in()
6050 if ((rv = dhdpcie_bus_membytes(bus, TRUE, addr, (uint8 *)&val, sizeof(val))) < 0) in dhd_bus_console_in()
6057 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhd_bus_console_in()
6061 dhdpcie_send_mb_data(bus, H2D_HOST_CONS_INT); in dhd_bus_console_in()
6064 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_console_in()
6075 BCMFASTPATH(dhd_bus_rx_frame)(struct dhd_bus *bus, void* pkt, int ifidx, uint pkt_count) in BCMFASTPATH()
6077 dhd_rx_frame(bus->dhd, ifidx, pkt, pkt_count, 0); in BCMFASTPATH()
6081 #define DHD_BUS_BAR1_SWITCH_LOCK(bus, flags) \ argument
6082 ((bus)->bar1_switch_enab) ? DHD_BAR1_SWITCH_LOCK((bus)->bar1_switch_lock, flags) : \
6085 #define DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags) \ argument
6086 ((bus)->bar1_switch_enab) ? DHD_BAR1_SWITCH_UNLOCK((bus)->bar1_switch_lock, flags) : \
6091 dhd_init_bar1_switch_lock(dhd_bus_t *bus) in dhd_init_bar1_switch_lock() argument
6093 if (bus->bar1_switch_enab && !bus->bar1_switch_lock) { in dhd_init_bar1_switch_lock()
6094 bus->bar1_switch_lock = osl_spin_lock_init(bus->osh); in dhd_init_bar1_switch_lock()
6099 dhd_deinit_bar1_switch_lock(dhd_bus_t *bus) in dhd_deinit_bar1_switch_lock() argument
6101 if (bus->bar1_switch_enab && bus->bar1_switch_lock) { in dhd_deinit_bar1_switch_lock()
6102 osl_spin_lock_deinit(bus->osh, bus->bar1_switch_lock); in dhd_deinit_bar1_switch_lock()
6103 bus->bar1_switch_lock = NULL; in dhd_deinit_bar1_switch_lock()
6122 * bus->bar1_switch_enab accordingly
6123 * @bus: dhd bus context
6127 dhdpcie_bar1_window_switch_enab(dhd_bus_t *bus) in dhdpcie_bar1_window_switch_enab() argument
6129 uint32 ramstart = bus->dongle_ram_base; in dhdpcie_bar1_window_switch_enab()
6130 uint32 ramend = bus->dongle_ram_base + bus->ramsize - 1; in dhdpcie_bar1_window_switch_enab()
6131 uint32 bpwinstart = DHD_BUS_BAR1_BPWIN(ramstart, bus->bar1_size); in dhdpcie_bar1_window_switch_enab()
6132 uint32 bpwinend = DHD_BUS_BAR1_BPWIN(ramend, bus->bar1_size); in dhdpcie_bar1_window_switch_enab()
6134 bus->bar1_switch_enab = FALSE; in dhdpcie_bar1_window_switch_enab()
6141 bus->bar1_switch_enab = TRUE; in dhdpcie_bar1_window_switch_enab()
6145 __FUNCTION__, bus->bar1_switch_enab, ramstart, ramend, bus->bar1_size)); in dhdpcie_bar1_window_switch_enab()
6154 * @bus: dhd bus context
6158 dhdpcie_setbar1win(dhd_bus_t *bus, uint32 addr) in dhdpcie_setbar1win() argument
6160 OSL_PCI_WRITE_CONFIG(bus->osh, PCI_BAR1_WIN, 4, addr); in dhdpcie_setbar1win()
6161 bus->curr_bar1_win = addr; in dhdpcie_setbar1win()
6170 * @bus: dhd bus context
6176 dhdpcie_bus_chkandshift_bpoffset(dhd_bus_t *bus, ulong offset) in dhdpcie_bus_chkandshift_bpoffset() argument
6185 if (!bus->bar1_switch_enab) { in dhdpcie_bus_chkandshift_bpoffset()
6192 bpwin = DHD_BUS_BAR1_BPWIN(offset, bus->bar1_size); in dhdpcie_bus_chkandshift_bpoffset()
6194 if (bpwin != bus->curr_bar1_win) { in dhdpcie_bus_chkandshift_bpoffset()
6196 __FUNCTION__, bus->curr_bar1_win, bpwin, offset)); in dhdpcie_bus_chkandshift_bpoffset()
6198 dhdpcie_setbar1win(bus, bpwin); in dhdpcie_bus_chkandshift_bpoffset()
6206 dhdpcie_bus_wtcm8(dhd_bus_t *bus, ulong offset, uint8 data) in dhdpcie_bus_wtcm8() argument
6210 if (bus->is_linkdown) { in dhdpcie_bus_wtcm8()
6215 DHD_BUS_BAR1_SWITCH_LOCK(bus, flags); in dhdpcie_bus_wtcm8()
6217 offset = dhdpcie_bus_chkandshift_bpoffset(bus, offset); in dhdpcie_bus_wtcm8()
6220 W_REG(bus->dhd->osh, (volatile uint8 *)(bus->tcm + offset), data); in dhdpcie_bus_wtcm8()
6222 *(volatile uint8 *)(bus->tcm + offset) = (uint8)data; in dhdpcie_bus_wtcm8()
6225 DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags); in dhdpcie_bus_wtcm8()
6229 dhdpcie_bus_wtcm16(dhd_bus_t *bus, ulong offset, uint16 data) in dhdpcie_bus_wtcm16() argument
6233 if (bus->is_linkdown) { in dhdpcie_bus_wtcm16()
6238 DHD_BUS_BAR1_SWITCH_LOCK(bus, flags); in dhdpcie_bus_wtcm16()
6240 offset = dhdpcie_bus_chkandshift_bpoffset(bus, offset); in dhdpcie_bus_wtcm16()
6243 W_REG(bus->dhd->osh, (volatile uint16 *)(bus->tcm + offset), data); in dhdpcie_bus_wtcm16()
6245 *(volatile uint16 *)(bus->tcm + offset) = (uint16)data; in dhdpcie_bus_wtcm16()
6248 DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags); in dhdpcie_bus_wtcm16()
6252 dhdpcie_bus_wtcm32(dhd_bus_t *bus, ulong offset, uint32 data) in dhdpcie_bus_wtcm32() argument
6256 if (bus->is_linkdown) { in dhdpcie_bus_wtcm32()
6261 DHD_BUS_BAR1_SWITCH_LOCK(bus, flags); in dhdpcie_bus_wtcm32()
6263 offset = dhdpcie_bus_chkandshift_bpoffset(bus, offset); in dhdpcie_bus_wtcm32()
6266 W_REG(bus->dhd->osh, (volatile uint32 *)(bus->tcm + offset), data); in dhdpcie_bus_wtcm32()
6268 *(volatile uint32 *)(bus->tcm + offset) = (uint32)data; in dhdpcie_bus_wtcm32()
6271 DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags); in dhdpcie_bus_wtcm32()
6276 dhdpcie_bus_wtcm64(dhd_bus_t *bus, ulong offset, uint64 data) in dhdpcie_bus_wtcm64() argument
6280 if (bus->is_linkdown) { in dhdpcie_bus_wtcm64()
6285 DHD_BUS_BAR1_SWITCH_LOCK(bus, flags); in dhdpcie_bus_wtcm64()
6287 offset = dhdpcie_bus_chkandshift_bpoffset(bus, offset); in dhdpcie_bus_wtcm64()
6290 W_REG(bus->dhd->osh, (volatile uint64 *)(bus->tcm + offset), data); in dhdpcie_bus_wtcm64()
6292 *(volatile uint64 *)(bus->tcm + offset) = (uint64)data; in dhdpcie_bus_wtcm64()
6295 DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags); in dhdpcie_bus_wtcm64()
6300 dhdpcie_bus_rtcm8(dhd_bus_t *bus, ulong offset) in dhdpcie_bus_rtcm8() argument
6305 if (bus->is_linkdown) { in dhdpcie_bus_rtcm8()
6311 DHD_BUS_BAR1_SWITCH_LOCK(bus, flags); in dhdpcie_bus_rtcm8()
6313 offset = dhdpcie_bus_chkandshift_bpoffset(bus, offset); in dhdpcie_bus_rtcm8()
6316 data = R_REG(bus->dhd->osh, (volatile uint8 *)(bus->tcm + offset)); in dhdpcie_bus_rtcm8()
6318 data = *(volatile uint8 *)(bus->tcm + offset); in dhdpcie_bus_rtcm8()
6321 DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags); in dhdpcie_bus_rtcm8()
6326 dhdpcie_bus_rtcm16(dhd_bus_t *bus, ulong offset) in dhdpcie_bus_rtcm16() argument
6331 if (bus->is_linkdown) { in dhdpcie_bus_rtcm16()
6337 DHD_BUS_BAR1_SWITCH_LOCK(bus, flags); in dhdpcie_bus_rtcm16()
6339 offset = dhdpcie_bus_chkandshift_bpoffset(bus, offset); in dhdpcie_bus_rtcm16()
6342 data = R_REG(bus->dhd->osh, (volatile uint16 *)(bus->tcm + offset)); in dhdpcie_bus_rtcm16()
6344 data = *(volatile uint16 *)(bus->tcm + offset); in dhdpcie_bus_rtcm16()
6347 DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags); in dhdpcie_bus_rtcm16()
6352 dhdpcie_bus_rtcm32(dhd_bus_t *bus, ulong offset) in dhdpcie_bus_rtcm32() argument
6357 if (bus->is_linkdown) { in dhdpcie_bus_rtcm32()
6363 DHD_BUS_BAR1_SWITCH_LOCK(bus, flags); in dhdpcie_bus_rtcm32()
6365 offset = dhdpcie_bus_chkandshift_bpoffset(bus, offset); in dhdpcie_bus_rtcm32()
6368 data = R_REG(bus->dhd->osh, (volatile uint32 *)(bus->tcm + offset)); in dhdpcie_bus_rtcm32()
6370 data = *(volatile uint32 *)(bus->tcm + offset); in dhdpcie_bus_rtcm32()
6373 DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags); in dhdpcie_bus_rtcm32()
6379 dhdpcie_bus_rtcm64(dhd_bus_t *bus, ulong offset) in dhdpcie_bus_rtcm64() argument
6384 if (bus->is_linkdown) { in dhdpcie_bus_rtcm64()
6390 DHD_BUS_BAR1_SWITCH_LOCK(bus, flags); in dhdpcie_bus_rtcm64()
6392 offset = dhdpcie_bus_chkandshift_bpoffset(bus, offset); in dhdpcie_bus_rtcm64()
6395 data = R_REG(bus->dhd->osh, (volatile uint64 *)(bus->tcm + offset)); in dhdpcie_bus_rtcm64()
6397 data = *(volatile uint64 *)(bus->tcm + offset); in dhdpcie_bus_rtcm64()
6400 DHD_BUS_BAR1_SWITCH_UNLOCK(bus, flags); in dhdpcie_bus_rtcm64()
6406 dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr(dhd_bus_t *bus, void *data, uint8 type, in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr() argument
6412 addr = bus->ring_sh[ringid].ring_state_w; in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr()
6414 addr = bus->ring_sh[ringid].ring_state_r; in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr()
6420 if (req_pwr && MULTIBP_ENAB(bus->sih)) { in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr()
6421 dhd_bus_pcie_pwr_req(bus); in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr()
6426 *(uint16*)data = LTOH16(dhdpcie_bus_rtcm16(bus, addr)); in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr()
6429 dhdpcie_bus_wtcm16(bus, addr, (uint16) HTOL16(*(uint16 *)data)); in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr()
6432 if (req_pwr && MULTIBP_ENAB(bus->sih)) { in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr()
6433 dhd_bus_pcie_pwr_req_clear(bus); in dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr()
6438 dhdpcie_update_ring_ptrs_in_tcm(dhd_bus_t *bus, void *data, uint8 type, uint16 ringid, in dhdpcie_update_ring_ptrs_in_tcm() argument
6442 if (INBAND_DW_ENAB(bus)) { in dhdpcie_update_ring_ptrs_in_tcm()
6444 DHD_BUS_DONGLE_DS_LOCK(bus->dongle_ds_lock, flags_ds); in dhdpcie_update_ring_ptrs_in_tcm()
6445 dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr(bus, data, type, ringid, read, in dhdpcie_update_ring_ptrs_in_tcm()
6446 bus->dongle_in_deepsleep); in dhdpcie_update_ring_ptrs_in_tcm()
6447 DHD_BUS_DONGLE_DS_UNLOCK(bus->dongle_ds_lock, flags_ds); in dhdpcie_update_ring_ptrs_in_tcm()
6452 dhdpcie_update_ring_ptrs_in_tcm_with_req_pwr(bus, data, type, ringid, read, TRUE); in dhdpcie_update_ring_ptrs_in_tcm()
6458 dhd_bus_cmn_writeshared(dhd_bus_t *bus, void *data, uint32 len, uint8 type, uint16 ringid) in dhd_bus_cmn_writeshared() argument
6465 if (bus->is_linkdown) { in dhd_bus_cmn_writeshared()
6474 if (!(bus->dhd->dma_d2h_ring_upd_support || bus->dhd->dma_h2d_ring_upd_support)) { in dhd_bus_cmn_writeshared()
6476 dhdpcie_update_ring_ptrs_in_tcm(bus, data, type, ringid, FALSE); in dhd_bus_cmn_writeshared()
6481 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_cmn_writeshared()
6482 dhd_bus_pcie_pwr_req(bus); in dhd_bus_cmn_writeshared()
6486 addr = bus->ring_sh[ringid].ring_state_w; in dhd_bus_cmn_writeshared()
6487 dhdpcie_bus_wtcm16(bus, addr, (uint16) HTOL16(*(uint16 *)data)); in dhd_bus_cmn_writeshared()
6491 addr = bus->ring_sh[ringid].ring_state_r; in dhd_bus_cmn_writeshared()
6492 dhdpcie_bus_wtcm16(bus, addr, (uint16) HTOL16(*(uint16 *)data)); in dhd_bus_cmn_writeshared()
6496 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, host_dma_scratch_buffer); in dhd_bus_cmn_writeshared()
6498 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8*) &long_data, len); in dhd_bus_cmn_writeshared()
6505 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, host_dma_scratch_buffer_len); in dhd_bus_cmn_writeshared()
6506 dhdpcie_bus_wtcm32(bus, addr, (uint32) HTOL32(*(uint32 *)data)); in dhd_bus_cmn_writeshared()
6514 addr = DHD_RING_INFO_MEMBER_ADDR(bus, h2d_w_idx_hostaddr); in dhd_bus_cmn_writeshared()
6515 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8*) &long_data, len); in dhd_bus_cmn_writeshared()
6523 addr = DHD_RING_INFO_MEMBER_ADDR(bus, h2d_r_idx_hostaddr); in dhd_bus_cmn_writeshared()
6524 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8*) &long_data, len); in dhd_bus_cmn_writeshared()
6532 addr = DHD_RING_INFO_MEMBER_ADDR(bus, d2h_w_idx_hostaddr); in dhd_bus_cmn_writeshared()
6533 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8*) &long_data, len); in dhd_bus_cmn_writeshared()
6541 addr = DHD_RING_INFO_MEMBER_ADDR(bus, d2h_r_idx_hostaddr); in dhd_bus_cmn_writeshared()
6542 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8*) &long_data, len); in dhd_bus_cmn_writeshared()
6550 addr = DHD_RING_INFO_MEMBER_ADDR(bus, ifrm_w_idx_hostaddr); in dhd_bus_cmn_writeshared()
6551 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8*) &long_data, len); in dhd_bus_cmn_writeshared()
6558 addr = DHD_RING_MEM_MEMBER_ADDR(bus, ringid, len_items); in dhd_bus_cmn_writeshared()
6559 dhdpcie_bus_wtcm16(bus, addr, (uint16) HTOL16(*(uint16 *)data)); in dhd_bus_cmn_writeshared()
6563 addr = DHD_RING_MEM_MEMBER_ADDR(bus, ringid, max_item); in dhd_bus_cmn_writeshared()
6564 dhdpcie_bus_wtcm16(bus, addr, (uint16) HTOL16(*(uint16 *)data)); in dhd_bus_cmn_writeshared()
6569 addr = DHD_RING_MEM_MEMBER_ADDR(bus, ringid, base_addr); in dhd_bus_cmn_writeshared()
6570 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8 *) &long_data, len); in dhd_bus_cmn_writeshared()
6577 addr = bus->d2h_mb_data_ptr_addr; in dhd_bus_cmn_writeshared()
6578 dhdpcie_bus_wtcm32(bus, addr, (uint32) HTOL32(*(uint32 *)data)); in dhd_bus_cmn_writeshared()
6582 addr = bus->h2d_mb_data_ptr_addr; in dhd_bus_cmn_writeshared()
6583 dhdpcie_bus_wtcm32(bus, addr, (uint32) HTOL32(*(uint32 *)data)); in dhd_bus_cmn_writeshared()
6587 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, host_cap); in dhd_bus_cmn_writeshared()
6588 dhdpcie_bus_wtcm32(bus, addr, (uint32) HTOL32(*(uint32 *)data)); in dhd_bus_cmn_writeshared()
6593 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, host_trap_addr); in dhd_bus_cmn_writeshared()
6594 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8 *) &long_data, len); in dhd_bus_cmn_writeshared()
6600 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, device_trap_debug_buffer_len); in dhd_bus_cmn_writeshared()
6601 dhdpcie_bus_wtcm16(bus, addr, (uint16) HTOL16(*(uint16 *)data)); in dhd_bus_cmn_writeshared()
6606 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, host_scb_addr); in dhd_bus_cmn_writeshared()
6608 dhdpcie_bus_wtcm64(bus, addr, (uint64) HTOL64(*(uint64 *)data)); in dhd_bus_cmn_writeshared()
6610 dhdpcie_bus_wtcm32(bus, addr, *((uint32*)data)); in dhd_bus_cmn_writeshared()
6619 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_cmn_writeshared()
6620 dhd_bus_pcie_pwr_req_clear(bus); in dhd_bus_cmn_writeshared()
6626 dhd_bus_cmn_readshared(dhd_bus_t *bus, void* data, uint8 type, uint16 ringid) in dhd_bus_cmn_readshared() argument
6634 if (!(bus->dhd->dma_d2h_ring_upd_support || bus->dhd->dma_h2d_ring_upd_support)) { in dhd_bus_cmn_readshared()
6636 dhdpcie_update_ring_ptrs_in_tcm(bus, data, type, ringid, TRUE); in dhd_bus_cmn_readshared()
6641 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_cmn_readshared()
6642 dhd_bus_pcie_pwr_req(bus); in dhd_bus_cmn_readshared()
6646 addr = bus->ring_sh[ringid].ring_state_w; in dhd_bus_cmn_readshared()
6647 *(uint16*)data = LTOH16(dhdpcie_bus_rtcm16(bus, addr)); in dhd_bus_cmn_readshared()
6651 addr = bus->ring_sh[ringid].ring_state_r; in dhd_bus_cmn_readshared()
6652 *(uint16*)data = LTOH16(dhdpcie_bus_rtcm16(bus, addr)); in dhd_bus_cmn_readshared()
6656 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, total_lfrag_pkt_cnt); in dhd_bus_cmn_readshared()
6657 *(uint16*)data = LTOH16(dhdpcie_bus_rtcm16(bus, addr)); in dhd_bus_cmn_readshared()
6661 addr = bus->h2d_mb_data_ptr_addr; in dhd_bus_cmn_readshared()
6662 *(uint32*)data = LTOH32(dhdpcie_bus_rtcm32(bus, addr)); in dhd_bus_cmn_readshared()
6666 addr = bus->d2h_mb_data_ptr_addr; in dhd_bus_cmn_readshared()
6667 *(uint32*)data = LTOH32(dhdpcie_bus_rtcm32(bus, addr)); in dhd_bus_cmn_readshared()
6671 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, max_host_rxbufs); in dhd_bus_cmn_readshared()
6672 *(uint16*)data = LTOH16(dhdpcie_bus_rtcm16(bus, addr)); in dhd_bus_cmn_readshared()
6676 addr = DHD_PCIE_SHARED_MEMBER_ADDR(bus, host_scb_size); in dhd_bus_cmn_readshared()
6677 *(uint32*)data = LTOH32(dhdpcie_bus_rtcm32(bus, addr)); in dhd_bus_cmn_readshared()
6683 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_cmn_readshared()
6684 dhd_bus_pcie_pwr_req_clear(bus); in dhd_bus_cmn_readshared()
6688 uint32 dhd_bus_get_sharedflags(dhd_bus_t *bus) in dhd_bus_get_sharedflags() argument
6690 return ((pciedev_shared_t*)bus->pcie_sh)->flags; in dhd_bus_get_sharedflags()
6710 dhd_bus_t *bus = dhdp->bus; in dhd_bus_iovar_op() local
6740 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_iovar_op()
6744 dhd_bus_pcie_pwr_req(bus); in dhd_bus_iovar_op()
6765 bcmerror = dhdpcie_bus_doiovar(bus, vi, actionid, name, params, plen, arg, len, val_size); in dhd_bus_iovar_op()
6776 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_iovar_op()
6781 dhd_bus_pcie_pwr_req_clear(bus); in dhd_bus_iovar_op()
6997 int dhd_buzzz_dump_dngl(dhd_bus_t *bus) in dhd_buzzz_dump_dngl() argument
7005 if (bus->dhd->busstate != DHD_BUS_DATA) { in dhd_buzzz_dump_dngl()
7008 if ((page_p = (char *)MALLOC(bus->dhd->osh, 4096)) == NULL) { in dhd_buzzz_dump_dngl()
7012 if ((buzzz_p = MALLOC(bus->dhd->osh, sizeof(bcm_buzzz_t))) == NULL) { in dhd_buzzz_dump_dngl()
7017 ret = dhdpcie_readshared(bus); in dhd_buzzz_dump_dngl()
7023 sh = bus->pcie_sh; in dhd_buzzz_dump_dngl()
7029 dhdpcie_bus_membytes(bus, FALSE, (ulong)sh->buzz_dbg_ptr, in dhd_buzzz_dump_dngl()
7047 buffer_p = MALLOC(bus->dhd->osh, buzzz_p->buffer_sz); in dhd_buzzz_dump_dngl()
7054 dhdpcie_bus_membytes(bus, FALSE, (uint32)buzzz_p->log, /* Trace */ in dhd_buzzz_dump_dngl()
7071 MFREE(bus->dhd->osh, buffer_p, buzzz_p->buffer_sz); buffer_p = NULL; in dhd_buzzz_dump_dngl()
7076 if (page_p) MFREE(bus->dhd->osh, page_p, 4096); in dhd_buzzz_dump_dngl()
7077 if (buzzz_p) MFREE(bus->dhd->osh, buzzz_p, sizeof(bcm_buzzz_t)); in dhd_buzzz_dump_dngl()
7078 if (buffer_p) MFREE(bus->dhd->osh, buffer_p, buzzz_p->buffer_sz); in dhd_buzzz_dump_dngl()
7088 pcie2_mdiosetblock(dhd_bus_t *bus, uint blk) in pcie2_mdiosetblock() argument
7096 si_corereg(bus->sih, bus->sih->buscoreidx, PCIE2_MDIO_CONTROL, ~0, mdioctrl); in pcie2_mdiosetblock()
7097 si_corereg(bus->sih, bus->sih->buscoreidx, PCIE2_MDIO_WR_DATA, ~0, mdiodata); in pcie2_mdiosetblock()
7102 uint mdioctrl_read = si_corereg(bus->sih, bus->sih->buscoreidx, PCIE2_MDIO_WR_DATA, in pcie2_mdiosetblock()
7121 dhdpcie_enum_reg_init(dhd_bus_t *bus) in dhdpcie_enum_reg_init() argument
7124 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7129 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7132 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7134 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7138 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7141 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7144 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7146 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7150 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7153 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7155 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7159 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7162 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7164 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_enum_reg_init()
7169 dhd_bus_perform_flr(dhd_bus_t *bus, bool force_fail) in dhd_bus_perform_flr() argument
7184 if (bus->sih && PCIE_ENUM_RESET_WAR_ENAB(bus->sih->buscorerev)) { in dhd_bus_perform_flr()
7185 if (bus->pcie_mailbox_mask != 0) { in dhd_bus_perform_flr()
7186 dhdpcie_bus_intr_disable(bus); in dhd_bus_perform_flr()
7189 dhdpcie_enum_reg_init(bus); in dhd_bus_perform_flr()
7193 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_DEVICE_CAPABILITY, sizeof(val)); in dhd_bus_perform_flr()
7203 dhd_bwm_bt_quiesce(bus); in dhd_bus_perform_flr()
7208 DHD_PCIE_CONFIG_SAVE(bus); in dhd_bus_perform_flr()
7213 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_DEVICE_CONTROL, sizeof(val)); in dhd_bus_perform_flr()
7217 OSL_PCI_WRITE_CONFIG(bus->osh, PCIE_CFG_DEVICE_CONTROL, sizeof(val), val); in dhd_bus_perform_flr()
7232 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val)); in dhd_bus_perform_flr()
7238 OSL_PCI_WRITE_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val), val); in dhd_bus_perform_flr()
7240 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val)); in dhd_bus_perform_flr()
7248 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_DEVICE_CONTROL, sizeof(val)); in dhd_bus_perform_flr()
7252 OSL_PCI_WRITE_CONFIG(bus->osh, PCIE_CFG_DEVICE_CONTROL, sizeof(val), val); in dhd_bus_perform_flr()
7258 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val)); in dhd_bus_perform_flr()
7270 bus->flr_force_fail = FALSE; in dhd_bus_perform_flr()
7278 DHD_PCIE_CONFIG_RESTORE(bus); in dhd_bus_perform_flr()
7281 dhd_bwm_bt_resume(bus); in dhd_bus_perform_flr()
7298 dhd_bus_cfg_ss_ctrl_bp_reset(struct dhd_bus *bus) in dhd_bus_cfg_ss_ctrl_bp_reset() argument
7310 val = OSL_PCI_READ_CONFIG(bus->osh, PCIECFGREG_LINK_STATUS_CTRL, sizeof(val)); in dhd_bus_cfg_ss_ctrl_bp_reset()
7314 OSL_PCI_WRITE_CONFIG(bus->osh, PCIECFGREG_LINK_STATUS_CTRL, sizeof(val), val); in dhd_bus_cfg_ss_ctrl_bp_reset()
7324 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val)); in dhd_bus_cfg_ss_ctrl_bp_reset()
7328 OSL_PCI_WRITE_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val), val); in dhd_bus_cfg_ss_ctrl_bp_reset()
7335 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val)); in dhd_bus_cfg_ss_ctrl_bp_reset()
7354 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val)); in dhd_bus_cfg_ss_ctrl_bp_reset()
7358 OSL_PCI_WRITE_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val), val); in dhd_bus_cfg_ss_ctrl_bp_reset()
7365 val = OSL_PCI_READ_CONFIG(bus->osh, PCIE_CFG_SUBSYSTEM_CONTROL, sizeof(val)); in dhd_bus_cfg_ss_ctrl_bp_reset()
7383 val = OSL_PCI_READ_CONFIG(bus->osh, PCIECFGREG_LINK_STATUS_CTRL, sizeof(val)); in dhd_bus_cfg_ss_ctrl_bp_reset()
7387 OSL_PCI_WRITE_CONFIG(bus->osh, PCIECFGREG_LINK_STATUS_CTRL, sizeof(val), val); in dhd_bus_cfg_ss_ctrl_bp_reset()
7402 dhd_bus_cfg_sprom_ctrl_bp_reset(struct dhd_bus *bus) in dhd_bus_cfg_sprom_ctrl_bp_reset() argument
7406 uint dar_clk_ctrl_status_reg = DAR_CLK_CTRL(bus->sih->buscorerev); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7415 val = OSL_PCI_READ_CONFIG(bus->osh, PCIECFGREG_LINK_STATUS_CTRL, sizeof(val)); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7419 OSL_PCI_WRITE_CONFIG(bus->osh, PCIECFGREG_LINK_STATUS_CTRL, sizeof(val), val); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7428 val = OSL_PCI_READ_CONFIG(bus->osh, PCIECFGREG_SPROM_CTRL, sizeof(val)); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7432 OSL_PCI_WRITE_CONFIG(bus->osh, PCIECFGREG_SPROM_CTRL, sizeof(val), val); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7443 val = OSL_PCI_READ_CONFIG(bus->osh, PCIECFGREG_SPROM_CTRL, sizeof(val)); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7461 val = si_corereg(bus->sih, bus->sih->buscoreidx, in dhd_bus_cfg_sprom_ctrl_bp_reset()
7479 val = OSL_PCI_READ_CONFIG(bus->osh, PCIECFGREG_LINK_STATUS_CTRL, sizeof(val)); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7483 OSL_PCI_WRITE_CONFIG(bus->osh, PCIECFGREG_LINK_STATUS_CTRL, sizeof(val), val); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7494 dhd_bus_t *bus = dhdp->bus; in dhd_bus_devreset() local
7507 dhdpcie_advertise_bus_cleanup(bus->dhd); in dhd_bus_devreset()
7509 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhd_bus_devreset()
7511 atomic_set(&bus->dhd->block_bus, TRUE); in dhd_bus_devreset()
7512 dhd_flush_rx_tx_wq(bus->dhd); in dhd_bus_devreset()
7517 dhd_bus_oob_intr_set(bus->dhd, FALSE); in dhd_bus_devreset()
7518 dhd_bus_oob_intr_unregister(bus->dhd); in dhd_bus_devreset()
7521 dhd_bus_stop(bus, TRUE); in dhd_bus_devreset()
7522 if (bus->intr) { in dhd_bus_devreset()
7523 dhdpcie_bus_intr_disable(bus); in dhd_bus_devreset()
7524 dhdpcie_free_irq(bus); in dhd_bus_devreset()
7526 dhd_deinit_bus_lp_state_lock(bus); in dhd_bus_devreset()
7527 dhd_deinit_bar1_switch_lock(bus); in dhd_bus_devreset()
7528 dhd_deinit_backplane_access_lock(bus); in dhd_bus_devreset()
7529 dhd_deinit_pwr_req_lock(bus); in dhd_bus_devreset()
7531 dhd_deinit_dongle_ds_lock(bus); in dhd_bus_devreset()
7533 dhd_bus_release_dongle(bus); in dhd_bus_devreset()
7534 dhdpcie_bus_free_resource(bus); in dhd_bus_devreset()
7535 bcmerror = dhdpcie_bus_disable_device(bus); in dhd_bus_devreset()
7540 atomic_set(&bus->dhd->block_bus, FALSE); in dhd_bus_devreset()
7543 /* Clean up protocol data after Bus Master Enable bit clear in dhd_bus_devreset()
7560 bcmerror = dhdpcie_bus_stop_host_dev(bus); in dhd_bus_devreset()
7565 atomic_set(&bus->dhd->block_bus, FALSE); in dhd_bus_devreset()
7570 DHD_GENERAL_LOCK(bus->dhd, flags); in dhd_bus_devreset()
7572 bus->dhd->busstate = DHD_BUS_DOWN; in dhd_bus_devreset()
7573 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhd_bus_devreset()
7575 atomic_set(&bus->dhd->block_bus, FALSE); in dhd_bus_devreset()
7578 if (bus->intr) { in dhd_bus_devreset()
7579 dhdpcie_free_irq(bus); in dhd_bus_devreset()
7583 dhd_bus_oob_intr_set(bus->dhd, FALSE); in dhd_bus_devreset()
7584 dhd_bus_oob_intr_unregister(bus->dhd); in dhd_bus_devreset()
7586 dhd_dpc_kill(bus->dhd); in dhd_bus_devreset()
7587 if (!bus->no_bus_init) { in dhd_bus_devreset()
7588 dhd_bus_release_dongle(bus); in dhd_bus_devreset()
7589 dhdpcie_bus_free_resource(bus); in dhd_bus_devreset()
7590 bcmerror = dhdpcie_bus_disable_device(bus); in dhd_bus_devreset()
7596 /* Clean up protocol data after Bus Master Enable bit clear in dhd_bus_devreset()
7614 bus->no_bus_init = FALSE; in dhd_bus_devreset()
7617 bcmerror = dhdpcie_bus_stop_host_dev(bus); in dhd_bus_devreset()
7625 bus->dhd->dongle_reset = TRUE; in dhd_bus_devreset()
7629 if (bus->dhd->busstate == DHD_BUS_DOWN) { in dhd_bus_devreset()
7634 bcmerror = dhdpcie_bus_start_host_dev(bus); in dhd_bus_devreset()
7650 dhd_bus_aspm_enable_rc_ep(bus, FALSE); in dhd_bus_devreset()
7652 bus->is_linkdown = 0; in dhd_bus_devreset()
7653 bus->cto_triggered = 0; in dhd_bus_devreset()
7655 bus->read_shm_fail = FALSE; in dhd_bus_devreset()
7657 bcmerror = dhdpcie_bus_enable_device(bus); in dhd_bus_devreset()
7664 bcmerror = dhdpcie_bus_alloc_resource(bus); in dhd_bus_devreset()
7671 bus->dhd->hp2p_enable = TRUE; in dhd_bus_devreset()
7679 dhdpcie_dongle_reset(bus); in dhd_bus_devreset()
7682 bcmerror = dhdpcie_bus_dongle_attach(bus); in dhd_bus_devreset()
7689 bcmerror = dhd_bus_request_irq(bus); in dhd_bus_devreset()
7696 bus->dhd->dongle_reset = FALSE; in dhd_bus_devreset()
7699 dhd_irq_set_affinity(bus->dhd, cpumask_of(1)); in dhd_bus_devreset()
7710 if (bus->dhd->dhd_watchdog_ms_backup) { in dhd_bus_devreset()
7713 dhd_os_wd_timer(bus->dhd, bus->dhd->dhd_watchdog_ms_backup); in dhd_bus_devreset()
7729 dhd_bus_t *bus = dhdp->bus; in dhd_bus_devreset() local
7737 dhdpcie_advertise_bus_cleanup(bus->dhd); in dhd_bus_devreset()
7740 dhd_bus_stop(bus, FALSE); in dhd_bus_devreset()
7743 dhdpcie_bus_release_dongle(bus, bus->dhd->osh, in dhd_bus_devreset()
7744 bus->dhd->dongle_isolation, TRUE); in dhd_bus_devreset()
7745 bus->dhd->dongle_reset = TRUE; in dhd_bus_devreset()
7749 DHD_GENERAL_LOCK(bus->dhd, flags); in dhd_bus_devreset()
7751 bus->dhd->busstate = DHD_BUS_DOWN; in dhd_bus_devreset()
7752 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhd_bus_devreset()
7763 if (bus->dhd->dongle_reset) { in dhd_bus_devreset()
7766 if (dhdpcie_dongle_attach(bus)) { in dhd_bus_devreset()
7771 DHD_GENERAL_LOCK(bus->dhd, flags); in dhd_bus_devreset()
7773 bus->dhd->busstate = DHD_BUS_DOWN; in dhd_bus_devreset()
7774 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhd_bus_devreset()
7777 if (dhd_bus_download_firmware(bus, bus->dhd->osh, in dhd_bus_devreset()
7778 bus->fw_path, bus->nv_path) == 0) { in dhd_bus_devreset()
7780 bcmerror = dhd_bus_init((dhd_pub_t *) bus->dhd, FALSE); in dhd_bus_devreset()
7782 bus->dhd->dongle_reset = FALSE; in dhd_bus_devreset()
7788 dhd_bus_stop(bus, FALSE); in dhd_bus_devreset()
7807 pcie2_mdioop(dhd_bus_t *bus, uint physmedia, uint regaddr, bool write, uint *val, in pcie2_mdioop() argument
7813 pcie2_mdiosetblock(bus, physmedia); in pcie2_mdioop()
7825 si_corereg(bus->sih, bus->sih->buscoreidx, PCIE2_MDIO_CONTROL, ~0, mdio_ctrl); in pcie2_mdioop()
7829 si_corereg(bus->sih, bus->sih->buscoreidx, PCIE2_MDIO_WR_DATA, ~0, in pcie2_mdioop()
7836 uint done_val = si_corereg(bus->sih, bus->sih->buscoreidx, reg32, 0, 0); in pcie2_mdioop()
7839 *val = si_corereg(bus->sih, bus->sih->buscoreidx, in pcie2_mdioop()
7854 serialized_backplane_access_64(dhd_bus_t *bus, uint addr, uint size, uint64 *val, bool read) in serialized_backplane_access_64() argument
7859 DHD_BACKPLANE_ACCESS_LOCK(bus->backplane_access_lock, flags); in serialized_backplane_access_64()
7860 ret = si_backplane_access_64(bus->sih, addr, size, val, read); in serialized_backplane_access_64()
7861 DHD_BACKPLANE_ACCESS_UNLOCK(bus->backplane_access_lock, flags); in serialized_backplane_access_64()
7891 DHD_ERROR(("%s: Can change only when bus down (before FW download)\n", in dhdpcie_set_dma_ring_indices()
7917 serialized_backplane_access(dhd_bus_t *bus, uint addr, uint size, uint *val, bool read) in serialized_backplane_access() argument
7921 DHD_BACKPLANE_ACCESS_LOCK(bus->backplane_access_lock, flags); in serialized_backplane_access()
7922 ret = si_backplane_access(bus->sih, addr, size, val, read); in serialized_backplane_access()
7923 DHD_BACKPLANE_ACCESS_UNLOCK(bus->backplane_access_lock, flags); in serialized_backplane_access()
7995 * IOVAR handler of the DHD bus layer (in this case, the PCIe bus).
8004 dhdpcie_bus_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, uint32 actionid, const char *name, in dhdpcie_bus_doiovar() argument
8034 if (bus->dhd->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) || in dhdpcie_bus_doiovar()
8047 if (bus->msi_sim != int_val) { in dhdpcie_bus_doiovar()
8049 /* bus->msi_addr */ in dhdpcie_bus_doiovar()
8050 bus->msi_sim_addr = in dhdpcie_bus_doiovar()
8051 MALLOC(bus->dhd->osh, MSI_SIM_BUFSIZE); in dhdpcie_bus_doiovar()
8052 if (bus->msi_sim_addr) { in dhdpcie_bus_doiovar()
8053 *bus->msi_sim_addr = 0; in dhdpcie_bus_doiovar()
8054 bus->msi_sim_phys = DMA_MAP(bus->dhd->osh, in dhdpcie_bus_doiovar()
8055 bus->msi_sim_addr, MSI_SIM_BUFSIZE, DMA_RX, 0, 0); in dhdpcie_bus_doiovar()
8057 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8060 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8063 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8066 ASSERT(PHYSADDRHI(bus->msi_sim_phys) == 0); in dhdpcie_bus_doiovar()
8067 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8069 configdata), ~0, (uint32)PHYSADDRLO(bus->msi_sim_phys)); in dhdpcie_bus_doiovar()
8070 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8073 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8077 bus->pollrate = 10; in dhdpcie_bus_doiovar()
8079 DHD_INFO(("msi_sim_addr is %p\n", bus->msi_sim_addr)); in dhdpcie_bus_doiovar()
8081 /* bus->msi_addr */ in dhdpcie_bus_doiovar()
8082 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8086 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8090 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8094 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8097 DMA_UNMAP(bus->dhd->osh, bus->msi_sim_phys, in dhdpcie_bus_doiovar()
8099 MFREE(bus->dhd->osh, in dhdpcie_bus_doiovar()
8100 bus->msi_sim_addr, MSI_SIM_BUFSIZE); in dhdpcie_bus_doiovar()
8102 bus->msi_sim = (bool)int_val; in dhdpcie_bus_doiovar()
8106 bcopy(&bus->msi_sim, arg, val_size); in dhdpcie_bus_doiovar()
8111 bcmerror = dhdpcie_downloadvars(bus, arg, len); in dhdpcie_bus_doiovar()
8116 si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configaddr), ~0, in dhdpcie_bus_doiovar()
8118 si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configdata), ~0, in dhdpcie_bus_doiovar()
8124 si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configaddr), ~0, in dhdpcie_bus_doiovar()
8126 int_val = si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
8133 si_corereg(bus->sih, bus->sih->buscoreidx, int_val, ~0, int_val2); in dhdpcie_bus_doiovar()
8145 if (serialized_backplane_access(bus, addr, size, (uint *)&int_val, TRUE) != BCME_OK) in dhdpcie_bus_doiovar()
8164 if (serialized_backplane_access(bus, addr, size, in dhdpcie_bus_doiovar()
8179 addr = sdreg.offset | SI_ENUM_BASE(bus->sih); in dhdpcie_bus_doiovar()
8182 if (serialized_backplane_access(bus, addr, size, (uint *)&int_val, TRUE) != BCME_OK) in dhdpcie_bus_doiovar()
8199 addr = sdreg.offset | SI_ENUM_BASE(bus->sih); in dhdpcie_bus_doiovar()
8201 if (serialized_backplane_access(bus, addr, size, in dhdpcie_bus_doiovar()
8212 if (!PCIE_GEN2(bus->sih)) { in dhdpcie_bus_doiovar()
8218 if (!pcie2_mdioop(bus, int_val, int_val2, FALSE, &val, FALSE)) { in dhdpcie_bus_doiovar()
8228 if (!PCIE_GEN2(bus->sih)) { in dhdpcie_bus_doiovar()
8233 if (pcie2_mdioop(bus, int_val, int_val2, TRUE, (uint *)&int_val3, FALSE)) { in dhdpcie_bus_doiovar()
8240 int_val = si_corereg(bus->sih, bus->sih->buscoreidx, int_val, 0, 0); in dhdpcie_bus_doiovar()
8246 OSL_PCI_WRITE_CONFIG(bus->osh, int_val, 4, int_val2); in dhdpcie_bus_doiovar()
8251 int_val = OSL_PCI_READ_CONFIG(bus->osh, int_val, 4); in dhdpcie_bus_doiovar()
8256 bcmerror = dhdpcie_bus_lpback_req(bus, int_val); in dhdpcie_bus_doiovar()
8273 bcmerror = dhdpcie_bus_dmaxfer_req(bus, dmaxfer->num_bytes, in dhdpcie_bus_doiovar()
8279 bcmerror = dhdmsgbuf_dmaxfer_status(bus->dhd, dmaxfer); in dhdpcie_bus_doiovar()
8293 bcmerror = dhdmsgbuf_dmaxfer_status(bus->dhd, dmaxfer); in dhdpcie_bus_doiovar()
8299 int_val = dhdpcie_bus_get_tx_lpback(bus); in dhdpcie_bus_doiovar()
8303 bcmerror = dhdpcie_bus_set_tx_lpback(bus, bool_val); in dhdpcie_bus_doiovar()
8309 int_val = dhd_oob_get_bt_reg_on(bus); in dhdpcie_bus_doiovar()
8313 dhd_oob_set_bt_reg_on(bus, (uint8)int_val); in dhdpcie_bus_doiovar()
8316 int_val = bus->oob_enabled; in dhdpcie_bus_doiovar()
8320 bus->oob_enabled = (bool)int_val; in dhdpcie_bus_doiovar()
8325 int_val = bus->inb_enabled; in dhdpcie_bus_doiovar()
8329 bus->inb_enabled = (bool)int_val; in dhdpcie_bus_doiovar()
8334 int_val = bus->ds_enabled; in dhdpcie_bus_doiovar()
8340 bus->deep_sleep = TRUE; in dhdpcie_bus_doiovar()
8341 if (!bus->ds_enabled) { in dhdpcie_bus_doiovar()
8342 bus->ds_enabled = TRUE; in dhdpcie_bus_doiovar()
8344 if (dhd_bus_set_device_wake(bus, FALSE) == BCME_OK) { in dhdpcie_bus_doiovar()
8346 if (INBAND_DW_ENAB(bus)) { in dhdpcie_bus_doiovar()
8348 timeleft = dhd_os_ds_enter_wait(bus->dhd, NULL); in dhdpcie_bus_doiovar()
8351 bus->ds_enabled = FALSE; in dhdpcie_bus_doiovar()
8360 bus->ds_enabled = FALSE; in dhdpcie_bus_doiovar()
8367 bus->deep_sleep = FALSE; in dhdpcie_bus_doiovar()
8368 if (bus->ds_enabled) { in dhdpcie_bus_doiovar()
8370 bus->dhd->cur_intr_poll_period = dhd_os_get_intr_poll_period(); in dhdpcie_bus_doiovar()
8374 dhd_os_set_intr_poll_period(bus, INTR_POLL_PERIOD_CRITICAL); in dhdpcie_bus_doiovar()
8376 bus->calc_ds_exit_latency = TRUE; in dhdpcie_bus_doiovar()
8378 if (dhd_bus_set_device_wake(bus, TRUE) == BCME_OK) { in dhdpcie_bus_doiovar()
8379 bus->ds_enabled = FALSE; in dhdpcie_bus_doiovar()
8380 if (INBAND_DW_ENAB(bus)) { in dhdpcie_bus_doiovar()
8381 if (bus->ds_exit_latency != 0) { in dhdpcie_bus_doiovar()
8383 bus->ds_exit_latency)); in dhdpcie_bus_doiovar()
8394 bus->calc_ds_exit_latency = FALSE; in dhdpcie_bus_doiovar()
8397 dhd_os_set_intr_poll_period(bus, bus->dhd->cur_intr_poll_period); in dhdpcie_bus_doiovar()
8410 int_val = bus->dev_tx_stuck_monitor; in dhdpcie_bus_doiovar()
8414 bus->dev_tx_stuck_monitor = (bool)int_val; in dhdpcie_bus_doiovar()
8418 int_val = (bus->dhd->busstate == DHD_BUS_SUSPEND) ? 1 : 0; in dhdpcie_bus_doiovar()
8431 ret = dhd_os_busbusy_wait_condition(bus->dhd, in dhdpcie_bus_doiovar()
8432 &bus->dhd->dhd_bus_busy_state, DHD_BUS_BUSY_IN_DHD_IOVAR); in dhdpcie_bus_doiovar()
8435 __FUNCTION__, bus->dhd->dhd_bus_busy_state)); in dhdpcie_bus_doiovar()
8439 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8440 DHD_BUS_BUSY_SET_SUSPEND_IN_PROGRESS(bus->dhd); in dhdpcie_bus_doiovar()
8441 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8443 dhdpcie_bus_suspend(bus, TRUE, TRUE); in dhdpcie_bus_doiovar()
8445 dhdpcie_bus_suspend(bus, TRUE); in dhdpcie_bus_doiovar()
8448 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8449 DHD_BUS_BUSY_CLEAR_SUSPEND_IN_PROGRESS(bus->dhd); in dhdpcie_bus_doiovar()
8450 dhd_os_busbusy_wake(bus->dhd); in dhdpcie_bus_doiovar()
8451 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8454 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8455 DHD_BUS_BUSY_SET_RESUME_IN_PROGRESS(bus->dhd); in dhdpcie_bus_doiovar()
8456 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8458 dhdpcie_bus_suspend(bus, FALSE); in dhdpcie_bus_doiovar()
8460 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8461 DHD_BUS_BUSY_CLEAR_RESUME_IN_PROGRESS(bus->dhd); in dhdpcie_bus_doiovar()
8462 dhd_os_busbusy_wake(bus->dhd); in dhdpcie_bus_doiovar()
8463 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8468 int_val = (int32)bus->ramsize; in dhdpcie_bus_doiovar()
8500 if (si_setcore(bus->sih, ARMCR4_CORE_ID, 0) || in dhdpcie_bus_doiovar()
8501 si_setcore(bus->sih, ARMCA7_CORE_ID, 0) || in dhdpcie_bus_doiovar()
8502 si_setcore(bus->sih, SYSMEM_CORE_ID, 0)) { in dhdpcie_bus_doiovar()
8504 if (set && address == bus->dongle_ram_base) { in dhdpcie_bus_doiovar()
8505 bus->resetinstr = *(((uint32*)params) + 2); in dhdpcie_bus_doiovar()
8513 bcmerror = dhdpcie_bus_membytes(bus, set, address, data, size); in dhdpcie_bus_doiovar()
8536 if (si_setcoreidx(bus->sih, ddi.index) == NULL) { in dhdpcie_bus_doiovar()
8540 ddo->address = si_addrspace(bus->sih, CORE_SLAVE_PORT_0, CORE_BASE_ADDR_0); in dhdpcie_bus_doiovar()
8543 ddo->id = si_coreid(bus->sih); in dhdpcie_bus_doiovar()
8544 ddo->rev = si_corerev(bus->sih); in dhdpcie_bus_doiovar()
8548 *p++ = si_corereg(bus->sih, ddi.index, ddi.offset, 0, 0); in dhdpcie_bus_doiovar()
8564 if (dhd_cap(bus->dhd, (char*)arg, len) == NULL) { in dhdpcie_bus_doiovar()
8574 debugger_init((void *) bus, &bus_ops, int_val, SI_ENUM_BASE(bus->sih)); in dhdpcie_bus_doiovar()
8587 if (bus->gdb_proxy_access_enabled) { in dhdpcie_bus_doiovar()
8589 if (bus->dhd->busstate < DHD_BUS_LOAD) { in dhdpcie_bus_doiovar()
8595 if (bus->gdb_proxy_bootloader_mode) { in dhdpcie_bus_doiovar()
8598 ret.last_id = bus->gdb_proxy_last_id; in dhdpcie_bus_doiovar()
8599 if (bus->hostfw_buf.va) { in dhdpcie_bus_doiovar()
8602 (uint32)PCIEDEV_ARM_ADDR(PHYSADDRLO(bus->hostfw_buf.pa), in dhdpcie_bus_doiovar()
8604 ret.hostmem_code_win_length = bus->hostfw_buf.len; in dhdpcie_bus_doiovar()
8607 bus->gdb_proxy_last_id = (uint32)int_val; in dhdpcie_bus_doiovar()
8611 bus->dhd->gdb_proxy_active = TRUE; in dhdpcie_bus_doiovar()
8618 int_val = (int32)bus->dhd->gdb_proxy_stop_count; in dhdpcie_bus_doiovar()
8622 bus->dhd->gdb_proxy_stop_count = (uint32)int_val; in dhdpcie_bus_doiovar()
8629 bcmerror = dhd_buzzz_dump_dngl(bus); in dhdpcie_bus_doiovar()
8634 bcmerror = dhdpcie_bus_download_state(bus, bool_val); in dhdpcie_bus_doiovar()
8645 bcmerror = dhdpcie_bus_save_download_info(bus, in dhdpcie_bus_doiovar()
8653 int_val = (int32)bus->ramsize; in dhdpcie_bus_doiovar()
8658 bus->ramsize = int_val; in dhdpcie_bus_doiovar()
8659 bus->orig_ramsize = int_val; in dhdpcie_bus_doiovar()
8663 int_val = (int32)bus->dongle_ram_base; in dhdpcie_bus_doiovar()
8672 bcmerror = dhdpcie_cc_nvmshadow(bus, &dump_b); in dhdpcie_bus_doiovar()
8677 bool_val = bus->sleep_allowed; in dhdpcie_bus_doiovar()
8682 bus->sleep_allowed = bool_val; in dhdpcie_bus_doiovar()
8686 int_val = bus->dhd->dongle_isolation; in dhdpcie_bus_doiovar()
8691 bus->dhd->dongle_isolation = bool_val; in dhdpcie_bus_doiovar()
8695 int_val = bus->ltrsleep_on_unload; in dhdpcie_bus_doiovar()
8700 bus->ltrsleep_on_unload = bool_val; in dhdpcie_bus_doiovar()
8707 bcmerror = dhd_prot_ringupd_dump(bus->dhd, &dump_b); in dhdpcie_bus_doiovar()
8712 int_val = dhdpcie_get_dma_ring_indices(bus->dhd); in dhdpcie_bus_doiovar()
8717 bcmerror = dhdpcie_set_dma_ring_indices(bus->dhd, int_val); in dhdpcie_bus_doiovar()
8721 int_val = dhd_prot_metadata_dbg_get(bus->dhd); in dhdpcie_bus_doiovar()
8725 dhd_prot_metadata_dbg_set(bus->dhd, (int_val != 0)); in dhdpcie_bus_doiovar()
8729 int_val = dhd_prot_metadatalen_get(bus->dhd, TRUE); in dhdpcie_bus_doiovar()
8739 dhd_prot_metadatalen_set(bus->dhd, int_val, TRUE); in dhdpcie_bus_doiovar()
8746 dhd_prot_txp_threshold(bus->dhd, TRUE, int_val); in dhdpcie_bus_doiovar()
8750 int_val = dhd_prot_txp_threshold(bus->dhd, FALSE, int_val); in dhdpcie_bus_doiovar()
8756 bus->db1_for_mb = TRUE; in dhdpcie_bus_doiovar()
8758 bus->db1_for_mb = FALSE; in dhdpcie_bus_doiovar()
8762 if (bus->db1_for_mb) in dhdpcie_bus_doiovar()
8770 int_val = dhd_prot_metadatalen_get(bus->dhd, FALSE); in dhdpcie_bus_doiovar()
8780 dhd_prot_metadatalen_set(bus->dhd, int_val, FALSE); in dhdpcie_bus_doiovar()
8803 bcmerror = dhd_bus_devreset(bus->dhd, (uint8)int_val); in dhdpcie_bus_doiovar()
8806 bcmerror = dhd_bus_devreset(bus->dhd, (uint8)int_val); in dhdpcie_bus_doiovar()
8810 bcmerror = dhd_bus_perform_flr(bus, bus->flr_force_fail); in dhdpcie_bus_doiovar()
8813 bus->flr_force_fail = TRUE; in dhdpcie_bus_doiovar()
8817 if (bus->dhd->busstate == DHD_BUS_DATA) { in dhdpcie_bus_doiovar()
8818 if (bus->dhd->db7_trap.fw_db7w_trap) { in dhdpcie_bus_doiovar()
8821 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8822 bus->dhd->db7_trap.fw_db7w_trap_inprogress = TRUE; in dhdpcie_bus_doiovar()
8823 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8824 dhdpcie_fw_trap(bus); in dhdpcie_bus_doiovar()
8826 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8827 bus->dhd->db7_trap.fw_db7w_trap_inprogress = FALSE; in dhdpcie_bus_doiovar()
8828 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_doiovar()
8835 dhd_bus_perform_flr_with_quiesce(bus->dhd, bus, in dhdpcie_bus_doiovar()
8843 DHD_ERROR(("%s: Bus is NOT up\n", __FUNCTION__)); in dhdpcie_bus_doiovar()
8856 if (bus->dhd->busstate == DHD_BUS_DATA) in dhdpcie_bus_doiovar()
8857 dhdpcie_fw_trap(bus); in dhdpcie_bus_doiovar()
8859 DHD_ERROR(("%s: Bus is NOT up\n", __FUNCTION__)); in dhdpcie_bus_doiovar()
8864 int_val = bus->dhd->flow_prio_map_type; in dhdpcie_bus_doiovar()
8869 int_val = (int32)dhd_update_flow_prio_map(bus->dhd, (uint8)int_val); in dhdpcie_bus_doiovar()
8875 if (!(bus->dhd->op_mode & DHD_FLAG_MFG_MODE)) { in dhdpcie_bus_doiovar()
8876 int_val = bus->idletime; in dhdpcie_bus_doiovar()
8887 bus->idletime = int_val; in dhdpcie_bus_doiovar()
8888 if (bus->idletime) { in dhdpcie_bus_doiovar()
8889 DHD_ENABLE_RUNTIME_PM(bus->dhd); in dhdpcie_bus_doiovar()
8891 DHD_DISABLE_RUNTIME_PM(bus->dhd); in dhdpcie_bus_doiovar()
8907 dhdpcie_send_mb_data(bus, (uint)int_val); in dhdpcie_bus_doiovar()
8911 dhd_prot_init_info_rings(bus->dhd); in dhdpcie_bus_doiovar()
8915 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
8916 DHD_ERROR(("%s: Can change only when bus down (before FW download)\n", in dhdpcie_bus_doiovar()
8922 bus->dhd->h2d_phase_supported = TRUE; in dhdpcie_bus_doiovar()
8924 bus->dhd->h2d_phase_supported = FALSE; in dhdpcie_bus_doiovar()
8928 int_val = (int32) bus->dhd->h2d_phase_supported; in dhdpcie_bus_doiovar()
8933 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
8934 DHD_ERROR(("%s: Can change only when bus down (before FW download)\n", in dhdpcie_bus_doiovar()
8940 bus->dhd->force_dongletrap_on_bad_h2d_phase = TRUE; in dhdpcie_bus_doiovar()
8942 bus->dhd->force_dongletrap_on_bad_h2d_phase = FALSE; in dhdpcie_bus_doiovar()
8946 int_val = (int32) bus->dhd->force_dongletrap_on_bad_h2d_phase; in dhdpcie_bus_doiovar()
8951 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
8952 DHD_ERROR(("%s: Can change only when bus down (before FW download)\n", in dhdpcie_bus_doiovar()
8957 dhd_prot_set_h2d_max_txpost(bus->dhd, (uint16)int_val); in dhdpcie_bus_doiovar()
8961 int_val = dhd_prot_get_h2d_max_txpost(bus->dhd); in dhdpcie_bus_doiovar()
8967 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
8968 DHD_ERROR(("%s: Can change only when bus down (before FW download)\n", in dhdpcie_bus_doiovar()
8973 dhd_prot_set_h2d_htput_max_txpost(bus->dhd, (uint16)int_val); in dhdpcie_bus_doiovar()
8977 int_val = dhd_prot_get_h2d_htput_max_txpost(bus->dhd); in dhdpcie_bus_doiovar()
8995 bcmerror = dhd_prot_dump_extended_trap(bus->dhd, &dump_b, FALSE); in dhdpcie_bus_doiovar()
9003 bcmerror = dhd_prot_dump_extended_trap(bus->dhd, &dump_b, TRUE); in dhdpcie_bus_doiovar()
9018 clkreq = dhdpcie_clkreq(bus->dhd->osh, 0, 0); in dhdpcie_bus_doiovar()
9019 aspm = dhdpcie_lcreg(bus->dhd->osh, 0, 0); in dhdpcie_bus_doiovar()
9029 tmp = dhdpcie_lcreg(bus->dhd->osh, 0, 0); in dhdpcie_bus_doiovar()
9030 dhdpcie_lcreg(bus->dhd->osh, PCIE_ASPM_ENAB, in dhdpcie_bus_doiovar()
9033 dhdpcie_clkreq(bus->dhd->osh, 1, ((int_val & 0x100) >> 8)); in dhdpcie_bus_doiovar()
9038 bus->dhd->hang_report = bool_val; in dhdpcie_bus_doiovar()
9040 __FUNCTION__, bus->dhd->hang_report)); in dhdpcie_bus_doiovar()
9044 int_val = (int32)bus->dhd->hang_report; in dhdpcie_bus_doiovar()
9049 bcmerror = dhdpcie_cto_init(bus, bool_val); in dhdpcie_bus_doiovar()
9053 if (bus->sih->buscorerev < 19) { in dhdpcie_bus_doiovar()
9057 int_val = (int32)bus->cto_enable; in dhdpcie_bus_doiovar()
9063 if (bus->sih->buscorerev < 19) { in dhdpcie_bus_doiovar()
9067 bus->cto_threshold = (uint32)int_val; in dhdpcie_bus_doiovar()
9072 if (bus->sih->buscorerev < 19) { in dhdpcie_bus_doiovar()
9076 if (bus->cto_threshold) { in dhdpcie_bus_doiovar()
9077 int_val = (int32)bus->cto_threshold; in dhdpcie_bus_doiovar()
9079 int_val = pcie_cto_to_thresh_default(bus->sih->buscorerev); in dhdpcie_bus_doiovar()
9088 dhdpcie_cc_watchdog_reset(bus); in dhdpcie_bus_doiovar()
9095 bcmerror = dhd_control_signal(bus, arg, len, TRUE); in dhdpcie_bus_doiovar()
9101 bcmerror = dhd_control_signal(bus, params, plen, FALSE); in dhdpcie_bus_doiovar()
9105 bcmerror = dhd_wifi_properties(bus, params, plen); in dhdpcie_bus_doiovar()
9108 bcmerror = dhd_otp_dump(bus, params, plen); in dhdpcie_bus_doiovar()
9112 bcmerror = dhd_btop_test(bus, arg, len); in dhdpcie_bus_doiovar()
9117 int_val = bus->idma_enabled; in dhdpcie_bus_doiovar()
9121 bus->idma_enabled = (bool)int_val; in dhdpcie_bus_doiovar()
9124 int_val = bus->ifrm_enabled; in dhdpcie_bus_doiovar()
9128 bus->ifrm_enabled = (bool)int_val; in dhdpcie_bus_doiovar()
9132 int_val = bus->dma_chan; in dhdpcie_bus_doiovar()
9137 bus->dma_chan = (bool)int_val; in dhdpcie_bus_doiovar()
9138 bus->pcie_mb_intr_addr = si_corereg_addr(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_doiovar()
9139 dhd_bus_db0_addr_get(bus)); in dhdpcie_bus_doiovar()
9145 fp = dhd_os_open_image1(bus->dhd, params); in dhdpcie_bus_doiovar()
9150 bcmerror = dhdpcie_hybridfw_download(bus, fp); in dhdpcie_bus_doiovar()
9151 dhd_os_close_image1(bus->dhd, fp); in dhdpcie_bus_doiovar()
9157 dhd_flow_rings_flush(bus->dhd, 0); in dhdpcie_bus_doiovar()
9160 int_val = bus->dar_enabled; in dhdpcie_bus_doiovar()
9164 bus->dar_enabled = (bool)int_val; in dhdpcie_bus_doiovar()
9167 bcmerror = dhd_get_hscb_info(bus->dhd, NULL, (uint32 *)arg); in dhdpcie_bus_doiovar()
9171 bcmerror = dhd_get_hscb_buff(bus->dhd, int_val, int_val2, (void*)arg); in dhdpcie_bus_doiovar()
9176 int_val = bus->d2h_minidump_override; in dhdpcie_bus_doiovar()
9181 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
9182 DHD_ERROR(("%s: Can change only when bus down (before FW download)\n", in dhdpcie_bus_doiovar()
9187 bus->d2h_minidump_override = (bool)int_val; in dhdpcie_bus_doiovar()
9198 bcmerror = handle_set_fwtrace(bus->dhd, (uint32) int_val); in dhdpcie_bus_doiovar()
9209 ret = dhd_iovar(bus->dhd, 0, "dngl:fwtrace", in dhdpcie_bus_doiovar()
9216 of_counter = get_fw_trace_overflow_counter(bus->dhd); in dhdpcie_bus_doiovar()
9229 dhd_prot_hp2p_enable(bus->dhd, TRUE, int_val); in dhdpcie_bus_doiovar()
9233 int_val = dhd_prot_hp2p_enable(bus->dhd, FALSE, int_val); in dhdpcie_bus_doiovar()
9238 dhd_prot_pkt_threshold(bus->dhd, TRUE, int_val); in dhdpcie_bus_doiovar()
9242 int_val = dhd_prot_pkt_threshold(bus->dhd, FALSE, int_val); in dhdpcie_bus_doiovar()
9247 dhd_prot_time_threshold(bus->dhd, TRUE, int_val); in dhdpcie_bus_doiovar()
9251 int_val = dhd_prot_time_threshold(bus->dhd, FALSE, int_val); in dhdpcie_bus_doiovar()
9256 dhd_prot_pkt_expiry(bus->dhd, TRUE, int_val); in dhdpcie_bus_doiovar()
9260 int_val = dhd_prot_pkt_expiry(bus->dhd, FALSE, int_val); in dhdpcie_bus_doiovar()
9264 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
9267 dhd_bus_set_hp2p_ring_max_size(bus, TRUE, int_val); in dhdpcie_bus_doiovar()
9271 int_val = dhd_bus_get_hp2p_ring_max_size(bus, TRUE); in dhdpcie_bus_doiovar()
9275 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
9278 dhd_bus_set_hp2p_ring_max_size(bus, FALSE, int_val); in dhdpcie_bus_doiovar()
9282 int_val = dhd_bus_get_hp2p_ring_max_size(bus, FALSE); in dhdpcie_bus_doiovar()
9286 bus->dhd->hp2p_mf_enable = int_val ? TRUE : FALSE; in dhdpcie_bus_doiovar()
9290 int_val = bus->dhd->hp2p_mf_enable ? 1 : 0; in dhdpcie_bus_doiovar()
9295 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
9299 bus->dhd->extdtxs_in_txcpl = TRUE; in dhdpcie_bus_doiovar()
9301 bus->dhd->extdtxs_in_txcpl = FALSE; in dhdpcie_bus_doiovar()
9305 int_val = bus->dhd->extdtxs_in_txcpl; in dhdpcie_bus_doiovar()
9310 if (bus->dhd->busstate != DHD_BUS_DOWN) { in dhdpcie_bus_doiovar()
9314 bus->dhd->hostrdy_after_init = TRUE; in dhdpcie_bus_doiovar()
9316 bus->dhd->hostrdy_after_init = FALSE; in dhdpcie_bus_doiovar()
9320 int_val = bus->dhd->hostrdy_after_init; in dhdpcie_bus_doiovar()
9332 addr = sdreg.offset | SI_ENUM_BASE(bus->sih); in dhdpcie_bus_doiovar()
9335 if (serialized_backplane_access_64(bus, addr, size, in dhdpcie_bus_doiovar()
9353 addr = sdreg.offset | SI_ENUM_BASE(bus->sih); in dhdpcie_bus_doiovar()
9356 if (serialized_backplane_access_64(bus, addr, size, in dhdpcie_bus_doiovar()
9376 dhdpcie_bus_lpback_req(struct dhd_bus *bus, uint32 len) in dhdpcie_bus_lpback_req() argument
9378 if (bus->dhd == NULL) { in dhdpcie_bus_lpback_req()
9379 DHD_ERROR(("%s: bus not inited\n", __FUNCTION__)); in dhdpcie_bus_lpback_req()
9382 if (bus->dhd->prot == NULL) { in dhdpcie_bus_lpback_req()
9386 if (bus->dhd->busstate != DHD_BUS_DATA) { in dhdpcie_bus_lpback_req()
9390 dhdmsgbuf_lpbk_req(bus->dhd, len); in dhdpcie_bus_lpback_req()
9395 dhd_bus_dump_dar_registers(struct dhd_bus *bus) in dhd_bus_dump_dar_registers() argument
9402 if (bus->is_linkdown) { in dhd_bus_dump_dar_registers()
9407 if (bus->sih == NULL) { in dhd_bus_dump_dar_registers()
9413 if (DAR_PWRREQ(bus)) { in dhd_bus_dump_dar_registers()
9414 dhd_bus_pcie_pwr_req(bus); in dhd_bus_dump_dar_registers()
9417 dar_clk_ctrl_reg = (uint32)DAR_CLK_CTRL(bus->sih->buscorerev); in dhd_bus_dump_dar_registers()
9418 dar_pwr_ctrl_reg = (uint32)DAR_PCIE_PWR_CTRL(bus->sih->buscorerev); in dhd_bus_dump_dar_registers()
9419 dar_intstat_reg = (uint32)DAR_INTSTAT(bus->sih->buscorerev); in dhd_bus_dump_dar_registers()
9420 dar_errlog_reg = (uint32)DAR_ERRLOG(bus->sih->buscorerev); in dhd_bus_dump_dar_registers()
9421 dar_erraddr_reg = (uint32)DAR_ERRADDR(bus->sih->buscorerev); in dhd_bus_dump_dar_registers()
9422 dar_pcie_mbint_reg = (uint32)DAR_PCIMailBoxInt(bus->sih->buscorerev); in dhd_bus_dump_dar_registers()
9424 if (bus->sih->buscorerev < 24) { in dhd_bus_dump_dar_registers()
9426 __FUNCTION__, bus->sih->buscorerev)); in dhd_bus_dump_dar_registers()
9430 dar_clk_ctrl_val = si_corereg(bus->sih, bus->sih->buscoreidx, dar_clk_ctrl_reg, 0, 0); in dhd_bus_dump_dar_registers()
9431 dar_pwr_ctrl_val = si_corereg(bus->sih, bus->sih->buscoreidx, dar_pwr_ctrl_reg, 0, 0); in dhd_bus_dump_dar_registers()
9432 dar_intstat_val = si_corereg(bus->sih, bus->sih->buscoreidx, dar_intstat_reg, 0, 0); in dhd_bus_dump_dar_registers()
9433 dar_errlog_val = si_corereg(bus->sih, bus->sih->buscoreidx, dar_errlog_reg, 0, 0); in dhd_bus_dump_dar_registers()
9434 dar_erraddr_val = si_corereg(bus->sih, bus->sih->buscoreidx, dar_erraddr_reg, 0, 0); in dhd_bus_dump_dar_registers()
9435 dar_pcie_mbint_val = si_corereg(bus->sih, bus->sih->buscoreidx, dar_pcie_mbint_reg, 0, 0); in dhd_bus_dump_dar_registers()
9450 dhd_bus_hostready(struct dhd_bus *bus) in dhd_bus_hostready() argument
9452 if (!bus->dhd->d2h_hostrdy_supported) { in dhd_bus_hostready()
9456 if (bus->is_linkdown) { in dhd_bus_hostready()
9462 dhd_pcie_config_read(bus, PCI_CFG_CMD, sizeof(uint32)))); in dhd_bus_hostready()
9464 dhd_bus_dump_dar_registers(bus); in dhd_bus_hostready()
9467 dhd_bus_mmio_trace(bus, dhd_bus_db1_addr_get(bus), 0x1, TRUE); in dhd_bus_hostready()
9469 si_corereg(bus->sih, bus->sih->buscoreidx, dhd_bus_db1_addr_get(bus), ~0, 0x12345678); in dhd_bus_hostready()
9470 bus->hostready_count ++; in dhd_bus_hostready()
9471 DHD_ERROR_MEM(("%s: Ring Hostready:%d\n", __FUNCTION__, bus->hostready_count)); in dhd_bus_hostready()
9476 dhdpcie_bus_clear_intstatus(struct dhd_bus *bus) in dhdpcie_bus_clear_intstatus() argument
9480 if (DHD_CHK_BUS_LPS_D3_ACKED(bus)) { in dhdpcie_bus_clear_intstatus()
9484 if ((bus->sih->buscorerev == 6) || (bus->sih->buscorerev == 4) || in dhdpcie_bus_clear_intstatus()
9485 (bus->sih->buscorerev == 2)) { in dhdpcie_bus_clear_intstatus()
9486 intstatus = dhdpcie_bus_cfg_read_dword(bus, PCIIntstatus, 4); in dhdpcie_bus_clear_intstatus()
9487 dhdpcie_bus_cfg_write_dword(bus, PCIIntstatus, 4, intstatus); in dhdpcie_bus_clear_intstatus()
9490 intstatus = si_corereg(bus->sih, bus->sih->buscoreidx, bus->pcie_mailbox_int, 0, 0); in dhdpcie_bus_clear_intstatus()
9491 si_corereg(bus->sih, bus->sih->buscoreidx, bus->pcie_mailbox_int, bus->def_intmask, in dhdpcie_bus_clear_intstatus()
9498 dhdpcie_bus_suspend(struct dhd_bus *bus, bool state, bool byint) in dhdpcie_bus_suspend() argument
9500 dhdpcie_bus_suspend(struct dhd_bus *bus, bool state) in dhdpcie_bus_suspend()
9512 if (bus->dhd == NULL) { in dhdpcie_bus_suspend()
9513 DHD_ERROR(("%s: bus not inited\n", __FUNCTION__)); in dhdpcie_bus_suspend()
9516 if (bus->dhd->prot == NULL) { in dhdpcie_bus_suspend()
9521 if (dhd_query_bus_erros(bus->dhd)) { in dhdpcie_bus_suspend()
9525 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9526 if (!(bus->dhd->busstate == DHD_BUS_DATA || bus->dhd->busstate == DHD_BUS_SUSPEND)) { in dhdpcie_bus_suspend()
9528 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9531 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9532 if (bus->dhd->dongle_reset) { in dhdpcie_bus_suspend()
9541 if (state == TRUE && bus->dhd->busstate == DHD_BUS_SUSPEND) { in dhdpcie_bus_suspend()
9542 DHD_ERROR(("Bus is already in SUSPEND state.\n")); in dhdpcie_bus_suspend()
9544 } else if (state == FALSE && bus->dhd->busstate == DHD_BUS_DATA) { in dhdpcie_bus_suspend()
9545 DHD_ERROR(("Bus is already in RESUME state.\n")); in dhdpcie_bus_suspend()
9555 if (bus->is_linkdown) { in dhdpcie_bus_suspend()
9564 bus->dhd->dhd_watchdog_ms_backup = dhd_watchdog_ms; in dhdpcie_bus_suspend()
9565 if (bus->dhd->dhd_watchdog_ms_backup) { in dhdpcie_bus_suspend()
9568 dhd_os_wd_timer(bus->dhd, 0); in dhdpcie_bus_suspend()
9571 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9573 if (DHD_BUS_BUSY_CHECK_IN_TX(bus->dhd)) { in dhdpcie_bus_suspend()
9575 bus->dhd->busstate = DHD_BUS_DATA; in dhdpcie_bus_suspend()
9576 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9585 bus->last_suspend_start_time = OSL_LOCALTIME_NS(); in dhdpcie_bus_suspend()
9588 dhd_bus_stop_queue(bus); in dhdpcie_bus_suspend()
9589 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9593 DHD_OS_WAKE_LOCK_WAIVE(bus->dhd); in dhdpcie_bus_suspend()
9595 bus->wait_for_d3_ack = 0; in dhdpcie_bus_suspend()
9596 dhdpcie_send_mb_data(bus, H2D_HOST_D3_INFORM); in dhdpcie_bus_suspend()
9598 timeleft = dhd_os_d3ack_wait(bus->dhd, &bus->wait_for_d3_ack); in dhdpcie_bus_suspend()
9599 DHD_OS_WAKE_LOCK_RESTORE(bus->dhd); in dhdpcie_bus_suspend()
9602 bus->wait_for_d3_ack = 0; in dhdpcie_bus_suspend()
9603 dhdpcie_send_mb_data(bus, H2D_HOST_D3_INFORM | H2D_HOST_ACK_NOINT); in dhdpcie_bus_suspend()
9604 while (!bus->wait_for_d3_ack && d3_read_retry < MAX_D3_ACK_TIMEOUT) { in dhdpcie_bus_suspend()
9605 dhdpcie_handle_mb_data(bus); in dhdpcie_bus_suspend()
9611 DHD_OS_WAKE_LOCK_WAIVE(bus->dhd); in dhdpcie_bus_suspend()
9614 dhd_timesync_control(bus->dhd, TRUE); in dhdpcie_bus_suspend()
9621 bus->skip_ds_ack = TRUE; in dhdpcie_bus_suspend()
9625 dhd_bus_set_device_wake(bus, TRUE); in dhdpcie_bus_suspend()
9628 bus->oob_presuspend = TRUE; in dhdpcie_bus_suspend()
9632 if (INBAND_DW_ENAB(bus)) { in dhdpcie_bus_suspend()
9639 dhd_bus_inb_set_device_wake(bus, FALSE); in dhdpcie_bus_suspend()
9641 dhd_bus_set_device_wake(bus, FALSE); in dhdpcie_bus_suspend()
9643 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9644 dhdpcie_bus_set_pcie_inband_dw_state(bus, DW_DEVICE_HOST_SLEEP_WAIT); in dhdpcie_bus_suspend()
9645 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9649 bus->wait_for_d3_ack = 0; in dhdpcie_bus_suspend()
9651 * Send H2D_HOST_D3_INFORM to dongle and mark bus->bus_low_power_state in dhdpcie_bus_suspend()
9657 if (INBAND_DW_ENAB(bus)) { in dhdpcie_bus_suspend()
9658 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9659 dhdpcie_send_mb_data(bus, H2D_HOST_D3_INFORM); in dhdpcie_bus_suspend()
9660 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9664 dhdpcie_send_mb_data(bus, H2D_HOST_D3_INFORM); in dhdpcie_bus_suspend()
9669 timeleft = dhd_os_d3ack_wait(bus->dhd, &bus->wait_for_d3_ack); in dhdpcie_bus_suspend()
9673 if (bus->wait_for_d3_ack == 0) { in dhdpcie_bus_suspend()
9675 uint32 intstatus = si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_suspend()
9676 bus->pcie_mailbox_int, 0, 0); in dhdpcie_bus_suspend()
9677 int host_irq_disabled = dhdpcie_irq_disabled(bus); in dhdpcie_bus_suspend()
9679 (timeleft == 0) && (!dhd_query_bus_erros(bus->dhd))) { in dhdpcie_bus_suspend()
9683 dhd_pcie_intr_count_dump(bus->dhd); in dhdpcie_bus_suspend()
9684 dhd_print_tasklet_status(bus->dhd); in dhdpcie_bus_suspend()
9685 if (bus->api.fw_rev >= PCIE_SHARED_VERSION_6 && in dhdpcie_bus_suspend()
9686 !bus->use_mailbox) { in dhdpcie_bus_suspend()
9687 dhd_prot_process_ctrlbuf(bus->dhd); in dhdpcie_bus_suspend()
9689 dhdpcie_handle_mb_data(bus); in dhdpcie_bus_suspend()
9691 timeleft = dhd_os_d3ack_wait(bus->dhd, &bus->wait_for_d3_ack); in dhdpcie_bus_suspend()
9693 dhdpcie_bus_clear_intstatus(bus); in dhdpcie_bus_suspend()
9695 } /* bus->wait_for_d3_ack was 0 */ in dhdpcie_bus_suspend()
9698 DHD_OS_WAKE_LOCK_RESTORE(bus->dhd); in dhdpcie_bus_suspend()
9704 while ((active = dhd_os_check_wakelock_all(bus->dhd)) && in dhdpcie_bus_suspend()
9711 if (bus->wait_for_d3_ack) { in dhdpcie_bus_suspend()
9713 /* Got D3 Ack. Suspend the bus */ in dhdpcie_bus_suspend()
9719 if (bus->dhd->dhd_watchdog_ms_backup) { in dhdpcie_bus_suspend()
9722 dhd_os_wd_timer(bus->dhd, in dhdpcie_bus_suspend()
9723 bus->dhd->dhd_watchdog_ms_backup); in dhdpcie_bus_suspend()
9738 bus->wait_for_d3_ack = 0; in dhdpcie_bus_suspend()
9740 DHD_SET_BUS_NOT_IN_LPS(bus); in dhdpcie_bus_suspend()
9742 if (INBAND_DW_ENAB(bus)) { in dhdpcie_bus_suspend()
9743 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9750 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhdpcie_bus_suspend()
9752 dhd_bus_ds_trace(bus, 0, TRUE, in dhdpcie_bus_suspend()
9753 dhdpcie_bus_get_pcie_inband_dw_state(bus)); in dhdpcie_bus_suspend()
9754 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9756 bus->skip_ds_ack = FALSE; in dhdpcie_bus_suspend()
9764 dhdpcie_bus_intr_enable(bus); in dhdpcie_bus_suspend()
9767 if (!DHD_BUS_BUSY_CHECK_RPM_SUSPEND_IN_PROGRESS(bus->dhd)) { in dhdpcie_bus_suspend()
9769 if (dhdpcie_irq_disabled(bus)) { in dhdpcie_bus_suspend()
9770 dhdpcie_enable_irq(bus); in dhdpcie_bus_suspend()
9771 bus->resume_intr_enable_count++; in dhdpcie_bus_suspend()
9778 bus->resume_intr_enable_count++; in dhdpcie_bus_suspend()
9781 if (bus->use_d0_inform) { in dhdpcie_bus_suspend()
9782 DHD_OS_WAKE_LOCK_WAIVE(bus->dhd); in dhdpcie_bus_suspend()
9783 dhdpcie_send_mb_data(bus, in dhdpcie_bus_suspend()
9785 DHD_OS_WAKE_LOCK_RESTORE(bus->dhd); in dhdpcie_bus_suspend()
9788 dhd_bus_hostready(bus); in dhdpcie_bus_suspend()
9790 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9791 bus->dhd->busstate = DHD_BUS_DATA; in dhdpcie_bus_suspend()
9793 dhd_bus_start_queue(bus); in dhdpcie_bus_suspend()
9794 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9799 /* At this time bus->bus_low_power_state will be in dhdpcie_bus_suspend()
9804 bus->oob_presuspend = FALSE; in dhdpcie_bus_suspend()
9805 if (OOB_DW_ENAB(bus)) { in dhdpcie_bus_suspend()
9806 dhd_bus_set_device_wake(bus, FALSE); in dhdpcie_bus_suspend()
9810 bus->oob_presuspend = TRUE; in dhdpcie_bus_suspend()
9813 if (INBAND_DW_ENAB(bus)) { in dhdpcie_bus_suspend()
9814 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9815 if (dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhdpcie_bus_suspend()
9817 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhdpcie_bus_suspend()
9820 dhd_bus_ds_trace(bus, 0, TRUE, in dhdpcie_bus_suspend()
9821 dhdpcie_bus_get_pcie_inband_dw_state(bus)); in dhdpcie_bus_suspend()
9823 dhd_bus_ds_trace(bus, 0, TRUE); in dhdpcie_bus_suspend()
9826 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9829 if (bus->use_d0_inform && in dhdpcie_bus_suspend()
9830 (bus->api.fw_rev < PCIE_SHARED_VERSION_6)) { in dhdpcie_bus_suspend()
9831 DHD_OS_WAKE_LOCK_WAIVE(bus->dhd); in dhdpcie_bus_suspend()
9832 dhdpcie_send_mb_data(bus, (H2D_HOST_D0_INFORM_IN_USE)); in dhdpcie_bus_suspend()
9833 DHD_OS_WAKE_LOCK_RESTORE(bus->dhd); in dhdpcie_bus_suspend()
9836 dhd_bus_set_device_wake(bus, FALSE); in dhdpcie_bus_suspend()
9840 if (bus->dhd->dhd_induce_error == DHD_INDUCE_DROP_OOB_IRQ) { in dhdpcie_bus_suspend()
9843 dhdpcie_oob_intr_set(bus, TRUE); in dhdpcie_bus_suspend()
9847 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9854 * between DPC and suspend context and bus->bus_low_power_state in dhdpcie_bus_suspend()
9857 bus->dhd->d3ackcnt_timeout = 0; in dhdpcie_bus_suspend()
9858 bus->dhd->busstate = DHD_BUS_SUSPEND; in dhdpcie_bus_suspend()
9859 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9861 dhdpcie_dump_resource(bus); in dhdpcie_bus_suspend()
9863 rc = dhdpcie_pci_suspend_resume(bus, state); in dhdpcie_bus_suspend()
9865 bus->last_suspend_end_time = OSL_LOCALTIME_NS(); in dhdpcie_bus_suspend()
9872 uint32 cur_memdump_mode = bus->dhd->memdump_enabled; in dhdpcie_bus_suspend()
9876 bus->dhd->is_sched_error = !dhd_query_bus_erros(bus->dhd) && in dhdpcie_bus_suspend()
9877 dhd_bus_query_dpc_sched_errors(bus->dhd); in dhdpcie_bus_suspend()
9878 bus->dhd->d3ack_timeout_occured = TRUE; in dhdpcie_bus_suspend()
9880 bus->dhd->d3ackcnt_timeout++; in dhdpcie_bus_suspend()
9882 __FUNCTION__, bus->dhd->is_sched_error ? in dhdpcie_bus_suspend()
9883 " due to scheduling problem" : "", bus->dhd->d3ackcnt_timeout)); in dhdpcie_bus_suspend()
9894 if (bus->dhd->is_sched_error && cur_memdump_mode == DUMP_MEMFILE_BUGON) { in dhdpcie_bus_suspend()
9901 DHD_SET_BUS_NOT_IN_LPS(bus); in dhdpcie_bus_suspend()
9903 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9904 bus->dhd->busstate = DHD_BUS_DATA; in dhdpcie_bus_suspend()
9906 dhd_bus_start_queue(bus); in dhdpcie_bus_suspend()
9907 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
9909 * invalid PCIe bus assceess due to PCIe link down in dhdpcie_bus_suspend()
9911 if (bus->dhd->check_trap_rot) { in dhdpcie_bus_suspend()
9913 dhdpcie_checkdied(bus, NULL, 0); in dhdpcie_bus_suspend()
9915 if (bus->dhd->dongle_trap_occured) { in dhdpcie_bus_suspend()
9919 bus->no_cfg_restore = 1; in dhdpcie_bus_suspend()
9922 dhd_os_check_hang(bus->dhd, 0, -EREMOTEIO); in dhdpcie_bus_suspend()
9924 } else if (!bus->is_linkdown && in dhdpcie_bus_suspend()
9925 !bus->cto_triggered) { in dhdpcie_bus_suspend()
9928 /* Check if PCIe bus status is valid */ in dhdpcie_bus_suspend()
9929 intstatus = si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_bus_suspend()
9930 bus->pcie_mailbox_int, 0, 0); in dhdpcie_bus_suspend()
9932 /* Invalidate PCIe bus status */ in dhdpcie_bus_suspend()
9933 bus->is_linkdown = 1; in dhdpcie_bus_suspend()
9936 dhd_bus_dump_console_buffer(bus); in dhdpcie_bus_suspend()
9937 dhd_prot_debug_info_print(bus->dhd); in dhdpcie_bus_suspend()
9941 bus->dhd->memdump_type = DUMP_TYPE_D3_ACK_TIMEOUT; in dhdpcie_bus_suspend()
9942 dhdpcie_mem_dump(bus); in dhdpcie_bus_suspend()
9951 dhd_bus_check_died(bus); in dhdpcie_bus_suspend()
9958 bus->no_cfg_restore = 1; in dhdpcie_bus_suspend()
9961 dhd_os_check_hang(bus->dhd, 0, -ETIMEDOUT); in dhdpcie_bus_suspend()
9965 dhd_schedule_reset(bus->dhd); in dhdpcie_bus_suspend()
9970 bus->oob_presuspend = FALSE; in dhdpcie_bus_suspend()
9975 bus->last_resume_start_time = OSL_LOCALTIME_NS(); in dhdpcie_bus_suspend()
9987 si_invalidate_second_bar0win(bus->sih); in dhdpcie_bus_suspend()
9990 DHD_OS_OOB_IRQ_WAKE_UNLOCK(bus->dhd); in dhdpcie_bus_suspend()
9994 if (INBAND_DW_ENAB(bus)) { in dhdpcie_bus_suspend()
9995 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
9996 if (dhdpcie_bus_get_pcie_inband_dw_state(bus) == DW_DEVICE_HOST_SLEEP) { in dhdpcie_bus_suspend()
9997 dhdpcie_bus_set_pcie_inband_dw_state(bus, DW_DEVICE_HOST_WAKE_WAIT); in dhdpcie_bus_suspend()
9999 dhd_bus_ds_trace(bus, 0, TRUE, in dhdpcie_bus_suspend()
10000 dhdpcie_bus_get_pcie_inband_dw_state(bus)); in dhdpcie_bus_suspend()
10002 dhd_bus_ds_trace(bus, 0, TRUE); in dhdpcie_bus_suspend()
10005 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhdpcie_bus_suspend()
10007 bus->skip_ds_ack = FALSE; in dhdpcie_bus_suspend()
10009 rc = dhdpcie_pci_suspend_resume(bus, state); in dhdpcie_bus_suspend()
10011 dhdpcie_dump_resource(bus); in dhdpcie_bus_suspend()
10015 DHD_SET_BUS_NOT_IN_LPS(bus); in dhdpcie_bus_suspend()
10017 if (!rc && bus->dhd->busstate == DHD_BUS_SUSPEND) { in dhdpcie_bus_suspend()
10018 if (bus->use_d0_inform) { in dhdpcie_bus_suspend()
10019 DHD_OS_WAKE_LOCK_WAIVE(bus->dhd); in dhdpcie_bus_suspend()
10020 dhdpcie_send_mb_data(bus, (H2D_HOST_D0_INFORM)); in dhdpcie_bus_suspend()
10021 DHD_OS_WAKE_LOCK_RESTORE(bus->dhd); in dhdpcie_bus_suspend()
10024 dhd_bus_hostready(bus); in dhdpcie_bus_suspend()
10026 DHD_GENERAL_LOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
10027 bus->dhd->busstate = DHD_BUS_DATA; in dhdpcie_bus_suspend()
10029 if (DHD_BUS_BUSY_CHECK_RPM_SUSPEND_DONE(bus->dhd)) { in dhdpcie_bus_suspend()
10030 bus->bus_wake = 1; in dhdpcie_bus_suspend()
10032 wake_up(&bus->rpm_queue); in dhdpcie_bus_suspend()
10056 if (!bus->dhd->d2h_hostrdy_supported) { in dhdpcie_bus_suspend()
10057 dhd_bus_set_device_wake(bus, TRUE); in dhdpcie_bus_suspend()
10059 dhd_bus_set_device_wake(bus, FALSE); in dhdpcie_bus_suspend()
10064 dhd_bus_start_queue(bus); in dhdpcie_bus_suspend()
10070 dhdpcie_bus_intr_enable(bus); /* Enable back interrupt using Intmask!! */ in dhdpcie_bus_suspend()
10073 if (!DHD_BUS_BUSY_CHECK_RPM_RESUME_IN_PROGRESS(bus->dhd)) { in dhdpcie_bus_suspend()
10074 if (dhdpcie_irq_disabled(bus)) { in dhdpcie_bus_suspend()
10075 dhdpcie_enable_irq(bus); in dhdpcie_bus_suspend()
10076 bus->resume_intr_enable_count++; in dhdpcie_bus_suspend()
10081 bus->resume_intr_enable_count++; in dhdpcie_bus_suspend()
10084 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhdpcie_bus_suspend()
10088 DHD_OS_WAKE_LOCK_WAIVE(bus->dhd); in dhdpcie_bus_suspend()
10089 dhd_timesync_control(bus->dhd, FALSE); in dhdpcie_bus_suspend()
10090 DHD_OS_WAKE_LOCK_RESTORE(bus->dhd); in dhdpcie_bus_suspend()
10093 if (bus->dhd->dhd_watchdog_ms_backup) { in dhdpcie_bus_suspend()
10096 dhd_os_wd_timer(bus->dhd, bus->dhd->dhd_watchdog_ms_backup); in dhdpcie_bus_suspend()
10099 bus->last_resume_end_time = OSL_LOCALTIME_NS(); in dhdpcie_bus_suspend()
10102 DHD_EDL_RING_TCM_RD_UPDATE(bus->dhd); in dhdpcie_bus_suspend()
10115 ret = dhdpcie_bus_suspend(dhd->bus, TRUE, BUS_SUSPEND); in dhd_bus_suspend()
10117 ret = dhdpcie_bus_suspend(dhd->bus, BUS_SUSPEND); in dhd_bus_suspend()
10129 ret = dhdpcie_bus_suspend(dhd->bus, FALSE, BUS_RESUME); in dhd_bus_resume()
10131 ret = dhdpcie_bus_suspend(dhd->bus, BUS_RESUME); in dhd_bus_resume()
10137 dhdpcie_force_alp(struct dhd_bus *bus, bool enable) in dhdpcie_force_alp() argument
10139 ASSERT(bus && bus->sih); in dhdpcie_force_alp()
10141 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_force_alp()
10144 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_force_alp()
10152 dhdpcie_set_l1_entry_time(struct dhd_bus *bus, int l1_entry_time) in dhdpcie_set_l1_entry_time() argument
10156 ASSERT(bus && bus->sih); in dhdpcie_set_l1_entry_time()
10158 si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configaddr), ~0, in dhdpcie_set_l1_entry_time()
10160 reg_val = si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_set_l1_entry_time()
10163 si_corereg(bus->sih, bus->sih->buscoreidx, OFFSETOF(sbpcieregs_t, configdata), ~0, in dhdpcie_set_l1_entry_time()
10170 dhd_apply_d11_war_length(struct dhd_bus *bus, uint32 len, uint32 d11_lpbk) in dhd_apply_d11_war_length() argument
10172 uint16 chipid = si_chipid(bus->sih); in dhd_apply_d11_war_length()
10192 dhdpcie_bus_dmaxfer_req(struct dhd_bus *bus, in dhdpcie_bus_dmaxfer_req() argument
10199 if (bus->dhd == NULL) { in dhdpcie_bus_dmaxfer_req()
10200 DHD_ERROR(("%s: bus not inited\n", __FUNCTION__)); in dhdpcie_bus_dmaxfer_req()
10203 if (bus->dhd->prot == NULL) { in dhdpcie_bus_dmaxfer_req()
10207 if (bus->dhd->busstate != DHD_BUS_DATA) { in dhdpcie_bus_dmaxfer_req()
10218 bus->dhd->cur_intr_poll_period = dhd_os_get_intr_poll_period(); in dhdpcie_bus_dmaxfer_req()
10220 dhd_os_set_intr_poll_period(bus, INTR_POLL_PERIOD_CRITICAL); in dhdpcie_bus_dmaxfer_req()
10223 len = dhd_apply_d11_war_length(bus, len, d11_lpbk); in dhdpcie_bus_dmaxfer_req()
10225 bus->dmaxfer_complete = FALSE; in dhdpcie_bus_dmaxfer_req()
10226 ret = dhdmsgbuf_dmaxfer_req(bus->dhd, len, srcdelay, destdelay, in dhdpcie_bus_dmaxfer_req()
10232 ret = dhd_os_dmaxfer_wait(bus->dhd, &bus->dmaxfer_complete); in dhdpcie_bus_dmaxfer_req()
10237 dhd_os_set_intr_poll_period(bus, bus->dhd->cur_intr_poll_period); in dhdpcie_bus_dmaxfer_req()
10247 dhdpcie_bus_set_tx_lpback(struct dhd_bus *bus, bool enable) in dhdpcie_bus_set_tx_lpback() argument
10249 if (bus->dhd == NULL) { in dhdpcie_bus_set_tx_lpback()
10250 DHD_ERROR(("bus not inited\n")); in dhdpcie_bus_set_tx_lpback()
10253 if (bus->dhd->prot == NULL) { in dhdpcie_bus_set_tx_lpback()
10257 if (bus->dhd->busstate != DHD_BUS_DATA) { in dhdpcie_bus_set_tx_lpback()
10261 bus->dhd->loopback = enable; in dhdpcie_bus_set_tx_lpback()
10266 dhdpcie_bus_get_tx_lpback(struct dhd_bus *bus) in dhdpcie_bus_get_tx_lpback() argument
10268 if (bus->dhd == NULL) { in dhdpcie_bus_get_tx_lpback()
10269 DHD_ERROR(("bus not inited\n")); in dhdpcie_bus_get_tx_lpback()
10272 return bus->dhd->loopback ? 1 : 0; in dhdpcie_bus_get_tx_lpback()
10278 dhd_bus_is_multibp_capable(struct dhd_bus *bus) in dhd_bus_is_multibp_capable() argument
10280 return MULTIBP_CAP(bus->sih); in dhd_bus_is_multibp_capable()
10287 dhdpcie_bus_download_state(dhd_bus_t *bus, bool enter) in dhdpcie_bus_download_state() argument
10294 if (!bus->sih) { in dhdpcie_bus_download_state()
10299 do_flr = ((bus->sih->buscorerev != PCIE_REV_FOR_4378A0) && in dhdpcie_bus_download_state()
10300 (bus->sih->buscorerev != PCIE_REV_FOR_4378B0)); in dhdpcie_bus_download_state()
10309 if (MULTIBP_ENAB(bus->sih) && !do_flr) { in dhdpcie_bus_download_state()
10310 dhd_bus_pcie_pwr_req(bus); in dhdpcie_bus_download_state()
10319 if (dhd_bus_is_multibp_capable(bus) && do_flr && in dhdpcie_bus_download_state()
10320 dhd_fw_download_status(bus->dhd) != FW_DOWNLOAD_IN_PROGRESS) { in dhdpcie_bus_download_state()
10322 const int pwr_req_ref = bus->pwr_req_ref; in dhdpcie_bus_download_state()
10324 (void)dhd_bus_perform_flr_with_quiesce(bus->dhd, bus, FALSE); in dhdpcie_bus_download_state()
10332 if (bus->pwr_req_ref < pwr_req_ref) { in dhdpcie_bus_download_state()
10333 dhd_bus_pcie_pwr_req(bus); in dhdpcie_bus_download_state()
10336 (void)dhd_bus_perform_flr_with_quiesce(bus->dhd, bus, FALSE); in dhdpcie_bus_download_state()
10343 dhdpcie_setbar1win(bus, 0x00000000); in dhdpcie_bus_download_state()
10344 bus->alp_only = TRUE; in dhdpcie_bus_download_state()
10346 bus->gdb_proxy_access_enabled = TRUE; in dhdpcie_bus_download_state()
10347 bus->gdb_proxy_bootloader_mode = FALSE; in dhdpcie_bus_download_state()
10351 cr4_regs = si_setcore(bus->sih, ARMCR4_CORE_ID, 0); in dhdpcie_bus_download_state()
10353 if (cr4_regs == NULL && !(si_setcore(bus->sih, ARM7S_CORE_ID, 0)) && in dhdpcie_bus_download_state()
10354 !(si_setcore(bus->sih, ARMCM3_CORE_ID, 0)) && in dhdpcie_bus_download_state()
10355 !(si_setcore(bus->sih, ARMCA7_CORE_ID, 0))) { in dhdpcie_bus_download_state()
10361 if (si_setcore(bus->sih, ARMCA7_CORE_ID, 0)) { in dhdpcie_bus_download_state()
10363 si_core_reset(bus->sih, SICF_CPUHALT, SICF_CPUHALT); in dhdpcie_bus_download_state()
10364 if (!(si_setcore(bus->sih, SYSMEM_CORE_ID, 0))) { in dhdpcie_bus_download_state()
10369 si_core_reset(bus->sih, 0, 0); in dhdpcie_bus_download_state()
10371 dhdpcie_init_shared_addr(bus); in dhdpcie_bus_download_state()
10373 si_core_disable(bus->sih, 0); in dhdpcie_bus_download_state()
10375 if (!(si_setcore(bus->sih, SOCRAM_CORE_ID, 0))) { in dhdpcie_bus_download_state()
10381 si_core_reset(bus->sih, 0, 0); in dhdpcie_bus_download_state()
10384 if (bus->ramsize) { in dhdpcie_bus_download_state()
10386 if (dhdpcie_bus_membytes(bus, TRUE, bus->ramsize - 4, in dhdpcie_bus_download_state()
10402 si_core_reset(bus->sih, SICF_CPUHALT, SICF_CPUHALT); in dhdpcie_bus_download_state()
10403 if (BCM43602_CHIP(bus->sih->chip)) { in dhdpcie_bus_download_state()
10405 W_REG(bus->pcie_mb_intr_osh, cr4_regs + ARMCR4REG_BANKIDX, 5); in dhdpcie_bus_download_state()
10406 W_REG(bus->pcie_mb_intr_osh, cr4_regs + ARMCR4REG_BANKPDA, 0); in dhdpcie_bus_download_state()
10407 W_REG(bus->pcie_mb_intr_osh, cr4_regs + ARMCR4REG_BANKIDX, 7); in dhdpcie_bus_download_state()
10408 W_REG(bus->pcie_mb_intr_osh, cr4_regs + ARMCR4REG_BANKPDA, 0); in dhdpcie_bus_download_state()
10411 dhdpcie_init_shared_addr(bus); in dhdpcie_bus_download_state()
10414 if (si_setcore(bus->sih, ARMCA7_CORE_ID, 0)) { in dhdpcie_bus_download_state()
10416 if ((bcmerror = dhdpcie_bus_write_vars(bus))) { in dhdpcie_bus_download_state()
10423 if ((bcmerror = dhdpcie_wrt_rnd(bus)) != BCME_OK) { in dhdpcie_bus_download_state()
10429 if (bus->hostfw_buf.va) { in dhdpcie_bus_download_state()
10439 host_location.binary_size = htol32(bus->hostfw_buf.len); in dhdpcie_bus_download_state()
10440 host_location.addr_hi = PHYSADDRHI(bus->hostfw_buf.pa); in dhdpcie_bus_download_state()
10441 host_location.addr_lo = PHYSADDRLO(bus->hostfw_buf.pa); in dhdpcie_bus_download_state()
10442 bus->next_tlv -= sizeof(host_location); in dhdpcie_bus_download_state()
10443 dhdpcie_bus_membytes(bus, TRUE, bus->next_tlv, in dhdpcie_bus_download_state()
10458 if (fwtrace_init(bus->dhd) == BCME_OK) { in dhdpcie_bus_download_state()
10459 fwtrace_get_haddr(bus->dhd, &host_info.host_buf_info); in dhdpcie_bus_download_state()
10465 bus->ramtop_addr -= sizeof(host_info); in dhdpcie_bus_download_state()
10467 dhdpcie_bus_membytes(bus, TRUE, bus->ramtop_addr, in dhdpcie_bus_download_state()
10470 bus->next_tlv = sizeof(host_info); in dhdpcie_bus_download_state()
10477 if ((bcmerror = dhdpcie_bus_download_fw_signature(bus, &do_wr_flops)) in dhdpcie_bus_download_state()
10487 if (!(si_setcore(bus->sih, ARMCA7_CORE_ID, 0))) { in dhdpcie_bus_download_state()
10498 bcmerror = dhdpcie_bus_membytes(bus, FALSE, 0, in dhdpcie_bus_download_state()
10509 bcmerror = dhdpcie_bus_membytes(bus, TRUE, 0, in dhdpcie_bus_download_state()
10510 (uint8 *)&bus->resetinstr, sizeof(bus->resetinstr)); in dhdpcie_bus_download_state()
10513 } else if (!si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) { in dhdpcie_bus_download_state()
10514 if (!(si_setcore(bus->sih, SOCRAM_CORE_ID, 0))) { in dhdpcie_bus_download_state()
10520 if (!si_iscoreup(bus->sih)) { in dhdpcie_bus_download_state()
10529 if (!si_setcore(bus->sih, PCMCIA_CORE_ID, 0) && in dhdpcie_bus_download_state()
10530 !si_setcore(bus->sih, SDIOD_CORE_ID, 0)) { in dhdpcie_bus_download_state()
10538 if (!(si_setcore(bus->sih, ARM7S_CORE_ID, 0)) && in dhdpcie_bus_download_state()
10539 !(si_setcore(bus->sih, ARMCM3_CORE_ID, 0))) { in dhdpcie_bus_download_state()
10545 if (BCM43602_CHIP(bus->sih->chip)) { in dhdpcie_bus_download_state()
10547 if (!(si_setcore(bus->sih, SOCRAM_CORE_ID, 0))) { in dhdpcie_bus_download_state()
10553 si_core_reset(bus->sih, 0, 0); in dhdpcie_bus_download_state()
10554 si_setcore(bus->sih, ARMCR4_CORE_ID, 0); in dhdpcie_bus_download_state()
10558 if ((bcmerror = dhdpcie_bus_write_vars(bus))) { in dhdpcie_bus_download_state()
10566 if ((bcmerror = dhdpcie_wrt_rnd(bus)) != BCME_OK) { in dhdpcie_bus_download_state()
10573 if ((bcmerror = dhdpcie_bus_download_fw_signature(bus, &do_wr_flops)) in dhdpcie_bus_download_state()
10582 if (!(si_setcore(bus->sih, ARMCR4_CORE_ID, 0))) { in dhdpcie_bus_download_state()
10593 bcmerror = dhdpcie_bus_membytes(bus, FALSE, 0, in dhdpcie_bus_download_state()
10604 bcmerror = dhdpcie_bus_membytes(bus, TRUE, 0, in dhdpcie_bus_download_state()
10605 (uint8 *)&bus->resetinstr, sizeof(bus->resetinstr)); in dhdpcie_bus_download_state()
10610 bcmerror = dhdpcie_bus_membytes(bus, FALSE, 0, in dhdpcie_bus_download_state()
10613 if (bcmerror == BCME_OK && tmp != bus->resetinstr) { in dhdpcie_bus_download_state()
10615 __FUNCTION__, bus->resetinstr)); in dhdpcie_bus_download_state()
10626 bus->arm_oor_time = OSL_LOCALTIME_NS(); in dhdpcie_bus_download_state()
10627 si_core_reset(bus->sih, 0, 0); in dhdpcie_bus_download_state()
10630 bus->alp_only = FALSE; in dhdpcie_bus_download_state()
10632 bus->dhd->busstate = DHD_BUS_LOAD; in dhdpcie_bus_download_state()
10644 bus->dhd->fw_download_status = FW_DOWNLOAD_DONE; in dhdpcie_bus_download_state()
10650 si_setcore(bus->sih, PCIE2_CORE_ID, 0); in dhdpcie_bus_download_state()
10652 if (MULTIBP_ENAB(bus->sih) && !do_flr) { in dhdpcie_bus_download_state()
10653 dhd_bus_pcie_pwr_req_clear(bus); in dhdpcie_bus_download_state()
10662 dhdpcie_bus_download_fw_signature(dhd_bus_t *bus, bool *do_write) in dhdpcie_bus_download_fw_signature() argument
10668 bus->bootloader_filename, bus->bootloader_addr, in dhdpcie_bus_download_fw_signature()
10669 bus->fw_download_addr, bus->fw_download_len, in dhdpcie_bus_download_fw_signature()
10670 bus->fwsig_filename, bus->fwsig_download_addr, in dhdpcie_bus_download_fw_signature()
10671 bus->fwsig_download_len, in dhdpcie_bus_download_fw_signature()
10672 bus->fwstat_download_addr, bus->fwstat_download_len, in dhdpcie_bus_download_fw_signature()
10673 bus->dongle_ram_base, bus->ramtop_addr)); in dhdpcie_bus_download_fw_signature()
10675 if (bus->fwsig_filename[0] == 0) { in dhdpcie_bus_download_fw_signature()
10681 if ((bcmerror = dhdpcie_bus_download_ram_bootloader(bus)) in dhdpcie_bus_download_fw_signature()
10689 if ((bcmerror = dhdpcie_bus_write_fwsig(bus, bus->fwsig_filename, in dhdpcie_bus_download_fw_signature()
10697 if ((bcmerror = dhdpcie_bus_write_fws_status(bus)) != BCME_OK) { in dhdpcie_bus_download_fw_signature()
10704 if ((bcmerror = dhdpcie_bus_write_fws_mem_info(bus)) != BCME_OK) { in dhdpcie_bus_download_fw_signature()
10711 if ((bcmerror = dhdpcie_download_rtlv_end(bus)) != BCME_OK) { in dhdpcie_bus_download_fw_signature()
10718 if (bus->bootloader_filename[0] != 0) { in dhdpcie_bus_download_fw_signature()
10730 dhdpcie_download_rtlv(dhd_bus_t *bus, dngl_rtlv_type_t type, dngl_rtlv_len_t len, uint8 *value) in dhdpcie_download_rtlv() argument
10743 dest_addr = bus->ramtop_addr - sizeof(dngl_rtlv_type_t) - sizeof(dngl_rtlv_len_t) in dhdpcie_download_rtlv()
10745 bus->ramtop_addr = dest_addr; in dhdpcie_download_rtlv()
10759 bcmerror = dhdpcie_bus_membytes(bus, TRUE, dest_addr, value, dest_size); in dhdpcie_download_rtlv()
10768 bcmerror = dhdpcie_bus_membytes(bus, TRUE, dest_addr + dest_size, in dhdpcie_download_rtlv()
10772 bcmerror = dhdpcie_bus_membytes(bus, TRUE, in dhdpcie_download_rtlv()
10779 readback_buf = (uint8*)MALLOC(bus->dhd->osh, dest_size); in dhdpcie_download_rtlv()
10785 bcmerror = dhdpcie_bus_membytes(bus, FALSE, dest_addr, readback_buf, dest_size); in dhdpcie_download_rtlv()
10802 bcmerror = dhdpcie_bus_membytes(bus, FALSE, dest_addr + dest_size, in dhdpcie_download_rtlv()
10815 bcmerror = dhdpcie_bus_membytes(bus, FALSE, in dhdpcie_download_rtlv()
10829 bus->ramtop_addr = dest_addr; in dhdpcie_download_rtlv()
10834 MFREE(bus->dhd->osh, readback_buf, dest_size); in dhdpcie_download_rtlv()
10843 dhdpcie_download_rtlv_end(dhd_bus_t *bus) in dhdpcie_download_rtlv_end() argument
10845 return dhdpcie_download_rtlv(bus, DNGL_RTLV_TYPE_END_MARKER, 0, NULL); in dhdpcie_download_rtlv_end()
10850 dhdpcie_bus_write_fws_status(dhd_bus_t *bus) in dhdpcie_bus_write_fws_status() argument
10857 ret = dhdpcie_download_rtlv(bus, DNGL_RTLV_TYPE_FWSIGN_STATUS, sizeof(vstatus), in dhdpcie_bus_write_fws_status()
10859 bus->fwstat_download_addr = bus->ramtop_addr; in dhdpcie_bus_write_fws_status()
10860 bus->fwstat_download_len = sizeof(vstatus); in dhdpcie_bus_write_fws_status()
10867 dhdpcie_bus_write_fws_mem_info(dhd_bus_t *bus) in dhdpcie_bus_write_fws_mem_info() argument
10873 memmap.firmware.start = bus->fw_download_addr; in dhdpcie_bus_write_fws_mem_info()
10874 memmap.firmware.end = memmap.firmware.start + bus->fw_download_len; in dhdpcie_bus_write_fws_mem_info()
10877 memmap.signature.start = bus->fwsig_download_addr; in dhdpcie_bus_write_fws_mem_info()
10878 memmap.signature.end = memmap.signature.start + bus->fwsig_download_len; in dhdpcie_bus_write_fws_mem_info()
10879 memmap.vstatus.start = bus->fwstat_download_addr; in dhdpcie_bus_write_fws_mem_info()
10880 memmap.vstatus.end = memmap.vstatus.start + bus->fwstat_download_len; in dhdpcie_bus_write_fws_mem_info()
10889 ret = dhdpcie_download_rtlv(bus, DNGL_RTLV_TYPE_FWSIGN_MEM_MAP, sizeof(memmap), in dhdpcie_bus_write_fws_mem_info()
10891 bus->fw_memmap_download_addr = bus->ramtop_addr; in dhdpcie_bus_write_fws_mem_info()
10892 bus->fw_memmap_download_len = sizeof(memmap); in dhdpcie_bus_write_fws_mem_info()
10899 dhdpcie_bus_download_ram_bootloader(dhd_bus_t *bus) in dhdpcie_bus_download_ram_bootloader() argument
10905 bus->bootloader_filename, bus->bootloader_addr, bus->ramtop_addr)); in dhdpcie_bus_download_ram_bootloader()
10906 if (bus->bootloader_filename[0] == '\0') { in dhdpcie_bus_download_ram_bootloader()
10911 dongle_ram_base_save = bus->dongle_ram_base; in dhdpcie_bus_download_ram_bootloader()
10914 bus->dongle_ram_base = bus->bootloader_addr; in dhdpcie_bus_download_ram_bootloader()
10917 ret = dhdpcie_download_code_file(bus, bus->bootloader_filename); in dhdpcie_bus_download_ram_bootloader()
10920 bus->dongle_ram_base = dongle_ram_base_save; in dhdpcie_bus_download_ram_bootloader()
10927 dhdpcie_bus_save_download_info(dhd_bus_t *bus, uint32 download_addr, in dhdpcie_bus_save_download_info() argument
10931 bus->fw_download_len = download_size; in dhdpcie_bus_save_download_info()
10932 bus->fw_download_addr = download_addr; in dhdpcie_bus_save_download_info()
10933 strlcpy(bus->fwsig_filename, signature_fname, sizeof(bus->fwsig_filename)); in dhdpcie_bus_save_download_info()
10934 strlcpy(bus->bootloader_filename, bloader_fname, sizeof(bus->bootloader_filename)); in dhdpcie_bus_save_download_info()
10935 bus->bootloader_addr = bloader_download_addr; in dhdpcie_bus_save_download_info()
10944 bus->gdb_proxy_bootloader_mode = in dhdpcie_bus_save_download_info()
10945 (bus->fwsig_filename[0] != 0) && (bus->bootloader_filename[0] == 0); in dhdpcie_bus_save_download_info()
10952 dhdpcie_download_sig_file(dhd_bus_t *bus, char *path, uint32 type) in dhdpcie_download_sig_file() argument
10968 filep = dhd_os_open_image1(bus->dhd, path); in dhdpcie_download_sig_file()
10983 srcbuf = (uint8 *)MALLOCZ(bus->dhd->osh, dest_size); in dhdpcie_download_sig_file()
10996 bcmerror = dhdpcie_download_rtlv(bus, type, dest_size, srcbuf); in dhdpcie_download_sig_file()
10998 bus->fwsig_download_addr = bus->ramtop_addr; in dhdpcie_download_sig_file()
10999 bus->fwsig_download_len = dest_size; in dhdpcie_download_sig_file()
11003 dhd_os_close_image1(bus->dhd, filep); in dhdpcie_download_sig_file()
11006 MFREE(bus->dhd->osh, srcbuf, dest_size); in dhdpcie_download_sig_file()
11013 dhdpcie_bus_write_fwsig(dhd_bus_t *bus, char *fwsig_path, char *nvsig_path) in dhdpcie_bus_write_fwsig() argument
11018 bcmerror = dhdpcie_download_sig_file(bus, fwsig_path, DNGL_RTLV_TYPE_FW_SIGNATURE); in dhdpcie_bus_write_fwsig()
11032 dhd_bus_dump_fws(dhd_bus_t *bus, struct bcmstrbuf *strbuf) in dhd_bus_dump_fws() argument
11039 if (bus->fwstat_download_addr != 0) { in dhd_bus_dump_fws()
11040 err = dhdpcie_bus_membytes(bus, FALSE, bus->fwstat_download_addr, in dhd_bus_dump_fws()
11044 __FUNCTION__, err, sizeof(status), bus->fwstat_download_addr)); in dhd_bus_dump_fws()
11050 if (bus->fw_memmap_download_addr != 0) { in dhd_bus_dump_fws()
11051 err = dhdpcie_bus_membytes(bus, FALSE, bus->fw_memmap_download_addr, in dhd_bus_dump_fws()
11055 __FUNCTION__, err, sizeof(meminfo), bus->fw_memmap_download_addr)); in dhd_bus_dump_fws()
11061 bus->fwsig_download_addr, bus->fwsig_download_len); in dhd_bus_dump_fws()
11075 bus->fwstat_download_addr, in dhd_bus_dump_fws()
11090 bus->fw_memmap_download_addr, in dhd_bus_dump_fws()
11102 dhdpcie_bus_write_vars(dhd_bus_t *bus) in dhdpcie_bus_write_vars() argument
11114 varsize = bus->varsz ? ROUNDUP(bus->varsz, 4) : 0; in dhdpcie_bus_write_vars()
11115 varaddr = (bus->ramsize - 4) - varsize; in dhdpcie_bus_write_vars()
11117 varaddr += bus->dongle_ram_base; in dhdpcie_bus_write_vars()
11118 bus->ramtop_addr = varaddr; in dhdpcie_bus_write_vars()
11120 if (bus->vars) { in dhdpcie_bus_write_vars()
11123 vbuffer = (uint8 *)MALLOC(bus->dhd->osh, varsize); in dhdpcie_bus_write_vars()
11128 bcopy(bus->vars, vbuffer, bus->varsz); in dhdpcie_bus_write_vars()
11130 bcmerror = dhdpcie_bus_membytes(bus, TRUE, varaddr, vbuffer, varsize); in dhdpcie_bus_write_vars()
11136 nvram_ularray = (uint8*)MALLOC(bus->dhd->osh, varsize); in dhdpcie_bus_write_vars()
11138 MFREE(bus->dhd->osh, vbuffer, varsize); in dhdpcie_bus_write_vars()
11146 bcmerror = dhdpcie_bus_membytes(bus, FALSE, varaddr, nvram_ularray, varsize); in dhdpcie_bus_write_vars()
11157 MFREE(bus->dhd->osh, nvram_ularray, varsize); in dhdpcie_bus_write_vars()
11158 MFREE(bus->dhd->osh, vbuffer, varsize); in dhdpcie_bus_write_vars()
11164 MFREE(bus->dhd->osh, nvram_ularray, varsize); in dhdpcie_bus_write_vars()
11167 MFREE(bus->dhd->osh, vbuffer, varsize); in dhdpcie_bus_write_vars()
11170 phys_size = REMAP_ENAB(bus) ? bus->ramsize : bus->orig_ramsize; in dhdpcie_bus_write_vars()
11172 phys_size += bus->dongle_ram_base; in dhdpcie_bus_write_vars()
11176 phys_size, bus->ramsize)); in dhdpcie_bus_write_vars()
11187 bus->nvram_csm = varsizew; in dhdpcie_bus_write_vars()
11191 bus->nvram_csm = varsizew; in dhdpcie_bus_write_vars()
11198 bcmerror = dhdpcie_bus_membytes(bus, TRUE, (phys_size - 4), in dhdpcie_bus_write_vars()
11205 dhdpcie_downloadvars(dhd_bus_t *bus, void *arg, int len) in dhdpcie_downloadvars() argument
11225 if (bus->vars) in dhdpcie_downloadvars()
11226 MFREE(bus->dhd->osh, bus->vars, bus->varsz); in dhdpcie_downloadvars()
11228 if (bus->dhd->gdb_proxy_nodeadman) { in dhdpcie_downloadvars()
11233 bus->vars = MALLOC(bus->dhd->osh, len); in dhdpcie_downloadvars()
11234 bus->varsz = bus->vars ? len : 0; in dhdpcie_downloadvars()
11235 if (bus->vars == NULL) { in dhdpcie_downloadvars()
11241 bcopy(arg, bus->vars, bus->varsz); in dhdpcie_downloadvars()
11243 if (bus->dhd->gdb_proxy_nodeadman && in dhdpcie_downloadvars()
11244 !replace_nvram_variable(bus->vars, bus->varsz, nodeadman_record, NULL)) in dhdpcie_downloadvars()
11253 dhdpcie_htclkratio_recal(bus, bus->vars, bus->varsz); in dhdpcie_downloadvars()
11258 if (dhd_bus_get_fw_mode(bus->dhd) == DHD_FLAG_MFG_MODE) { in dhdpcie_downloadvars()
11266 sp = strnstr(bus->vars, tag[i], bus->varsz); in dhdpcie_downloadvars()
11269 __FUNCTION__, bus->nv_path)); in dhdpcie_downloadvars()
11298 if (dhd_bus_get_fw_mode(bus->dhd) != DHD_FLAG_MFG_MODE) in dhdpcie_downloadvars()
11302 tmpbuf = MALLOCZ(bus->dhd->osh, bus->varsz + 1); in dhdpcie_downloadvars()
11306 memcpy(tmpbuf, bus->vars, bus->varsz); in dhdpcie_downloadvars()
11307 for (tmpidx = 0; tmpidx < bus->varsz; tmpidx++) { in dhdpcie_downloadvars()
11312 bus->dhd->vars_ccode[0] = 0; in dhdpcie_downloadvars()
11313 bus->dhd->vars_regrev = 0; in dhdpcie_downloadvars()
11315 sscanf(pos, "ccode=%3s\n", bus->dhd->vars_ccode); in dhdpcie_downloadvars()
11318 sscanf(pos, "regrev=%u\n", &(bus->dhd->vars_regrev)); in dhdpcie_downloadvars()
11320 MFREE(bus->dhd->osh, tmpbuf, bus->varsz + 1); in dhdpcie_downloadvars()
11418 dhdpcie_pme_stat_clear(dhd_bus_t *bus) in dhdpcie_pme_stat_clear() argument
11420 uint32 pmcsr = dhd_pcie_config_read(bus, PCIE_CFG_PMCSR, sizeof(uint32)); in dhdpcie_pme_stat_clear()
11422 OSL_PCI_WRITE_CONFIG(bus->osh, PCIE_CFG_PMCSR, sizeof(uint32), pmcsr | PCIE_PMCSR_PMESTAT); in dhdpcie_pme_stat_clear()
11460 dhdpcie_set_pmu_min_res_mask(struct dhd_bus *bus, uint min_res_mask) in dhdpcie_set_pmu_min_res_mask() argument
11462 si_pmu_set_min_res_mask(bus->sih, bus->osh, min_res_mask); in dhdpcie_set_pmu_min_res_mask()
11500 dhd_bus_t *bus; in dhd_dump_intr_counters() local
11508 bus = dhd->bus; in dhd_dump_intr_counters()
11509 if (!bus) { in dhd_dump_intr_counters()
11510 DHD_ERROR(("%s: bus is NULL\n", __FUNCTION__)); in dhd_dump_intr_counters()
11518 bus->resume_intr_enable_count, bus->dpc_intr_enable_count, in dhd_dump_intr_counters()
11519 bus->isr_intr_disable_count, bus->suspend_intr_disable_count, in dhd_dump_intr_counters()
11520 bus->dpc_return_busdown_count, bus->non_ours_irq_count); in dhd_dump_intr_counters()
11527 bus->oob_intr_count, bus->oob_intr_enable_count, in dhd_dump_intr_counters()
11528 bus->oob_intr_disable_count, dhdpcie_get_oob_irq_num(bus), in dhd_dump_intr_counters()
11529 GET_SEC_USEC(bus->last_oob_irq_isr_time), in dhd_dump_intr_counters()
11530 GET_SEC_USEC(bus->last_oob_irq_thr_time), in dhd_dump_intr_counters()
11531 GET_SEC_USEC(bus->last_oob_irq_enable_time), in dhd_dump_intr_counters()
11532 GET_SEC_USEC(bus->last_oob_irq_disable_time), dhdpcie_get_oob_irq_status(bus), in dhd_dump_intr_counters()
11544 GET_SEC_USEC(current_time), GET_SEC_USEC(bus->isr_entry_time), in dhd_dump_intr_counters()
11545 GET_SEC_USEC(bus->isr_exit_time), GET_SEC_USEC(bus->isr_sched_dpc_time), in dhd_dump_intr_counters()
11546 GET_SEC_USEC(bus->rpm_sched_dpc_time), in dhd_dump_intr_counters()
11547 GET_SEC_USEC(bus->last_non_ours_irq_time), GET_SEC_USEC(bus->dpc_entry_time), in dhd_dump_intr_counters()
11548 GET_SEC_USEC(bus->last_process_ctrlbuf_time), in dhd_dump_intr_counters()
11549 GET_SEC_USEC(bus->last_process_flowring_time), in dhd_dump_intr_counters()
11550 GET_SEC_USEC(bus->last_process_txcpl_time), in dhd_dump_intr_counters()
11551 GET_SEC_USEC(bus->last_process_rxcpl_time), in dhd_dump_intr_counters()
11552 GET_SEC_USEC(bus->last_process_infocpl_time), in dhd_dump_intr_counters()
11553 GET_SEC_USEC(bus->last_process_edl_time), in dhd_dump_intr_counters()
11554 GET_SEC_USEC(bus->dpc_exit_time), GET_SEC_USEC(bus->resched_dpc_time), in dhd_dump_intr_counters()
11555 GET_SEC_USEC(bus->last_d3_inform_time)); in dhd_dump_intr_counters()
11559 SEC_USEC_FMT"\n", GET_SEC_USEC(bus->last_suspend_start_time), in dhd_dump_intr_counters()
11560 GET_SEC_USEC(bus->last_suspend_end_time), in dhd_dump_intr_counters()
11561 GET_SEC_USEC(bus->last_resume_start_time), in dhd_dump_intr_counters()
11562 GET_SEC_USEC(bus->last_resume_end_time)); in dhd_dump_intr_counters()
11585 intstatus = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_dump_intr_registers()
11586 dhd->bus->pcie_mailbox_int, 0, 0); in dhd_dump_intr_registers()
11588 dhd_bus_mmio_trace(dhd->bus, dhd->bus->pcie_mailbox_int, intstatus, FALSE); in dhd_dump_intr_registers()
11590 intmask = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_dump_intr_registers()
11591 dhd->bus->pcie_mailbox_mask, 0, 0); in dhd_dump_intr_registers()
11593 dhd_bus_mmio_trace(dhd->bus, dhd->bus->pcie_mailbox_mask, intmask, FALSE); in dhd_dump_intr_registers()
11595 d2h_db0 = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, PCID2H_MailBox, 0, 0); in dhd_dump_intr_registers()
11596 dhd_bus_cmn_readshared(dhd->bus, &d2h_mb_data, D2H_MB_DATA, 0); in dhd_dump_intr_registers()
11601 d2h_mb_data, dhd->bus->def_intmask); in dhd_dump_intr_registers()
11646 /** Add bus dump output to a buffer */
11665 dhd_bus_dump_fws(dhdp->bus, strbuf); in dhd_bus_dump()
11677 bcmpcie_get_total_wake(dhdp->bus), dhdp->bus->wake_counts.rxwake, in dhd_bus_dump()
11678 dhdp->bus->wake_counts.rcwake); in dhd_bus_dump()
11681 dhdp->bus->wake_counts.rx_ucast, dhdp->bus->wake_counts.rx_mcast, in dhd_bus_dump()
11682 dhdp->bus->wake_counts.rx_bcast, dhdp->bus->wake_counts.rx_arp); in dhd_bus_dump()
11684 dhdp->bus->wake_counts.rx_multi_ipv4, dhdp->bus->wake_counts.rx_multi_ipv6, in dhd_bus_dump()
11685 dhdp->bus->wake_counts.rx_icmpv6, dhdp->bus->wake_counts.rx_multi_other); in dhd_bus_dump()
11687 dhdp->bus->wake_counts.rx_icmpv6_ra, dhdp->bus->wake_counts.rx_icmpv6_na, in dhd_bus_dump()
11688 dhdp->bus->wake_counts.rx_icmpv6_ns); in dhd_bus_dump()
11692 if (dhdp->bus->wake_counts.rc_event[flowid] != 0) in dhd_bus_dump()
11694 dhdp->bus->wake_counts.rc_event[flowid]); in dhd_bus_dump()
11703 dhdp->bus->h2d_mb_data_ptr_addr, dhdp->bus->d2h_mb_data_ptr_addr); in dhd_bus_dump()
11856 bcm_bprintf(strbuf, "D3 inform cnt %d\n", dhdp->bus->d3_inform_cnt); in dhd_bus_dump()
11857 bcm_bprintf(strbuf, "D0 inform cnt %d\n", dhdp->bus->d0_inform_cnt); in dhd_bus_dump()
11858 bcm_bprintf(strbuf, "D0 inform in use cnt %d\n", dhdp->bus->d0_inform_in_use_cnt); in dhd_bus_dump()
11860 bcm_bprintf(strbuf, "hostready count:%d\n", dhdp->bus->hostready_count); in dhd_bus_dump()
11864 if (INBAND_DW_ENAB(dhdp->bus)) { in dhd_bus_dump()
11866 dhdp->bus->inband_dw_assert_cnt); in dhd_bus_dump()
11868 dhdp->bus->inband_dw_deassert_cnt); in dhd_bus_dump()
11870 dhdp->bus->inband_ds_exit_host_cnt); in dhd_bus_dump()
11872 dhdp->bus->inband_ds_exit_device_cnt); in dhd_bus_dump()
11874 dhdp->bus->inband_ds_exit_to_cnt); in dhd_bus_dump()
11876 dhdp->bus->inband_host_sleep_exit_to_cnt); in dhd_bus_dump()
11880 dhdp->bus->d2h_intr_method ? "PCIE_MSI" : "PCIE_INTX", in dhd_bus_dump()
11881 dhdp->bus->d2h_intr_control ? "HOST_IRQ" : "D2H_INTMASK"); in dhd_bus_dump()
11897 uint32 axi_tcm_addr = dhdpcie_bus_rtcm32(dhdp->bus, dhdp->axierror_logbuf_addr); in dhd_axi_sig_match()
11905 __FUNCTION__, axi_tcm_addr, dhdp->bus->dongle_ram_base, in dhd_axi_sig_match()
11906 dhdp->bus->dongle_ram_base + dhdp->bus->ramsize)); in dhd_axi_sig_match()
11907 if (axi_tcm_addr >= dhdp->bus->dongle_ram_base && in dhd_axi_sig_match()
11908 axi_tcm_addr < dhdp->bus->dongle_ram_base + dhdp->bus->ramsize) { in dhd_axi_sig_match()
11909 uint32 axi_signature = dhdpcie_bus_rtcm32(dhdp->bus, (axi_tcm_addr + in dhd_axi_sig_match()
11959 axi_tcm_addr = dhdpcie_bus_rtcm32(dhdp->bus, axi_logbuf_addr); in dhd_axi_error()
11968 err = dhdpcie_bus_membytes(dhdp->bus, FALSE, axi_tcm_addr, p_axi_err, size); in dhd_axi_error()
12062 struct dhd_bus *bus = dhd->bus; in dhd_update_txflowrings() local
12070 DHD_FLOWRING_LIST_LOCK(bus->dhd->flowring_list_lock, flags); in dhd_update_txflowrings()
12071 for (item = dll_head_p(&bus->flowring_active_list); in dhd_update_txflowrings()
12072 (!dhd_is_device_removed(dhd) && !dll_end(&bus->flowring_active_list, item)); in dhd_update_txflowrings()
12078 if (count > bus->max_tx_flowrings) { in dhd_update_txflowrings()
12098 DHD_FLOWRING_LIST_UNLOCK(bus->dhd->flowring_list_lock, flags); in dhd_update_txflowrings()
12103 dhd_bus_gen_devmb_intr(struct dhd_bus *bus) in dhd_bus_gen_devmb_intr() argument
12105 if ((bus->sih->buscorerev == 2) || (bus->sih->buscorerev == 6) || in dhd_bus_gen_devmb_intr()
12106 (bus->sih->buscorerev == 4)) { in dhd_bus_gen_devmb_intr()
12110 if (bus->db1_for_mb) { in dhd_bus_gen_devmb_intr()
12114 if (DAR_PWRREQ(bus)) { in dhd_bus_gen_devmb_intr()
12115 dhd_bus_pcie_pwr_req(bus); in dhd_bus_gen_devmb_intr()
12118 dhd_bus_mmio_trace(bus, dhd_bus_db1_addr_get(bus), 0x2, TRUE); in dhd_bus_gen_devmb_intr()
12120 si_corereg(bus->sih, bus->sih->buscoreidx, dhd_bus_db1_addr_get(bus), in dhd_bus_gen_devmb_intr()
12125 dhdpcie_bus_cfg_write_dword(bus, PCISBMbx, 4, (1 << 0)); in dhd_bus_gen_devmb_intr()
12127 dhdpcie_bus_cfg_write_dword(bus, PCISBMbx, 4, (1 << 0)); in dhd_bus_gen_devmb_intr()
12136 dhdpcie_fw_trap(dhd_bus_t *bus) in dhdpcie_fw_trap() argument
12139 if (bus->dhd->db7_trap.fw_db7w_trap) { in dhdpcie_fw_trap()
12140 uint32 addr = dhd_bus_db1_addr_3_get(bus); in dhdpcie_fw_trap()
12141 bus->dhd->db7_trap.debug_db7_send_time = OSL_LOCALTIME_NS(); in dhdpcie_fw_trap()
12142 bus->dhd->db7_trap.debug_db7_send_cnt++; in dhdpcie_fw_trap()
12143 si_corereg(bus->sih, bus->sih->buscoreidx, addr, ~0, in dhdpcie_fw_trap()
12144 bus->dhd->db7_trap.db7_magic_number); in dhdpcie_fw_trap()
12149 dhdpcie_send_mb_data(bus, H2D_FW_TRAP); in dhdpcie_fw_trap()
12151 (void)dhd_wl_ioctl_set_intiovar(bus->dhd, "bus:disconnect", 99, WLC_SET_VAR, TRUE, 0); in dhdpcie_fw_trap()
12157 dhd_bus_inb_ack_pending_ds_req(dhd_bus_t *bus) in dhd_bus_inb_ack_pending_ds_req() argument
12162 if ((dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhd_bus_inb_ack_pending_ds_req()
12164 (bus->host_active_cnt == 0)) { in dhd_bus_inb_ack_pending_ds_req()
12165 dhdpcie_bus_set_pcie_inband_dw_state(bus, DW_DEVICE_DS_DEV_SLEEP); in dhd_bus_inb_ack_pending_ds_req()
12166 dhdpcie_send_mb_data(bus, H2D_HOST_DS_ACK); in dhd_bus_inb_ack_pending_ds_req()
12171 dhd_bus_inb_set_device_wake(struct dhd_bus *bus, bool val) in dhd_bus_inb_set_device_wake() argument
12177 if (!INBAND_DW_ENAB(bus)) { in dhd_bus_inb_set_device_wake()
12181 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhd_bus_inb_set_device_wake()
12188 dhd_bus_doorbell_timeout_reset(bus); in dhd_bus_inb_set_device_wake()
12190 if (dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhd_bus_inb_set_device_wake()
12193 bus->wait_for_ds_exit = 0; in dhd_bus_inb_set_device_wake()
12194 if (bus->calc_ds_exit_latency) { in dhd_bus_inb_set_device_wake()
12195 bus->ds_exit_latency = 0; in dhd_bus_inb_set_device_wake()
12196 bus->ds_exit_ts2 = 0; in dhd_bus_inb_set_device_wake()
12197 bus->ds_exit_ts1 = OSL_SYSUPTIME_US(); in dhd_bus_inb_set_device_wake()
12199 ret = dhdpcie_send_mb_data(bus, H2DMB_DS_DEVICE_WAKE_ASSERT); in dhd_bus_inb_set_device_wake()
12202 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_inb_set_device_wake()
12206 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhd_bus_inb_set_device_wake()
12208 bus->inband_dw_assert_cnt++; in dhd_bus_inb_set_device_wake()
12209 } else if (dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhd_bus_inb_set_device_wake()
12216 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_inb_set_device_wake()
12240 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhd_bus_inb_set_device_wake()
12242 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_inb_set_device_wake()
12246 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_inb_set_device_wake()
12248 timeleft = dhd_os_ds_exit_wait(bus->dhd, &bus->wait_for_ds_exit); in dhd_bus_inb_set_device_wake()
12249 if (!bus->wait_for_ds_exit || timeleft == 0) { in dhd_bus_inb_set_device_wake()
12251 "wait_for_ds_exit : %d\n", bus->wait_for_ds_exit)); in dhd_bus_inb_set_device_wake()
12252 bus->inband_ds_exit_to_cnt++; in dhd_bus_inb_set_device_wake()
12253 bus->ds_exit_timeout = 0; in dhd_bus_inb_set_device_wake()
12255 if (bus->dhd->memdump_enabled) { in dhd_bus_inb_set_device_wake()
12257 DHD_GENERAL_LOCK(bus->dhd, flags); in dhd_bus_inb_set_device_wake()
12258 DHD_BUS_BUSY_CLEAR_RPM_SUSPEND_IN_PROGRESS(bus->dhd); in dhd_bus_inb_set_device_wake()
12259 DHD_GENERAL_UNLOCK(bus->dhd, flags); in dhd_bus_inb_set_device_wake()
12260 bus->dhd->memdump_type = in dhd_bus_inb_set_device_wake()
12262 dhd_bus_mem_dump(bus->dhd); in dhd_bus_inb_set_device_wake()
12273 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhd_bus_inb_set_device_wake()
12274 if ((dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhd_bus_inb_set_device_wake()
12276 ret = dhdpcie_send_mb_data(bus, H2DMB_DS_DEVICE_WAKE_DEASSERT); in dhd_bus_inb_set_device_wake()
12279 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_inb_set_device_wake()
12282 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhd_bus_inb_set_device_wake()
12284 bus->inband_dw_deassert_cnt++; in dhd_bus_inb_set_device_wake()
12285 } else if ((dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhd_bus_inb_set_device_wake()
12287 (bus->host_active_cnt == 0)) { in dhd_bus_inb_set_device_wake()
12288 dhdpcie_bus_set_pcie_inband_dw_state(bus, DW_DEVICE_DS_DEV_SLEEP); in dhd_bus_inb_set_device_wake()
12289 dhdpcie_send_mb_data(bus, H2D_HOST_DS_ACK); in dhd_bus_inb_set_device_wake()
12293 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_inb_set_device_wake()
12302 dhd_bus_doorbell_timeout_reset(struct dhd_bus *bus) in dhd_bus_doorbell_timeout_reset() argument
12307 dhd_timeout_start(&bus->doorbell_timer, in dhd_bus_doorbell_timeout_reset()
12317 dhd_timeout_start(&bus->doorbell_timer, in dhd_bus_doorbell_timeout_reset()
12322 else if (!(bus->dhd->busstate == DHD_BUS_SUSPEND)) { in dhd_bus_doorbell_timeout_reset()
12323 dhd_bus_set_device_wake(bus, FALSE); in dhd_bus_doorbell_timeout_reset()
12328 dhd_bus_set_device_wake(struct dhd_bus *bus, bool val) in dhd_bus_set_device_wake() argument
12330 if (bus->ds_enabled && bus->dhd->ring_attached) { in dhd_bus_set_device_wake()
12332 if (INBAND_DW_ENAB(bus)) { in dhd_bus_set_device_wake()
12333 return dhd_bus_inb_set_device_wake(bus, val); in dhd_bus_set_device_wake()
12337 if (OOB_DW_ENAB(bus)) { in dhd_bus_set_device_wake()
12338 return dhd_os_oob_set_device_wake(bus, val); in dhd_bus_set_device_wake()
12348 dhd_bus_t *bus = dhd->bus; in dhd_bus_dw_deassert() local
12351 if (dhd_query_bus_erros(bus->dhd)) { in dhd_bus_dw_deassert()
12356 if (dhd_doorbell_timeout != 0 && bus->dhd->busstate == DHD_BUS_DATA && in dhd_bus_dw_deassert()
12357 dhd_timeout_expired(&bus->doorbell_timer) && in dhd_bus_dw_deassert()
12358 !dhd_query_bus_erros(bus->dhd)) { in dhd_bus_dw_deassert()
12364 dhd_bus_set_device_wake(bus, FALSE); in dhd_bus_dw_deassert()
12367 dhd_os_busbusy_wake(bus->dhd); in dhd_bus_dw_deassert()
12375 if (INBAND_DW_ENAB(bus)) { in dhd_bus_dw_deassert()
12376 if (bus->ds_exit_timeout) { in dhd_bus_dw_deassert()
12377 bus->ds_exit_timeout --; in dhd_bus_dw_deassert()
12378 if (bus->ds_exit_timeout == 1) { in dhd_bus_dw_deassert()
12380 bus->ds_exit_timeout = 0; in dhd_bus_dw_deassert()
12381 bus->inband_ds_exit_to_cnt++; in dhd_bus_dw_deassert()
12384 if (bus->host_sleep_exit_timeout) { in dhd_bus_dw_deassert()
12385 bus->host_sleep_exit_timeout --; in dhd_bus_dw_deassert()
12386 if (bus->host_sleep_exit_timeout == 1) { in dhd_bus_dw_deassert()
12388 bus->host_sleep_exit_timeout = 0; in dhd_bus_dw_deassert()
12389 bus->inband_host_sleep_exit_to_cnt++; in dhd_bus_dw_deassert()
12399 dhd_bus_ringbell(struct dhd_bus *bus, uint32 value) in dhd_bus_ringbell() argument
12401 /* Skip once bus enters low power state (D3_INFORM/D3_ACK) */ in dhd_bus_ringbell()
12402 if (__DHD_CHK_BUS_IN_LPS(bus)) { in dhd_bus_ringbell()
12404 __FUNCTION__, bus->bus_low_power_state)); in dhd_bus_ringbell()
12409 if (bus->is_linkdown) { in dhd_bus_ringbell()
12414 if ((bus->sih->buscorerev == 2) || (bus->sih->buscorerev == 6) || in dhd_bus_ringbell()
12415 (bus->sih->buscorerev == 4)) { in dhd_bus_ringbell()
12416 si_corereg(bus->sih, bus->sih->buscoreidx, bus->pcie_mailbox_int, in dhd_bus_ringbell()
12422 if (IDMA_ACTIVE(bus->dhd)) { in dhd_bus_ringbell()
12423 if (DAR_PWRREQ(bus)) { in dhd_bus_ringbell()
12424 dhd_bus_pcie_pwr_req(bus); in dhd_bus_ringbell()
12426 si_corereg(bus->sih, bus->sih->buscoreidx, dhd_bus_db0_addr_2_get(bus), in dhd_bus_ringbell()
12429 if (DAR_PWRREQ(bus)) { in dhd_bus_ringbell()
12430 dhd_bus_pcie_pwr_req(bus); in dhd_bus_ringbell()
12432 si_corereg(bus->sih, bus->sih->buscoreidx, in dhd_bus_ringbell()
12433 dhd_bus_db0_addr_get(bus), ~0, 0x12345678); in dhd_bus_ringbell()
12440 dhd_bus_ringbell_2(struct dhd_bus *bus, uint32 value, bool devwake) in dhd_bus_ringbell_2() argument
12444 /* Skip once bus enters low power state (D3_INFORM/D3_ACK) */ in dhd_bus_ringbell_2()
12445 if (__DHD_CHK_BUS_IN_LPS(bus)) { in dhd_bus_ringbell_2()
12447 __FUNCTION__, bus->bus_low_power_state)); in dhd_bus_ringbell_2()
12452 if (bus->is_linkdown) { in dhd_bus_ringbell_2()
12458 if (DAR_PWRREQ(bus)) { in dhd_bus_ringbell_2()
12459 dhd_bus_pcie_pwr_req(bus); in dhd_bus_ringbell_2()
12461 si_corereg(bus->sih, bus->sih->buscoreidx, dhd_bus_db0_addr_2_get(bus), in dhd_bus_ringbell_2()
12466 dhdpcie_bus_ringbell_fast(struct dhd_bus *bus, uint32 value) in dhdpcie_bus_ringbell_fast() argument
12468 /* Skip once bus enters low power state (D3_INFORM/D3_ACK) */ in dhdpcie_bus_ringbell_fast()
12469 if (__DHD_CHK_BUS_IN_LPS(bus)) { in dhdpcie_bus_ringbell_fast()
12471 __FUNCTION__, bus->bus_low_power_state)); in dhdpcie_bus_ringbell_fast()
12476 if (bus->is_linkdown) { in dhdpcie_bus_ringbell_fast()
12482 if (OOB_DW_ENAB(bus)) { in dhdpcie_bus_ringbell_fast()
12483 dhd_bus_set_device_wake(bus, TRUE); in dhdpcie_bus_ringbell_fast()
12485 dhd_bus_doorbell_timeout_reset(bus); in dhdpcie_bus_ringbell_fast()
12488 dhd_bus_mmio_trace(bus, dhd_bus_db0_addr_get(bus), value, in dhdpcie_bus_ringbell_fast()
12491 if (DAR_PWRREQ(bus)) { in dhdpcie_bus_ringbell_fast()
12492 dhd_bus_pcie_pwr_req(bus); in dhdpcie_bus_ringbell_fast()
12496 if (bus->dhd->db0ts_capable) { in dhdpcie_bus_ringbell_fast()
12506 W_REG(bus->pcie_mb_intr_osh, bus->pcie_mb_intr_addr, value); in dhdpcie_bus_ringbell_fast()
12510 dhdpcie_bus_ringbell_2_fast(struct dhd_bus *bus, uint32 value, bool devwake) in dhdpcie_bus_ringbell_2_fast() argument
12512 /* Skip once bus enters low power state (D3_INFORM/D3_ACK) */ in dhdpcie_bus_ringbell_2_fast()
12513 if (__DHD_CHK_BUS_IN_LPS(bus)) { in dhdpcie_bus_ringbell_2_fast()
12515 __FUNCTION__, bus->bus_low_power_state)); in dhdpcie_bus_ringbell_2_fast()
12520 if (bus->is_linkdown) { in dhdpcie_bus_ringbell_2_fast()
12527 if (OOB_DW_ENAB(bus)) { in dhdpcie_bus_ringbell_2_fast()
12528 dhd_bus_set_device_wake(bus, TRUE); in dhdpcie_bus_ringbell_2_fast()
12531 dhd_bus_doorbell_timeout_reset(bus); in dhdpcie_bus_ringbell_2_fast()
12535 dhd_bus_mmio_trace(bus, dhd_bus_db0_addr_2_get(bus), value, TRUE); in dhdpcie_bus_ringbell_2_fast()
12537 if (DAR_PWRREQ(bus)) { in dhdpcie_bus_ringbell_2_fast()
12538 dhd_bus_pcie_pwr_req(bus); in dhdpcie_bus_ringbell_2_fast()
12540 W_REG(bus->pcie_mb_intr_osh, bus->pcie_mb_intr_2_addr, value); in dhdpcie_bus_ringbell_2_fast()
12544 dhd_bus_ringbell_oldpcie(struct dhd_bus *bus, uint32 value) in dhd_bus_ringbell_oldpcie() argument
12547 /* Skip once bus enters low power state (D3_INFORM/D3_ACK) */ in dhd_bus_ringbell_oldpcie()
12548 if (__DHD_CHK_BUS_IN_LPS(bus)) { in dhd_bus_ringbell_oldpcie()
12550 __FUNCTION__, bus->bus_low_power_state)); in dhd_bus_ringbell_oldpcie()
12555 if (bus->is_linkdown) { in dhd_bus_ringbell_oldpcie()
12560 w = (R_REG(bus->pcie_mb_intr_osh, bus->pcie_mb_intr_addr) & ~PCIE_INTB) | PCIE_INTB; in dhd_bus_ringbell_oldpcie()
12561 W_REG(bus->pcie_mb_intr_osh, bus->pcie_mb_intr_addr, w); in dhd_bus_ringbell_oldpcie()
12565 dhd_bus_get_mbintr_fn(struct dhd_bus *bus) in dhd_bus_get_mbintr_fn() argument
12567 if ((bus->sih->buscorerev == 2) || (bus->sih->buscorerev == 6) || in dhd_bus_get_mbintr_fn()
12568 (bus->sih->buscorerev == 4)) { in dhd_bus_get_mbintr_fn()
12569 bus->pcie_mb_intr_addr = si_corereg_addr(bus->sih, bus->sih->buscoreidx, in dhd_bus_get_mbintr_fn()
12570 bus->pcie_mailbox_int); in dhd_bus_get_mbintr_fn()
12571 if (bus->pcie_mb_intr_addr) { in dhd_bus_get_mbintr_fn()
12572 bus->pcie_mb_intr_osh = si_osh(bus->sih); in dhd_bus_get_mbintr_fn()
12576 bus->pcie_mb_intr_addr = si_corereg_addr(bus->sih, bus->sih->buscoreidx, in dhd_bus_get_mbintr_fn()
12577 dhd_bus_db0_addr_get(bus)); in dhd_bus_get_mbintr_fn()
12578 if (bus->pcie_mb_intr_addr) { in dhd_bus_get_mbintr_fn()
12579 bus->pcie_mb_intr_osh = si_osh(bus->sih); in dhd_bus_get_mbintr_fn()
12587 dhd_bus_get_mbintr_2_fn(struct dhd_bus *bus) in dhd_bus_get_mbintr_2_fn() argument
12589 bus->pcie_mb_intr_2_addr = si_corereg_addr(bus->sih, bus->sih->buscoreidx, in dhd_bus_get_mbintr_2_fn()
12590 dhd_bus_db0_addr_2_get(bus)); in dhd_bus_get_mbintr_2_fn()
12591 if (bus->pcie_mb_intr_2_addr) { in dhd_bus_get_mbintr_2_fn()
12592 bus->pcie_mb_intr_osh = si_osh(bus->sih); in dhd_bus_get_mbintr_2_fn()
12599 BCMFASTPATH(dhd_bus_dpc)(struct dhd_bus *bus) in BCMFASTPATH()
12606 bus->dpc_entry_time = OSL_LOCALTIME_NS(); in BCMFASTPATH()
12608 if (dhd_query_bus_erros(bus->dhd)) { in BCMFASTPATH()
12612 DHD_GENERAL_LOCK(bus->dhd, flags); in BCMFASTPATH()
12618 if (bus->dhd->busstate == DHD_BUS_DOWN) { in BCMFASTPATH()
12619 DHD_ERROR(("%s: Bus down, ret\n", __FUNCTION__)); in BCMFASTPATH()
12620 bus->intstatus = 0; in BCMFASTPATH()
12621 DHD_GENERAL_UNLOCK(bus->dhd, flags); in BCMFASTPATH()
12622 bus->dpc_return_busdown_count++; in BCMFASTPATH()
12626 bus->idlecount = 0; in BCMFASTPATH()
12628 DHD_BUS_BUSY_SET_IN_DPC(bus->dhd); in BCMFASTPATH()
12629 DHD_GENERAL_UNLOCK(bus->dhd, flags); in BCMFASTPATH()
12632 if (bus->ipend) { in BCMFASTPATH()
12633 bus->ipend = FALSE; in BCMFASTPATH()
12634 bus->intstatus = dhdpcie_bus_intstatus(bus); in BCMFASTPATH()
12636 if (bus->intstatus == 0) { in BCMFASTPATH()
12639 bus->intrcount++; in BCMFASTPATH()
12644 if (DHD_CHK_BUS_LPS_D3_ACKED(bus)) { in BCMFASTPATH()
12649 resched = dhdpcie_bus_process_mailbox_intr(bus, bus->intstatus); in BCMFASTPATH()
12651 bus->intstatus = 0; in BCMFASTPATH()
12655 if (bus->d2h_intr_control == PCIE_D2H_INTMASK_CTRL) { in BCMFASTPATH()
12656 dhdpcie_bus_intr_enable(bus); /* Enable back interrupt using Intmask!! */ in BCMFASTPATH()
12657 bus->dpc_intr_enable_count++; in BCMFASTPATH()
12662 if ((dhdpcie_irq_disabled(bus)) && (!dhd_query_bus_erros(bus->dhd))) { in BCMFASTPATH()
12663 dhdpcie_enable_irq(bus); /* Enable back interrupt!! */ in BCMFASTPATH()
12664 bus->dpc_intr_enable_count++; in BCMFASTPATH()
12667 bus->dpc_exit_time = OSL_LOCALTIME_NS(); in BCMFASTPATH()
12669 bus->resched_dpc_time = OSL_LOCALTIME_NS(); in BCMFASTPATH()
12672 bus->dpc_sched = resched; in BCMFASTPATH()
12674 if (bus->dhd->dma_h2d_ring_upd_support && bus->dhd->dma_d2h_ring_upd_support && in BCMFASTPATH()
12675 (bus->dhd->ring_attached == TRUE)) { in BCMFASTPATH()
12676 dhd_bus_flow_ring_status_dpc_trace(bus->dhd); in BCMFASTPATH()
12681 DHD_GENERAL_LOCK(bus->dhd, flags); in BCMFASTPATH()
12682 DHD_BUS_BUSY_CLEAR_IN_DPC(bus->dhd); in BCMFASTPATH()
12683 dhd_os_busbusy_wake(bus->dhd); in BCMFASTPATH()
12684 DHD_GENERAL_UNLOCK(bus->dhd, flags); in BCMFASTPATH()
12691 dhdpcie_send_mb_data(dhd_bus_t *bus, uint32 h2d_mb_data) in dhdpcie_send_mb_data() argument
12695 if (bus->is_linkdown) { in dhdpcie_send_mb_data()
12704 dhdpcie_set_dongle_deepsleep(bus, TRUE); in dhdpcie_send_mb_data()
12706 dhd_bus_ds_trace(bus, h2d_mb_data, FALSE, dhdpcie_bus_get_pcie_inband_dw_state(bus)); in dhdpcie_send_mb_data()
12708 dhd_bus_ds_trace(bus, h2d_mb_data, FALSE); in dhdpcie_send_mb_data()
12710 if (bus->api.fw_rev >= PCIE_SHARED_VERSION_6 && !bus->use_mailbox) { in dhdpcie_send_mb_data()
12715 bus->oob_enabled = FALSE; in dhdpcie_send_mb_data()
12718 if (dhd_prot_h2d_mbdata_send_ctrlmsg(bus->dhd, h2d_mb_data)) { in dhdpcie_send_mb_data()
12724 bus->oob_enabled = TRUE; in dhdpcie_send_mb_data()
12729 dhd_bus_cmn_readshared(bus, &cur_h2d_mb_data, H2D_MB_DATA, 0); in dhdpcie_send_mb_data()
12738 dhd_bus_cmn_readshared(bus, &cur_h2d_mb_data, H2D_MB_DATA, 0); in dhdpcie_send_mb_data()
12748 dhd_bus_cmn_writeshared(bus, &h2d_mb_data, sizeof(uint32), H2D_MB_DATA, 0); in dhdpcie_send_mb_data()
12749 dhd_bus_gen_devmb_intr(bus); in dhdpcie_send_mb_data()
12754 bus->last_d3_inform_time = OSL_LOCALTIME_NS(); in dhdpcie_send_mb_data()
12755 bus->d3_inform_cnt++; in dhdpcie_send_mb_data()
12759 bus->d0_inform_in_use_cnt++; in dhdpcie_send_mb_data()
12763 bus->d0_inform_cnt++; in dhdpcie_send_mb_data()
12771 dhd_bus_handle_d3_ack(dhd_bus_t *bus) in dhd_bus_handle_d3_ack() argument
12773 bus->suspend_intr_disable_count++; in dhd_bus_handle_d3_ack()
12781 dhdpcie_bus_intr_disable(bus); /* Disable interrupt using IntMask!! */ in dhd_bus_handle_d3_ack()
12782 dhdpcie_bus_clear_intstatus(bus); in dhd_bus_handle_d3_ack()
12784 dhdpcie_disable_irq_nosync(bus); /* Disable host interrupt!! */ in dhd_bus_handle_d3_ack()
12787 DHD_SET_BUS_LPS_D3_ACKED(bus); in dhd_bus_handle_d3_ack()
12790 if (bus->dhd->dhd_induce_error == DHD_INDUCE_D3_ACK_TIMEOUT) { in dhd_bus_handle_d3_ack()
12794 DHD_SET_BUS_LPS_D3_INFORMED(bus); in dhd_bus_handle_d3_ack()
12799 if (bus->dhd->dhd_induce_error != DHD_INDUCE_D3_ACK_TIMEOUT) { in dhd_bus_handle_d3_ack()
12800 bus->wait_for_d3_ack = 1; in dhd_bus_handle_d3_ack()
12801 dhd_os_d3ack_wake(bus->dhd); in dhd_bus_handle_d3_ack()
12808 dhd_bus_handle_mb_data(dhd_bus_t *bus, uint32 d2h_mb_data) in dhd_bus_handle_mb_data() argument
12813 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_handle_mb_data()
12814 dhd_bus_pcie_pwr_req(bus); in dhd_bus_handle_mb_data()
12819 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
12820 dhd_bus_ds_trace(bus, d2h_mb_data, TRUE, dhdpcie_bus_get_pcie_inband_dw_state(bus)); in dhd_bus_handle_mb_data()
12821 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
12823 dhd_bus_ds_trace(bus, d2h_mb_data, TRUE); in dhd_bus_handle_mb_data()
12827 if (bus->dhd->db7_trap.fw_db7w_trap_inprogress == FALSE) { in dhd_bus_handle_mb_data()
12829 bus->dhd->dongle_trap_data)); in dhd_bus_handle_mb_data()
12832 if (bus->dhd->dongle_trap_data & D2H_DEV_TRAP_HOSTDB) { in dhd_bus_handle_mb_data()
12835 bus->dhd->db7_trap.debug_db7_trap_time = OSL_LOCALTIME_NS(); in dhd_bus_handle_mb_data()
12836 bus->dhd->db7_trap.debug_db7_trap_cnt++; in dhd_bus_handle_mb_data()
12837 db7_dur = bus->dhd->db7_trap.debug_db7_trap_time - in dhd_bus_handle_mb_data()
12838 bus->dhd->db7_trap.debug_db7_send_time; in dhd_bus_handle_mb_data()
12839 if (db7_dur > bus->dhd->db7_trap.debug_max_db7_dur) { in dhd_bus_handle_mb_data()
12840 bus->dhd->db7_trap.debug_max_db7_send_time = in dhd_bus_handle_mb_data()
12841 bus->dhd->db7_trap.debug_db7_send_time; in dhd_bus_handle_mb_data()
12842 bus->dhd->db7_trap.debug_max_db7_trap_time = in dhd_bus_handle_mb_data()
12843 bus->dhd->db7_trap.debug_db7_trap_time; in dhd_bus_handle_mb_data()
12845 bus->dhd->db7_trap.debug_max_db7_dur = in dhd_bus_handle_mb_data()
12846 MAX(bus->dhd->db7_trap.debug_max_db7_dur, db7_dur); in dhd_bus_handle_mb_data()
12847 if (bus->dhd->db7_trap.fw_db7w_trap_inprogress == FALSE) { in dhd_bus_handle_mb_data()
12848 bus->dhd->db7_trap.debug_db7_timing_error_cnt++; in dhd_bus_handle_mb_data()
12851 dhdpcie_checkdied(bus, NULL, 0); in dhd_bus_handle_mb_data()
12853 dhdpcie_handle_dongle_trap(bus); in dhd_bus_handle_mb_data()
12858 bus->no_cfg_restore = 1; in dhd_bus_handle_mb_data()
12861 dhd_os_check_hang(bus->dhd, 0, -EREMOTEIO); in dhd_bus_handle_mb_data()
12864 if (bus->dhd->db7_trap.fw_db7w_trap_inprogress) { in dhd_bus_handle_mb_data()
12865 bus->dhd->db7_trap.fw_db7w_trap_inprogress = FALSE; in dhd_bus_handle_mb_data()
12866 bus->dhd->dongle_trap_occured = TRUE; in dhd_bus_handle_mb_data()
12873 if (__DHD_CHK_BUS_LPS_D3_ACKED(bus)) { in dhd_bus_handle_mb_data()
12876 bus->dhd->busstate = DHD_BUS_DOWN; in dhd_bus_handle_mb_data()
12882 if (INBAND_DW_ENAB(bus)) { in dhd_bus_handle_mb_data()
12886 if (!bus->skip_ds_ack) { in dhd_bus_handle_mb_data()
12887 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
12888 if (dhdpcie_bus_get_pcie_inband_dw_state(bus) in dhd_bus_handle_mb_data()
12890 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhd_bus_handle_mb_data()
12892 if (bus->host_active_cnt == 0) { in dhd_bus_handle_mb_data()
12893 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhd_bus_handle_mb_data()
12895 dhdpcie_send_mb_data(bus, H2D_HOST_DS_ACK); in dhd_bus_handle_mb_data()
12903 __FUNCTION__, bus->host_active_cnt)); in dhd_bus_handle_mb_data()
12909 else if (dhdpcie_bus_get_pcie_inband_dw_state(bus) in dhd_bus_handle_mb_data()
12916 dhdpcie_bus_get_pcie_inband_dw_state(bus))); in dhd_bus_handle_mb_data()
12918 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
12919 dhd_os_ds_enter_wake(bus->dhd); in dhd_bus_handle_mb_data()
12925 if (ds_acked && !bus->ds_enabled) { in dhd_bus_handle_mb_data()
12937 dhd_bus_inb_set_device_wake(bus, TRUE); in dhd_bus_handle_mb_data()
12943 dhdpcie_send_mb_data(bus, H2D_HOST_DS_ACK); in dhd_bus_handle_mb_data()
12949 if (INBAND_DW_ENAB(bus)) { in dhd_bus_handle_mb_data()
12950 if (bus->calc_ds_exit_latency) { in dhd_bus_handle_mb_data()
12951 bus->ds_exit_ts2 = OSL_SYSUPTIME_US(); in dhd_bus_handle_mb_data()
12952 if (bus->ds_exit_ts2 > bus->ds_exit_ts1 && in dhd_bus_handle_mb_data()
12953 bus->ds_exit_ts1 != 0) in dhd_bus_handle_mb_data()
12954 bus->ds_exit_latency = bus->ds_exit_ts2 - bus->ds_exit_ts1; in dhd_bus_handle_mb_data()
12956 bus->ds_exit_latency = 0; in dhd_bus_handle_mb_data()
12963 if (INBAND_DW_ENAB(bus)) { in dhd_bus_handle_mb_data()
12964 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
12965 if (dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhd_bus_handle_mb_data()
12972 bus->inband_ds_exit_host_cnt++; in dhd_bus_handle_mb_data()
12975 bus->wait_for_ds_exit = 1; in dhd_bus_handle_mb_data()
12980 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhd_bus_handle_mb_data()
12982 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
12983 dhd_os_ds_exit_wake(bus->dhd); in dhd_bus_handle_mb_data()
12984 } else if (dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhd_bus_handle_mb_data()
12994 bus->inband_ds_exit_device_cnt++; in dhd_bus_handle_mb_data()
12995 dhdpcie_bus_set_pcie_inband_dw_state(bus, in dhd_bus_handle_mb_data()
12997 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
13001 bus->inband_ds_exit_host_cnt++; in dhd_bus_handle_mb_data()
13002 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
13005 * bus->deep_sleep is TRUE by default. deep_sleep is set to FALSE when the in dhd_bus_handle_mb_data()
13008 * explicitly asked not to go to deep sleep. bus->deep_sleep is set to in dhd_bus_handle_mb_data()
13011 if (bus->deep_sleep) { in dhd_bus_handle_mb_data()
13012 dhd_bus_set_device_wake(bus, FALSE); in dhd_bus_handle_mb_data()
13013 dhdpcie_set_dongle_deepsleep(bus, FALSE); in dhd_bus_handle_mb_data()
13022 if (INBAND_DW_ENAB(bus)) { in dhd_bus_handle_mb_data()
13023 DHD_BUS_INB_DW_LOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
13024 if (dhdpcie_bus_get_pcie_inband_dw_state(bus) == in dhd_bus_handle_mb_data()
13026 dhdpcie_bus_set_pcie_inband_dw_state(bus, DW_DEVICE_DS_ACTIVE); in dhd_bus_handle_mb_data()
13028 DHD_BUS_INB_DW_UNLOCK(bus->inb_lock, flags); in dhd_bus_handle_mb_data()
13035 if (!bus->wait_for_d3_ack) { in dhd_bus_handle_mb_data()
13037 if (bus->dhd->req_hang_type == HANG_REASON_D3_ACK_TIMEOUT) { in dhd_bus_handle_mb_data()
13040 dhd_bus_handle_d3_ack(bus); in dhd_bus_handle_mb_data()
13043 dhd_bus_handle_d3_ack(bus); in dhd_bus_handle_mb_data()
13049 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_handle_mb_data()
13050 dhd_bus_pcie_pwr_req_clear(bus); in dhd_bus_handle_mb_data()
13055 dhdpcie_handle_mb_data(dhd_bus_t *bus) in dhdpcie_handle_mb_data() argument
13060 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_handle_mb_data()
13061 dhd_bus_pcie_pwr_req(bus); in dhdpcie_handle_mb_data()
13064 if (bus->is_linkdown) { in dhdpcie_handle_mb_data()
13069 dhd_bus_cmn_readshared(bus, &d2h_mb_data, D2H_MB_DATA, 0); in dhdpcie_handle_mb_data()
13076 dhd_bus_cmn_writeshared(bus, &zero, sizeof(uint32), D2H_MB_DATA, 0); in dhdpcie_handle_mb_data()
13081 dhdpcie_checkdied(bus, NULL, 0); in dhdpcie_handle_mb_data()
13082 /* not ready yet dhd_os_ind_firmware_stall(bus->dhd); */ in dhdpcie_handle_mb_data()
13084 dhdpcie_handle_dongle_trap(bus); in dhdpcie_handle_mb_data()
13091 dhdpcie_send_mb_data(bus, H2D_HOST_DS_ACK); in dhdpcie_handle_mb_data()
13101 if (!bus->wait_for_d3_ack) { in dhdpcie_handle_mb_data()
13103 if (bus->dhd->req_hang_type == HANG_REASON_D3_ACK_TIMEOUT) { in dhdpcie_handle_mb_data()
13106 dhd_bus_handle_d3_ack(bus); in dhdpcie_handle_mb_data()
13109 dhd_bus_handle_d3_ack(bus); in dhdpcie_handle_mb_data()
13115 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_handle_mb_data()
13116 dhd_bus_pcie_pwr_req_clear(bus); in dhdpcie_handle_mb_data()
13121 dhdpcie_read_handle_mb_data(dhd_bus_t *bus) in dhdpcie_read_handle_mb_data() argument
13126 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_read_handle_mb_data()
13127 dhd_bus_pcie_pwr_req(bus); in dhdpcie_read_handle_mb_data()
13130 dhd_bus_cmn_readshared(bus, &d2h_mb_data, D2H_MB_DATA, 0); in dhdpcie_read_handle_mb_data()
13135 dhd_bus_cmn_writeshared(bus, &zero, sizeof(uint32), D2H_MB_DATA, 0); in dhdpcie_read_handle_mb_data()
13137 dhd_bus_handle_mb_data(bus, d2h_mb_data); in dhdpcie_read_handle_mb_data()
13140 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_read_handle_mb_data()
13141 dhd_bus_pcie_pwr_req_clear(bus); in dhdpcie_read_handle_mb_data()
13148 dhd_bus_handle_intx_ahead_dma_indices(dhd_bus_t *bus) in dhd_bus_handle_intx_ahead_dma_indices() argument
13150 if (bus->d2h_intr_method == PCIE_MSI) { in dhd_bus_handle_intx_ahead_dma_indices()
13155 if (bus->dhd->dma_d2h_ring_upd_support == FALSE) { in dhd_bus_handle_intx_ahead_dma_indices()
13160 if (dhd_query_bus_erros(bus->dhd)) { in dhd_bus_handle_intx_ahead_dma_indices()
13170 if (dhdpcie_irq_disabled(bus) == FALSE) { in dhd_bus_handle_intx_ahead_dma_indices()
13177 if (DHD_CHK_BUS_LPS_D3_ACKED(bus)) { in dhd_bus_handle_intx_ahead_dma_indices()
13182 dhd_schedule_delayed_dpc_on_dpc_cpu(bus->dhd, DHD_SCHED_RETRY_DPC_DELAY_MS); in dhd_bus_handle_intx_ahead_dma_indices()
13187 dhdpcie_bus_process_mailbox_intr(dhd_bus_t *bus, uint32 intstatus) in dhdpcie_bus_process_mailbox_intr() argument
13191 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_bus_process_mailbox_intr()
13192 dhd_bus_pcie_pwr_req(bus); in dhdpcie_bus_process_mailbox_intr()
13194 if ((bus->sih->buscorerev == 2) || (bus->sih->buscorerev == 6) || in dhdpcie_bus_process_mailbox_intr()
13195 (bus->sih->buscorerev == 4)) { in dhdpcie_bus_process_mailbox_intr()
13198 resched = dhdpci_bus_read_frames(bus); in dhdpcie_bus_process_mailbox_intr()
13204 bus->api.handle_mb_data(bus); in dhdpcie_bus_process_mailbox_intr()
13208 * No further check required, in fact bus->instatus can be eliminated. in dhdpcie_bus_process_mailbox_intr()
13209 * Both bus->instatus, and bud->intdis are shared between isr and dpc. in dhdpcie_bus_process_mailbox_intr()
13212 if (pm_runtime_get(dhd_bus_to_dev(bus)) >= 0) { in dhdpcie_bus_process_mailbox_intr()
13213 resched = dhdpci_bus_read_frames(bus); in dhdpcie_bus_process_mailbox_intr()
13214 pm_runtime_mark_last_busy(dhd_bus_to_dev(bus)); in dhdpcie_bus_process_mailbox_intr()
13215 pm_runtime_put_autosuspend(dhd_bus_to_dev(bus)); in dhdpcie_bus_process_mailbox_intr()
13218 resched = dhdpci_bus_read_frames(bus); in dhdpcie_bus_process_mailbox_intr()
13222 dhd_bus_handle_intx_ahead_dma_indices(bus); in dhdpcie_bus_process_mailbox_intr()
13224 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_bus_process_mailbox_intr()
13225 dhd_bus_pcie_pwr_req_clear(bus); in dhdpcie_bus_process_mailbox_intr()
13232 dhdpci_bus_rte_log_time_sync_poll(dhd_bus_t *bus) in dhdpci_bus_rte_log_time_sync_poll() argument
13237 if ((bus->dhd->busstate == DHD_BUS_DATA) && in dhdpci_bus_rte_log_time_sync_poll()
13238 (bus->dhd->dhd_rte_time_sync_ms != 0) && in dhdpci_bus_rte_log_time_sync_poll()
13239 DHD_CHK_BUS_NOT_IN_LPS(bus)) { in dhdpci_bus_rte_log_time_sync_poll()
13245 time_elapsed = OSL_SYSUPTIME_US() - bus->dhd_rte_time_sync_count; in dhdpci_bus_rte_log_time_sync_poll()
13247 if ((time_elapsed / 1000) >= bus->dhd->dhd_rte_time_sync_ms) { in dhdpci_bus_rte_log_time_sync_poll()
13252 bus->dhd_rte_time_sync_count += time_elapsed; in dhdpci_bus_rte_log_time_sync_poll()
13255 dhd_h2d_log_time_sync_deferred_wq_schedule(bus->dhd); in dhdpci_bus_rte_log_time_sync_poll()
13262 dhdpci_bus_read_frames(dhd_bus_t *bus) in dhdpci_bus_read_frames() argument
13267 if ((bus->api.fw_rev >= PCIE_SHARED_VERSION_6) && in dhdpci_bus_read_frames()
13268 (bus->dhd->dongle_trap_data = dhd_prot_process_trapbuf(bus->dhd))) { in dhdpci_bus_read_frames()
13270 if (bus->dhd->axi_error) { in dhdpci_bus_read_frames()
13275 dhd_bus_handle_mb_data(bus, D2H_DEV_FWHALT); in dhdpci_bus_read_frames()
13279 if (dhd_query_bus_erros(bus->dhd)) { in dhdpci_bus_read_frames()
13280 DHD_ERROR(("%s: detected bus errors. Hence donot process msg rings\n", in dhdpci_bus_read_frames()
13285 dhd_prot_save_dmaidx(bus->dhd); in dhdpci_bus_read_frames()
13288 dhd_prot_process_ctrlbuf(bus->dhd); in dhdpci_bus_read_frames()
13289 bus->last_process_ctrlbuf_time = OSL_LOCALTIME_NS(); in dhdpci_bus_read_frames()
13291 /* Do not process rest of ring buf once bus enters low power state (D3_INFORM/D3_ACK) */ in dhdpci_bus_read_frames()
13292 if (DHD_CHK_BUS_IN_LPS(bus)) { in dhdpci_bus_read_frames()
13293 DHD_RPM(("%s: Bus is in power save state (%d). " in dhdpci_bus_read_frames()
13295 __FUNCTION__, bus->bus_low_power_state)); in dhdpci_bus_read_frames()
13300 dhd_update_txflowrings(bus->dhd); in dhdpci_bus_read_frames()
13301 bus->last_process_flowring_time = OSL_LOCALTIME_NS(); in dhdpci_bus_read_frames()
13307 more |= dhd_prot_process_msgbuf_txcpl(bus->dhd, dhd_txbound, DHD_HP2P_RING); in dhdpci_bus_read_frames()
13309 more |= dhd_prot_process_msgbuf_txcpl(bus->dhd, dhd_txbound, DHD_REGULAR_RING); in dhdpci_bus_read_frames()
13310 bus->last_process_txcpl_time = OSL_LOCALTIME_NS(); in dhdpci_bus_read_frames()
13316 more |= dhd_prot_process_msgbuf_rxcpl(bus->dhd, dhd_rxbound, DHD_HP2P_RING); in dhdpci_bus_read_frames()
13318 more |= dhd_prot_process_msgbuf_rxcpl(bus->dhd, dhd_rxbound, DHD_REGULAR_RING); in dhdpci_bus_read_frames()
13319 bus->last_process_rxcpl_time = OSL_LOCALTIME_NS(); in dhdpci_bus_read_frames()
13323 if (!bus->dhd->dongle_edl_support) in dhdpci_bus_read_frames()
13326 more |= dhd_prot_process_msgbuf_infocpl(bus->dhd, DHD_INFORING_BOUND); in dhdpci_bus_read_frames()
13327 bus->last_process_infocpl_time = OSL_LOCALTIME_NS(); in dhdpci_bus_read_frames()
13331 more |= dhd_prot_process_msgbuf_edl(bus->dhd); in dhdpci_bus_read_frames()
13332 bus->last_process_edl_time = OSL_LOCALTIME_NS(); in dhdpci_bus_read_frames()
13339 dhd_event_logtrace_enqueue_fwtrace(bus->dhd); in dhdpci_bus_read_frames()
13345 more |= dhd_prot_process_msgbuf_btlogcpl(bus->dhd, DHD_BTLOGRING_BOUND); in dhdpci_bus_read_frames()
13349 if (bus->enable_idle_flowring_mgmt) { in dhdpci_bus_read_frames()
13351 dhd_bus_check_idle_scan(bus); in dhdpci_bus_read_frames()
13356 if (bus->dhd->hang_was_sent) { in dhdpci_bus_read_frames()
13364 if (bus->read_shm_fail) { in dhdpci_bus_read_frames()
13366 int intstatus = si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpci_bus_read_frames()
13367 bus->pcie_mailbox_int, 0, 0); in dhdpci_bus_read_frames()
13371 if (bus->dhd->memdump_enabled) { in dhdpci_bus_read_frames()
13372 DHD_OS_WAKE_LOCK(bus->dhd); in dhdpci_bus_read_frames()
13373 bus->dhd->memdump_type = DUMP_TYPE_READ_SHM_FAIL; in dhdpci_bus_read_frames()
13374 dhd_bus_mem_dump(bus->dhd); in dhdpci_bus_read_frames()
13375 DHD_OS_WAKE_UNLOCK(bus->dhd); in dhdpci_bus_read_frames()
13381 bus->no_cfg_restore = 1; in dhdpci_bus_read_frames()
13383 bus->is_linkdown = 1; in dhdpci_bus_read_frames()
13387 * invoked only if the bus->is_linkdown is updated so that in dhdpci_bus_read_frames()
13391 dhd_prot_debug_info_print(bus->dhd); in dhdpci_bus_read_frames()
13392 bus->dhd->hang_reason = HANG_REASON_PCIE_LINK_DOWN_EP_DETECT; in dhdpci_bus_read_frames()
13394 copy_hang_info_linkdown(bus->dhd); in dhdpci_bus_read_frames()
13396 dhd_os_send_hang_message(bus->dhd); in dhdpci_bus_read_frames()
13401 dhdpci_bus_rte_log_time_sync_poll(bus); in dhdpci_bus_read_frames()
13407 dhdpcie_tcm_valid(dhd_bus_t *bus) in dhdpcie_tcm_valid() argument
13414 shaddr = bus->dongle_ram_base + bus->ramsize - 4; in dhdpcie_tcm_valid()
13417 addr = LTOH32(dhdpcie_bus_rtcm32(bus, shaddr)); in dhdpcie_tcm_valid()
13419 if ((addr == 0) || (addr == bus->nvram_csm) || (addr < bus->dongle_ram_base) || in dhdpcie_tcm_valid()
13427 if ((rv = dhdpcie_bus_membytes(bus, FALSE, addr, (uint8 *)&sh, in dhdpcie_tcm_valid()
13434 if (sh.console_addr != bus->pcie_sh->console_addr) { in dhdpcie_tcm_valid()
13472 dhdpcie_readshared(dhd_bus_t *bus) in dhdpcie_readshared() argument
13477 pciedev_shared_t *sh = bus->pcie_sh; in dhdpcie_readshared()
13492 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_readshared()
13493 dhd_bus_pcie_pwr_req(bus); in dhdpcie_readshared()
13496 shaddr = bus->dongle_ram_base + bus->ramsize - 4; in dhdpcie_readshared()
13511 while (((addr == 0) || (addr == bus->nvram_csm)) && !dhd_timeout_expired(&tmo)) { in dhdpcie_readshared()
13513 addr = LTOH32(dhdpcie_bus_rtcm32(bus, shaddr)); in dhdpcie_readshared()
13520 process_fw_trace_data(bus->dhd); in dhdpcie_readshared()
13529 bus->no_cfg_restore = 1; in dhdpcie_readshared()
13534 bus->is_linkdown = 1; in dhdpcie_readshared()
13537 dhd_bus_dump_imp_cfg_registers(bus); in dhdpcie_readshared()
13538 dhd_bus_dump_dar_registers(bus); in dhdpcie_readshared()
13540 intstatus = si_corereg(bus->sih, in dhdpcie_readshared()
13541 bus->sih->buscoreidx, bus->pcie_mailbox_int, 0, 0); in dhdpcie_readshared()
13544 bus->is_linkdown = TRUE; in dhdpcie_readshared()
13548 if (bus->dhd->memdump_enabled) { in dhdpcie_readshared()
13550 bus->dhd->memdump_type = bus->dhd->dongle_trap_data ? in dhdpcie_readshared()
13552 dhdpcie_mem_dump(bus); in dhdpcie_readshared()
13560 if ((addr == 0) || (addr == bus->nvram_csm) || (addr < bus->dongle_ram_base) || in dhdpcie_readshared()
13572 bus->dhd->memdump_enabled = DUMP_MEMONLY; in dhdpcie_readshared()
13574 if (bus->dhd->memdump_enabled) { in dhdpcie_readshared()
13575 bus->dhd->memdump_type = DUMP_TYPE_DONGLE_INIT_FAILURE; in dhdpcie_readshared()
13576 dhdpcie_mem_dump(bus); in dhdpcie_readshared()
13588 bus->rd_shared_pass_time = OSL_LOCALTIME_NS(); in dhdpcie_readshared()
13593 bus->shared_addr = (ulong)addr; in dhdpcie_readshared()
13595 DIV_U64_BY_U32((bus->rd_shared_pass_time - bus->arm_oor_time), in dhdpcie_readshared()
13602 bus->dhd->pcie_readshared_done = 1; in dhdpcie_readshared()
13605 if ((rv = dhdpcie_bus_membytes(bus, FALSE, addr, (uint8 *)sh, in dhdpcie_readshared()
13623 /* load bus console address */ in dhdpcie_readshared()
13624 bus->console_addr = sh->console_addr; in dhdpcie_readshared()
13627 bus->dma_rxoffset = bus->pcie_sh->dma_rxoffset; in dhdpcie_readshared()
13628 dhd_prot_rx_dataoffset(bus->dhd, bus->dma_rxoffset); in dhdpcie_readshared()
13630 DHD_INFO(("%s: DMA RX offset from shared Area %d\n", __FUNCTION__, bus->dma_rxoffset)); in dhdpcie_readshared()
13632 bus->api.fw_rev = sh->flags & PCIE_SHARED_VERSION_MASK; in dhdpcie_readshared()
13633 if (!(dhdpcie_check_firmware_compatible(bus->api.fw_rev, PCIE_SHARED_VERSION))) in dhdpcie_readshared()
13638 bus->api.fw_rev)); in dhdpcie_readshared()
13641 dhdpcie_update_bus_api_revisions(bus->api.fw_rev, PCIE_SHARED_VERSION); in dhdpcie_readshared()
13643 bus->rw_index_sz = (sh->flags & PCIE_SHARED_2BYTE_INDICES) ? in dhdpcie_readshared()
13646 __FUNCTION__, bus->rw_index_sz)); in dhdpcie_readshared()
13652 bus->enable_idle_flowring_mgmt = TRUE; in dhdpcie_readshared()
13657 bus->dhd->d2h_no_oob_dw = (sh->flags & PCIE_SHARED_NO_OOB_DW) ? TRUE : FALSE; in dhdpcie_readshared()
13658 d2h_no_oob_dw = bus->dhd->d2h_no_oob_dw; in dhdpcie_readshared()
13662 bus->dhd->d2h_inband_dw = (sh->flags & PCIE_SHARED_INBAND_DS) ? TRUE : FALSE; in dhdpcie_readshared()
13663 d2h_inband_dw = bus->dhd->d2h_inband_dw; in dhdpcie_readshared()
13676 if (IDMA_CAPABLE(bus)) { in dhdpcie_readshared()
13677 if (bus->sih->buscorerev == 23) { in dhdpcie_readshared()
13679 if (bus->dhd->d2h_inband_dw) in dhdpcie_readshared()
13690 bus->dhd->idma_enable = (sh->flags & PCIE_SHARED_IDMA) ? TRUE : FALSE; in dhdpcie_readshared()
13691 bus->dhd->ifrm_enable = (sh->flags & PCIE_SHARED_IFRM) ? TRUE : FALSE; in dhdpcie_readshared()
13694 bus->dhd->d2h_sync_mode = sh->flags & PCIE_SHARED_D2H_SYNC_MODE_MASK; in dhdpcie_readshared()
13696 bus->dhd->dar_enable = (sh->flags & PCIE_SHARED_DAR) ? TRUE : FALSE; in dhdpcie_readshared()
13700 if (!bus->dhd->dma_ring_upd_overwrite) { in dhdpcie_readshared()
13706 if (!IFRM_ENAB(bus->dhd)) { in dhdpcie_readshared()
13707 bus->dhd->dma_h2d_ring_upd_support = TRUE; in dhdpcie_readshared()
13709 bus->dhd->dma_d2h_ring_upd_support = TRUE; in dhdpcie_readshared()
13713 if (bus->dhd->dma_d2h_ring_upd_support && bus->dhd->d2h_sync_mode) { in dhdpcie_readshared()
13715 __FUNCTION__, bus->dhd->d2h_sync_mode)); in dhdpcie_readshared()
13720 (bus->dhd->dma_h2d_ring_upd_support ? 1 : 0), in dhdpcie_readshared()
13721 (bus->dhd->dma_d2h_ring_upd_support ? 1 : 0))); in dhdpcie_readshared()
13727 bus->dhd->dma_h2d_ring_upd_support = FALSE; in dhdpcie_readshared()
13728 bus->dhd->dma_d2h_ring_upd_support = FALSE; in dhdpcie_readshared()
13735 bus->dhd->fast_delete_ring_support = TRUE; in dhdpcie_readshared()
13739 bus->dhd->fast_delete_ring_support = FALSE; in dhdpcie_readshared()
13742 /* get ring_info, ring_state and mb data ptrs and store the addresses in bus structure */ in dhdpcie_readshared()
13747 if ((sh->rings_info_ptr < bus->dongle_ram_base) || (sh->rings_info_ptr > shaddr)) { in dhdpcie_readshared()
13753 if ((rv = dhdpcie_bus_membytes(bus, FALSE, sh->rings_info_ptr, in dhdpcie_readshared()
13757 bus->h2d_mb_data_ptr_addr = ltoh32(sh->h2d_mb_data_ptr); in dhdpcie_readshared()
13758 bus->d2h_mb_data_ptr_addr = ltoh32(sh->d2h_mb_data_ptr); in dhdpcie_readshared()
13760 if (bus->api.fw_rev >= PCIE_SHARED_VERSION_6) { in dhdpcie_readshared()
13761 bus->max_tx_flowrings = ltoh16(ring_info.max_tx_flowrings); in dhdpcie_readshared()
13762 bus->max_submission_rings = ltoh16(ring_info.max_submission_queues); in dhdpcie_readshared()
13763 bus->max_completion_rings = ltoh16(ring_info.max_completion_rings); in dhdpcie_readshared()
13764 bus->max_cmn_rings = bus->max_submission_rings - bus->max_tx_flowrings; in dhdpcie_readshared()
13765 bus->api.handle_mb_data = dhdpcie_read_handle_mb_data; in dhdpcie_readshared()
13766 bus->use_mailbox = sh->flags & PCIE_SHARED_USE_MAILBOX; in dhdpcie_readshared()
13769 bus->max_tx_flowrings = ltoh16(ring_info.max_tx_flowrings); in dhdpcie_readshared()
13770 bus->max_submission_rings = bus->max_tx_flowrings; in dhdpcie_readshared()
13771 bus->max_completion_rings = BCMPCIE_D2H_COMMON_MSGRINGS; in dhdpcie_readshared()
13772 bus->max_cmn_rings = BCMPCIE_H2D_COMMON_MSGRINGS; in dhdpcie_readshared()
13773 bus->api.handle_mb_data = dhdpcie_handle_mb_data; in dhdpcie_readshared()
13774 bus->use_mailbox = TRUE; in dhdpcie_readshared()
13776 if (bus->max_completion_rings == 0) { in dhdpcie_readshared()
13778 bus->max_completion_rings)); in dhdpcie_readshared()
13781 if (bus->max_submission_rings == 0) { in dhdpcie_readshared()
13783 bus->max_submission_rings)); in dhdpcie_readshared()
13786 if (bus->max_tx_flowrings == 0) { in dhdpcie_readshared()
13787 DHD_ERROR(("dongle txflow rings are invalid %d\n", bus->max_tx_flowrings)); in dhdpcie_readshared()
13794 if (bus->dhd->dma_h2d_ring_upd_support || IDMA_ENAB(bus->dhd)) { in dhdpcie_readshared()
13795 dma_indx_wr_buf = dhd_prot_dma_indx_init(bus->dhd, bus->rw_index_sz, in dhdpcie_readshared()
13796 H2D_DMA_INDX_WR_BUF, bus->max_submission_rings); in dhdpcie_readshared()
13797 dma_indx_rd_buf = dhd_prot_dma_indx_init(bus->dhd, bus->rw_index_sz, in dhdpcie_readshared()
13798 D2H_DMA_INDX_RD_BUF, bus->max_completion_rings); in dhdpcie_readshared()
13804 bus->dhd->dma_h2d_ring_upd_support = FALSE; in dhdpcie_readshared()
13805 bus->dhd->idma_enable = FALSE; in dhdpcie_readshared()
13809 if (bus->dhd->dma_d2h_ring_upd_support) { in dhdpcie_readshared()
13810 dma_indx_wr_buf = dhd_prot_dma_indx_init(bus->dhd, bus->rw_index_sz, in dhdpcie_readshared()
13811 D2H_DMA_INDX_WR_BUF, bus->max_completion_rings); in dhdpcie_readshared()
13812 dma_indx_rd_buf = dhd_prot_dma_indx_init(bus->dhd, bus->rw_index_sz, in dhdpcie_readshared()
13813 H2D_DMA_INDX_RD_BUF, bus->max_submission_rings); in dhdpcie_readshared()
13819 bus->dhd->dma_d2h_ring_upd_support = FALSE; in dhdpcie_readshared()
13823 if (bus->dhd->dma_d2h_ring_upd_support) { in dhdpcie_readshared()
13824 uint32 bufsz = bus->rw_index_sz * bus->max_completion_rings; in dhdpcie_readshared()
13825 if (dhd_prot_dma_indx_copybuf_init(bus->dhd, bufsz, D2H_DMA_INDX_WR_BUF) in dhdpcie_readshared()
13829 bufsz = bus->rw_index_sz * bus->max_submission_rings; in dhdpcie_readshared()
13830 if (dhd_prot_dma_indx_copybuf_init(bus->dhd, bufsz, H2D_DMA_INDX_RD_BUF) in dhdpcie_readshared()
13836 if (IFRM_ENAB(bus->dhd)) { in dhdpcie_readshared()
13837 dma_indx_wr_buf = dhd_prot_dma_indx_init(bus->dhd, bus->rw_index_sz, in dhdpcie_readshared()
13838 H2D_IFRM_INDX_WR_BUF, bus->max_tx_flowrings); in dhdpcie_readshared()
13843 bus->dhd->ifrm_enable = FALSE; in dhdpcie_readshared()
13848 dhd_fillup_ring_sharedptr_info(bus, &ring_info); in dhdpcie_readshared()
13859 __FUNCTION__, bus->h2d_mb_data_ptr_addr)); in dhdpcie_readshared()
13861 __FUNCTION__, bus->d2h_mb_data_ptr_addr)); in dhdpcie_readshared()
13865 __FUNCTION__, bus->dhd->d2h_sync_mode)); in dhdpcie_readshared()
13867 bus->dhd->d2h_hostrdy_supported = in dhdpcie_readshared()
13870 bus->dhd->ext_trap_data_supported = in dhdpcie_readshared()
13874 bus->dhd->pcie_txs_metadata_enable = 0; in dhdpcie_readshared()
13877 memset(&bus->dhd->db7_trap, 0, sizeof(bus->dhd->db7_trap)); in dhdpcie_readshared()
13878 bus->dhd->db7_trap.fw_db7w_trap = 1; in dhdpcie_readshared()
13880 bus->dhd->db7_trap.db7_magic_number = PCIE_DB7_MAGIC_NUMBER_DPC_TRAP; in dhdpcie_readshared()
13884 bus->dhd->bt_logging = (sh->flags2 & PCIE_SHARED2_BT_LOGGING) ? TRUE : FALSE; in dhdpcie_readshared()
13891 bus->dhd->submit_count_WAR = (sh->flags2 & PCIE_SHARED2_SUBMIT_COUNT_WAR) ? TRUE : FALSE; in dhdpcie_readshared()
13892 DHD_ERROR(("FW supports BT logging ? %s \n", bus->dhd->bt_logging ? "Y" : "N")); in dhdpcie_readshared()
13896 bus->dhd->snapshot_upload = (sh->flags2 & PCIE_SHARED2_SNAPSHOT_UPLOAD) ? TRUE : FALSE; in dhdpcie_readshared()
13897 DHD_ERROR(("FW supports snapshot upload ? %s \n", bus->dhd->snapshot_upload ? "Y" : "N")); in dhdpcie_readshared()
13901 bus->d2h_minidump = (sh->flags2 & PCIE_SHARED2_FW_SMALL_MEMDUMP) ? TRUE : FALSE; in dhdpcie_readshared()
13902 DHD_ERROR(("FW supports minidump ? %s \n", bus->d2h_minidump ? "Y" : "N")); in dhdpcie_readshared()
13903 if (bus->d2h_minidump_override) { in dhdpcie_readshared()
13904 bus->d2h_minidump = FALSE; in dhdpcie_readshared()
13907 bus->d2h_minidump, bus->d2h_minidump_override)); in dhdpcie_readshared()
13910 bus->dhd->hscb_enable = in dhdpcie_readshared()
13915 bus->dhd->dongle_edl_support = (sh->flags2 & PCIE_SHARED2_EDL_RING) ? TRUE : FALSE; in dhdpcie_readshared()
13916 DHD_ERROR(("Dongle EDL support: %u\n", bus->dhd->dongle_edl_support)); in dhdpcie_readshared()
13920 bus->dhd->debug_buf_dest_support = in dhdpcie_readshared()
13923 bus->dhd->debug_buf_dest_support ? "Y" : "N")); in dhdpcie_readshared()
13926 if (bus->dhd->hp2p_enable) { in dhdpcie_readshared()
13927 bus->dhd->hp2p_ts_capable = in dhdpcie_readshared()
13929 bus->dhd->hp2p_capable = in dhdpcie_readshared()
13931 bus->dhd->hp2p_capable |= bus->dhd->hp2p_ts_capable; in dhdpcie_readshared()
13934 bus->dhd->hp2p_capable ? "Y" : "N")); in dhdpcie_readshared()
13936 if (bus->dhd->hp2p_capable) { in dhdpcie_readshared()
13937 bus->dhd->pkt_thresh = HP2P_PKT_THRESH; in dhdpcie_readshared()
13938 bus->dhd->pkt_expiry = HP2P_PKT_EXPIRY; in dhdpcie_readshared()
13939 bus->dhd->time_thresh = HP2P_TIME_THRESH; in dhdpcie_readshared()
13941 hp2p_info_t *hp2p_info = &bus->dhd->hp2p_info[addr]; in dhdpcie_readshared()
13951 bus->dhd->db0ts_capable = in dhdpcie_readshared()
13955 if (MULTIBP_ENAB(bus->sih)) { in dhdpcie_readshared()
13956 dhd_bus_pcie_pwr_req_clear(bus); in dhdpcie_readshared()
13962 if (bus->sih->buscorerev >= 68) { in dhdpcie_readshared()
13963 dhd_bus_pcie_pwr_req_wl_domain(bus, in dhdpcie_readshared()
13964 DAR_PCIE_PWR_CTRL((bus->sih)->buscorerev), FALSE); in dhdpcie_readshared()
13972 dhd_fillup_ring_sharedptr_info(dhd_bus_t *bus, ring_info_t *ring_info) in dhd_fillup_ring_sharedptr_info() argument
13978 uint16 max_tx_flowrings = bus->max_tx_flowrings; in dhd_fillup_ring_sharedptr_info()
13995 bus->ring_sh[i].ring_mem_addr = tcm_memloc; in dhd_fillup_ring_sharedptr_info()
13999 i, bus->ring_sh[i].ring_mem_addr)); in dhd_fillup_ring_sharedptr_info()
14012 bus->ring_sh[i].ring_state_w = h2d_w_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14013 bus->ring_sh[i].ring_state_r = h2d_r_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14016 h2d_w_idx_ptr = h2d_w_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14017 h2d_r_idx_ptr = h2d_r_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14020 bus->ring_sh[i].ring_state_w, bus->ring_sh[i].ring_state_r)); in dhd_fillup_ring_sharedptr_info()
14025 bus->ring_sh[i].ring_state_w = d2h_w_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14026 bus->ring_sh[i].ring_state_r = d2h_r_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14029 d2h_w_idx_ptr = d2h_w_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14030 d2h_r_idx_ptr = d2h_r_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14033 bus->ring_sh[i].ring_state_w, bus->ring_sh[i].ring_state_r)); in dhd_fillup_ring_sharedptr_info()
14037 if (bus->api.fw_rev < PCIE_SHARED_VERSION_6) { in dhd_fillup_ring_sharedptr_info()
14045 bus->ring_sh[i].ring_state_w = h2d_w_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14046 bus->ring_sh[i].ring_state_r = h2d_r_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14049 h2d_w_idx_ptr = h2d_w_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14050 h2d_r_idx_ptr = h2d_r_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14054 bus->ring_sh[i].ring_state_w, in dhd_fillup_ring_sharedptr_info()
14055 bus->ring_sh[i].ring_state_r)); in dhd_fillup_ring_sharedptr_info()
14060 bus->ring_sh[i].ring_state_w = d2h_w_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14061 bus->ring_sh[i].ring_state_r = d2h_r_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14062 d2h_w_idx_ptr = d2h_w_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14063 d2h_r_idx_ptr = d2h_r_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14065 bus->ring_sh[i].ring_state_w, in dhd_fillup_ring_sharedptr_info()
14066 bus->ring_sh[i].ring_state_r)); in dhd_fillup_ring_sharedptr_info()
14070 bus->ring_sh[i].ring_state_w = d2h_w_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14071 bus->ring_sh[i].ring_state_r = d2h_r_idx_ptr; in dhd_fillup_ring_sharedptr_info()
14072 d2h_w_idx_ptr = d2h_w_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14073 d2h_r_idx_ptr = d2h_r_idx_ptr + bus->rw_index_sz; in dhd_fillup_ring_sharedptr_info()
14075 bus->ring_sh[i].ring_state_w, in dhd_fillup_ring_sharedptr_info()
14076 bus->ring_sh[i].ring_state_r)); in dhd_fillup_ring_sharedptr_info()
14082 * Initialize bus module: prepare for communication with the dongle. Called after downloading
14087 dhd_bus_t *bus = dhdp->bus; in dhd_bus_init() local
14092 ASSERT(bus->dhd); in dhd_bus_init()
14093 if (!bus->dhd) in dhd_bus_init()
14096 dhd_bus_pcie_pwr_req_clear_reload_war(bus); in dhd_bus_init()
14098 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_init()
14099 dhd_bus_pcie_pwr_req(bus); in dhd_bus_init()
14103 dhd_bus_aer_config(bus); in dhd_bus_init()
14106 bus->reg = si_setcore(bus->sih, PCIE2_CORE_ID, 0); in dhd_bus_init()
14107 ASSERT(bus->reg != NULL); in dhd_bus_init()
14109 /* before opening up bus for data transfer, check if shared are is intact */ in dhd_bus_init()
14110 ret = dhdpcie_readshared(bus); in dhd_bus_init()
14117 bus->reg = si_setcore(bus->sih, PCIE2_CORE_ID, 0); in dhd_bus_init()
14118 ASSERT(bus->reg != NULL); in dhd_bus_init()
14120 /* Set bus state according to enable result */ in dhd_bus_init()
14122 DHD_SET_BUS_NOT_IN_LPS(bus); in dhd_bus_init()
14126 if ((ret = dhdpcie_init_d11status(bus)) < 0) { in dhd_bus_init()
14132 dhd_dpc_enable(bus->dhd); in dhd_bus_init()
14135 dhdpcie_bus_intr_enable(bus); in dhd_bus_init()
14137 DHD_ERROR(("%s: Enabling bus->intr_enabled\n", __FUNCTION__)); in dhd_bus_init()
14138 bus->intr_enabled = TRUE; in dhd_bus_init()
14141 /* bcmsdh_intr_unmask(bus->sdh); */ in dhd_bus_init()
14143 bus->idlecount = 0; in dhd_bus_init()
14144 bus->idletime = (int32)MAX_IDLE_COUNT; in dhd_bus_init()
14145 init_waitqueue_head(&bus->rpm_queue); in dhd_bus_init()
14146 mutex_init(&bus->pm_lock); in dhd_bus_init()
14148 bus->idletime = 0; in dhd_bus_init()
14151 bus->skip_ds_ack = FALSE; in dhd_bus_init()
14153 if (!bus->inb_lock) { in dhd_bus_init()
14154 bus->inb_lock = osl_spin_lock_init(bus->dhd->osh); in dhd_bus_init()
14158 /* XXX Temp errnum workaround: return ok, caller checks bus state */ in dhd_bus_init()
14161 if (bus->api.fw_rev < PCIE_SHARED_VERSION_6) { in dhd_bus_init()
14162 bus->use_d0_inform = TRUE; in dhd_bus_init()
14164 bus->use_d0_inform = FALSE; in dhd_bus_init()
14167 bus->hostready_count = 0; in dhd_bus_init()
14170 if (MULTIBP_ENAB(bus->sih)) { in dhd_bus_init()
14171 dhd_bus_pcie_pwr_req_clear(bus); in dhd_bus_init()
14177 dhdpcie_init_shared_addr(dhd_bus_t *bus) in dhdpcie_init_shared_addr() argument
14181 addr = bus->dongle_ram_base + bus->ramsize - 4; in dhdpcie_init_shared_addr()
14183 dhdpcie_runtime_bus_wake(bus->dhd, TRUE, __builtin_return_address(0)); in dhdpcie_init_shared_addr()
14185 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8 *)&val, sizeof(val)); in dhdpcie_init_shared_addr()
14343 dhdpcie_cc_nvmshadow(dhd_bus_t *bus, struct bcmstrbuf *b) in dhdpcie_cc_nvmshadow() argument
14358 cur_coreid = si_coreid(bus->sih); in dhdpcie_cc_nvmshadow()
14360 chipcregs = (chipcregs_t *)si_setcore(bus->sih, CC_CORE_ID, 0); in dhdpcie_cc_nvmshadow()
14363 chipc_corerev = si_corerev(bus->sih); in dhdpcie_cc_nvmshadow()
14372 if (((uint16)bus->sih->chip != BCM4350_CHIP_ID) && !BCM4345_CHIP((uint16)bus->sih->chip) && in dhdpcie_cc_nvmshadow()
14373 ((uint16)bus->sih->chip != BCM4355_CHIP_ID) && in dhdpcie_cc_nvmshadow()
14374 ((uint16)bus->sih->chip != BCM4364_CHIP_ID)) { in dhdpcie_cc_nvmshadow()
14474 if (bus->regs == NULL) { in dhdpcie_cc_nvmshadow()
14487 nvm_shadow = (volatile uint16 *)si_setcore(bus->sih, GCI_CORE_ID, 0); in dhdpcie_cc_nvmshadow()
14513 si_setcore(bus->sih, cur_coreid, 0); in dhdpcie_cc_nvmshadow()
14519 void dhd_bus_clean_flow_ring(dhd_bus_t *bus, void *node) in dhd_bus_clean_flow_ring() argument
14532 dhd_tcpack_info_tbl_clean(bus->dhd); in dhd_bus_clean_flow_ring()
14537 if (!bus->dhd->hp2p_ring_more) { in dhd_bus_clean_flow_ring()
14538 bus->dhd->hp2p_ring_more = TRUE; in dhd_bus_clean_flow_ring()
14544 /* clean up BUS level info */ in dhd_bus_clean_flow_ring()
14548 while ((pkt = dhd_flow_queue_dequeue(bus->dhd, queue)) != NULL) { in dhd_bus_clean_flow_ring()
14549 PKTFREE(bus->dhd->osh, pkt, TRUE); in dhd_bus_clean_flow_ring()
14554 dhd_flow_queue_reinit(bus->dhd, queue, bus->dhd->conf->flow_ring_queue_threshold); in dhd_bus_clean_flow_ring()
14561 DHD_FLOWRING_LIST_LOCK(bus->dhd->flowring_list_lock, flags); in dhd_bus_clean_flow_ring()
14564 DHD_FLOWRING_LIST_UNLOCK(bus->dhd->flowring_list_lock, flags); in dhd_bus_clean_flow_ring()
14567 dhd_prot_flowrings_pool_release(bus->dhd, in dhd_bus_clean_flow_ring()
14571 dhd_flowid_free(bus->dhd, flow_ring_node->flow_info.ifindex, in dhd_bus_clean_flow_ring()
14580 dhd_bus_flow_ring_create_request(dhd_bus_t *bus, void *arg) in dhd_bus_flow_ring_create_request() argument
14587 if (dhd_prot_flow_ring_create(bus->dhd, flow_ring_node) != BCME_OK) in dhd_bus_flow_ring_create_request()
14595 dhd_bus_flow_ring_create_response(dhd_bus_t *bus, uint16 flowid, int32 status) in dhd_bus_flow_ring_create_response() argument
14603 if (flowid > bus->dhd->max_tx_flowid) { in dhd_bus_flow_ring_create_response()
14605 flowid, bus->dhd->max_tx_flowid)); in dhd_bus_flow_ring_create_response()
14609 flow_ring_node = DHD_FLOW_RING(bus->dhd, flowid); in dhd_bus_flow_ring_create_response()
14627 dhd_bus_clean_flow_ring(bus, flow_ring_node); in dhd_bus_flow_ring_create_response()
14651 DHD_FLOWRING_LIST_LOCK(bus->dhd->flowring_list_lock, flags); in dhd_bus_flow_ring_create_response()
14652 dll_prepend(&bus->flowring_active_list, &flow_ring_node->list); in dhd_bus_flow_ring_create_response()
14653 DHD_FLOWRING_LIST_UNLOCK(bus->dhd->flowring_list_lock, flags); in dhd_bus_flow_ring_create_response()
14655 dhd_bus_schedule_queue(bus, flowid, FALSE); /* from queue to flowring */ in dhd_bus_flow_ring_create_response()
14661 dhd_bus_flow_ring_delete_request(dhd_bus_t *bus, void *arg) in dhd_bus_flow_ring_delete_request() argument
14676 dhd_tcpack_info_tbl_clean(bus->dhd); in dhd_bus_flow_ring_delete_request()
14689 while ((pkt = dhd_flow_queue_dequeue(bus->dhd, queue)) != NULL) { in dhd_bus_flow_ring_delete_request()
14690 PKTFREE(bus->dhd->osh, pkt, TRUE); in dhd_bus_flow_ring_delete_request()
14697 dhd_prot_flow_ring_delete(bus->dhd, flow_ring_node); in dhd_bus_flow_ring_delete_request()
14703 dhd_bus_flow_ring_delete_response(dhd_bus_t *bus, uint16 flowid, uint32 status) in dhd_bus_flow_ring_delete_response() argument
14710 if (flowid > bus->dhd->max_tx_flowid) { in dhd_bus_flow_ring_delete_response()
14712 flowid, bus->dhd->max_tx_flowid)); in dhd_bus_flow_ring_delete_response()
14716 flow_ring_node = DHD_FLOW_RING(bus->dhd, flowid); in dhd_bus_flow_ring_delete_response()
14736 dhd_bus_clean_flow_ring(bus, flow_ring_node); in dhd_bus_flow_ring_delete_response()
14742 int dhd_bus_flow_ring_flush_request(dhd_bus_t *bus, void *arg) in dhd_bus_flow_ring_flush_request() argument
14764 dhd_tcpack_info_tbl_clean(bus->dhd); in dhd_bus_flow_ring_flush_request()
14768 while ((pkt = dhd_flow_queue_dequeue(bus->dhd, queue)) != NULL) { in dhd_bus_flow_ring_flush_request()
14769 PKTFREE(bus->dhd->osh, pkt, TRUE); in dhd_bus_flow_ring_flush_request()
14776 dhd_prot_flow_ring_flush(bus->dhd, flow_ring_node); in dhd_bus_flow_ring_flush_request()
14782 dhd_bus_flow_ring_flush_response(dhd_bus_t *bus, uint16 flowid, uint32 status) in dhd_bus_flow_ring_flush_response() argument
14793 if (flowid > bus->dhd->max_tx_flowid) { in dhd_bus_flow_ring_flush_response()
14795 flowid, bus->dhd->max_tx_flowid)); in dhd_bus_flow_ring_flush_response()
14799 flow_ring_node = DHD_FLOW_RING(bus->dhd, flowid); in dhd_bus_flow_ring_flush_response()
14818 dhd_bus_max_h2d_queues(struct dhd_bus *bus) in dhd_bus_max_h2d_queues() argument
14820 return bus->max_submission_rings; in dhd_bus_max_h2d_queues()
14833 dhdp->bus->is_linkdown = val; in dhd_bus_set_linkdown()
14839 return dhdp->bus->is_linkdown; in dhd_bus_get_linkdown()
14845 return dhdp->bus->cto_triggered; in dhd_bus_get_cto()
14851 dhd_bus_flow_ring_resume_request(dhd_bus_t *bus, void *arg) in dhd_bus_flow_ring_resume_request() argument
14860 dhd_prot_flow_ring_resume(bus->dhd, flow_ring_node); in dhd_bus_flow_ring_resume_request()
14867 dhd_bus_flow_ring_resume_response(dhd_bus_t *bus, uint16 flowid, int32 status) in dhd_bus_flow_ring_resume_response() argument
14874 flow_ring_node = DHD_FLOW_RING(bus->dhd, flowid); in dhd_bus_flow_ring_resume_response()
14888 dhd_bus_schedule_queue(bus, flowid, FALSE); in dhd_bus_flow_ring_resume_response()
14894 dhd_bus_check_idle_scan(dhd_bus_t *bus) in dhd_bus_check_idle_scan() argument
14900 diff = time_stamp - bus->active_list_last_process_ts; in dhd_bus_check_idle_scan()
14903 dhd_bus_idle_scan(bus); in dhd_bus_check_idle_scan()
14904 bus->active_list_last_process_ts = OSL_SYSUPTIME(); in dhd_bus_check_idle_scan()
14912 dhd_bus_idle_scan(dhd_bus_t *bus) in dhd_bus_idle_scan() argument
14922 DHD_FLOWRING_LIST_LOCK(bus->dhd->flowring_list_lock, flags); in dhd_bus_idle_scan()
14924 for (item = dll_tail_p(&bus->flowring_active_list); in dhd_bus_idle_scan()
14925 !dll_end(&bus->flowring_active_list, item); item = prev) { in dhd_bus_idle_scan()
14930 if (flow_ring_node->flowid == (bus->max_submission_rings - 1)) in dhd_bus_idle_scan()
14938 __dhd_flow_ring_delete_from_active_list(bus, flow_ring_node); in dhd_bus_idle_scan()
14947 __dhd_flow_ring_delete_from_active_list(bus, flow_ring_node); in dhd_bus_idle_scan()
14953 dhd_prot_flow_ring_batch_suspend_request(bus->dhd, ringid, count); in dhd_bus_idle_scan()
14965 dhd_prot_flow_ring_batch_suspend_request(bus->dhd, ringid, count); in dhd_bus_idle_scan()
14968 DHD_FLOWRING_LIST_UNLOCK(bus->dhd->flowring_list_lock, flags); in dhd_bus_idle_scan()
14973 void dhd_flow_ring_move_to_active_list_head(struct dhd_bus *bus, flow_ring_node_t *flow_ring_node) in dhd_flow_ring_move_to_active_list_head() argument
14978 DHD_FLOWRING_LIST_LOCK(bus->dhd->flowring_list_lock, flags); in dhd_flow_ring_move_to_active_list_head()
14980 list = dll_head_p(&bus->flowring_active_list); in dhd_flow_ring_move_to_active_list_head()
14983 dll_prepend(&bus->flowring_active_list, &flow_ring_node->list); in dhd_flow_ring_move_to_active_list_head()
14989 DHD_FLOWRING_LIST_UNLOCK(bus->dhd->flowring_list_lock, flags); in dhd_flow_ring_move_to_active_list_head()
14994 void dhd_flow_ring_add_to_active_list(struct dhd_bus *bus, flow_ring_node_t *flow_ring_node) in dhd_flow_ring_add_to_active_list() argument
14998 DHD_FLOWRING_LIST_LOCK(bus->dhd->flowring_list_lock, flags); in dhd_flow_ring_add_to_active_list()
15000 dll_prepend(&bus->flowring_active_list, &flow_ring_node->list); in dhd_flow_ring_add_to_active_list()
15004 DHD_FLOWRING_LIST_UNLOCK(bus->dhd->flowring_list_lock, flags); in dhd_flow_ring_add_to_active_list()
15008 void __dhd_flow_ring_delete_from_active_list(struct dhd_bus *bus, flow_ring_node_t *flow_ring_node) in __dhd_flow_ring_delete_from_active_list() argument
15013 void dhd_flow_ring_delete_from_active_list(struct dhd_bus *bus, flow_ring_node_t *flow_ring_node) in dhd_flow_ring_delete_from_active_list() argument
15017 DHD_FLOWRING_LIST_LOCK(bus->dhd->flowring_list_lock, flags); in dhd_flow_ring_delete_from_active_list()
15019 __dhd_flow_ring_delete_from_active_list(bus, flow_ring_node); in dhd_flow_ring_delete_from_active_list()
15021 DHD_FLOWRING_LIST_UNLOCK(bus->dhd->flowring_list_lock, flags); in dhd_flow_ring_delete_from_active_list()
15029 dhdpcie_bus_start_host_dev(struct dhd_bus *bus) in dhdpcie_bus_start_host_dev() argument
15031 return dhdpcie_start_host_dev(bus); in dhdpcie_bus_start_host_dev()
15035 dhdpcie_bus_stop_host_dev(struct dhd_bus *bus) in dhdpcie_bus_stop_host_dev() argument
15037 return dhdpcie_stop_host_dev(bus); in dhdpcie_bus_stop_host_dev()
15041 dhdpcie_bus_disable_device(struct dhd_bus *bus) in dhdpcie_bus_disable_device() argument
15043 return dhdpcie_disable_device(bus); in dhdpcie_bus_disable_device()
15047 dhdpcie_bus_enable_device(struct dhd_bus *bus) in dhdpcie_bus_enable_device() argument
15049 return dhdpcie_enable_device(bus); in dhdpcie_bus_enable_device()
15053 dhdpcie_bus_alloc_resource(struct dhd_bus *bus) in dhdpcie_bus_alloc_resource() argument
15055 return dhdpcie_alloc_resource(bus); in dhdpcie_bus_alloc_resource()
15059 dhdpcie_bus_free_resource(struct dhd_bus *bus) in dhdpcie_bus_free_resource() argument
15061 dhdpcie_free_resource(bus); in dhdpcie_bus_free_resource()
15065 dhd_bus_request_irq(struct dhd_bus *bus) in dhd_bus_request_irq() argument
15067 return dhdpcie_bus_request_irq(bus); in dhd_bus_request_irq()
15071 dhdpcie_bus_dongle_attach(struct dhd_bus *bus) in dhdpcie_bus_dongle_attach() argument
15073 return dhdpcie_dongle_attach(bus); in dhdpcie_bus_dongle_attach()
15077 dhd_bus_release_dongle(struct dhd_bus *bus) in dhd_bus_release_dongle() argument
15084 if (bus) { in dhd_bus_release_dongle()
15085 osh = bus->osh; in dhd_bus_release_dongle()
15088 if (bus->dhd) { in dhd_bus_release_dongle()
15093 dongle_isolation = bus->dhd->dongle_isolation; in dhd_bus_release_dongle()
15094 dhdpcie_bus_release_dongle(bus, osh, dongle_isolation, TRUE); in dhd_bus_release_dongle()
15103 dhdpcie_cto_cfg_init(struct dhd_bus *bus, bool enable) in dhdpcie_cto_cfg_init() argument
15106 dhdpcie_bus_cfg_write_dword(bus, PCI_INT_MASK, 4, in dhdpcie_cto_cfg_init()
15109 dhdpcie_bus_cfg_write_dword(bus, PCI_INT_MASK, 4, 0); in dhdpcie_cto_cfg_init()
15115 dhdpcie_cto_init(struct dhd_bus *bus, bool enable) in dhdpcie_cto_init() argument
15117 volatile void *regsva = (volatile void *)bus->regs; in dhdpcie_cto_init()
15119 uint16 chipid = dhd_get_chipid(bus); in dhdpcie_cto_init()
15122 bus->cto_enable = enable; in dhdpcie_cto_init()
15124 dhdpcie_cto_cfg_init(bus, enable); in dhdpcie_cto_init()
15127 if (bus->cto_threshold == 0) { in dhdpcie_cto_init()
15131 bus->cto_threshold = PCIE_CTO_TO_THRESH_DEFAULT_REV69; in dhdpcie_cto_init()
15133 bus->cto_threshold = PCIE_CTO_TO_THRESH_DEFAULT; in dhdpcie_cto_init()
15136 val = ((bus->cto_threshold << PCIE_CTO_TO_THRESHOLD_SHIFT) & in dhdpcie_cto_init()
15142 pcie_corereg(bus->osh, regsva, OFFSETOF(sbpcieregs_t, ctoctrl), ~0, val); in dhdpcie_cto_init()
15144 pcie_corereg(bus->osh, regsva, OFFSETOF(sbpcieregs_t, ctoctrl), ~0, 0); in dhdpcie_cto_init()
15147 ctoctrl = pcie_corereg(bus->osh, regsva, OFFSETOF(sbpcieregs_t, ctoctrl), 0, 0); in dhdpcie_cto_init()
15150 __FUNCTION__, ctoctrl, bus->cto_enable, chipid)); in dhdpcie_cto_init()
15156 dhdpcie_cto_error_recovery(struct dhd_bus *bus) in dhdpcie_cto_error_recovery() argument
15162 pci_intmask = dhdpcie_bus_cfg_read_dword(bus, PCI_INT_MASK, 4); in dhdpcie_cto_error_recovery()
15163 dhdpcie_bus_cfg_write_dword(bus, PCI_INT_MASK, 4, pci_intmask & ~PCI_CTO_INT_MASK); in dhdpcie_cto_error_recovery()
15165 DHD_OS_WAKE_LOCK(bus->dhd); in dhdpcie_cto_error_recovery()
15167 DHD_ERROR(("--- CTO Triggered --- %d\n", bus->pwr_req_ref)); in dhdpcie_cto_error_recovery()
15172 dhd_bus_dump_dar_registers(bus); in dhdpcie_cto_error_recovery()
15175 val = dhdpcie_bus_cfg_read_dword(bus, PCI_SPROM_CONTROL, 4); in dhdpcie_cto_error_recovery()
15176 dhdpcie_bus_cfg_write_dword(bus, PCI_SPROM_CONTROL, 4, val | SPROM_CFG_TO_SB_RST); in dhdpcie_cto_error_recovery()
15180 err_status = si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_cto_error_recovery()
15181 DAR_ERRLOG(bus->sih->buscorerev), in dhdpcie_cto_error_recovery()
15184 si_corereg(bus->sih, bus->sih->buscoreidx, in dhdpcie_cto_error_recovery()
15185 DAR_ERRLOG(bus->sih->buscorerev), in dhdpcie_cto_error_recovery()
15195 DHD_OS_WAKE_UNLOCK(bus->dhd); in dhdpcie_cto_error_recovery()
15201 dhdpcie_bus_cfg_write_dword(bus, PCI_INT_STATUS, 4, PCI_CTO_INT_MASK); in dhdpcie_cto_error_recovery()
15207 val = dhdpcie_bus_cfg_read_dword(bus, PCI_SPROM_CONTROL, 4); in dhdpcie_cto_error_recovery()
15211 dhdpcie_bus_cfg_write_dword(bus, PCI_SPROM_CONTROL, 4, val & ~SPROM_CFG_TO_SB_RST); in dhdpcie_cto_error_recovery()
15213 val = dhdpcie_bus_cfg_read_dword(bus, PCI_SPROM_CONTROL, 4); in dhdpcie_cto_error_recovery()
15217 DHD_OS_WAKE_UNLOCK(bus->dhd); in dhdpcie_cto_error_recovery()
15223 dhdpcie_ssreset_dis_enum_rst(struct dhd_bus *bus) in dhdpcie_ssreset_dis_enum_rst() argument
15227 val = dhdpcie_bus_cfg_read_dword(bus, PCIE_CFG_SUBSYSTEM_CONTROL, 4); in dhdpcie_ssreset_dis_enum_rst()
15228 dhdpcie_bus_cfg_write_dword(bus, PCIE_CFG_SUBSYSTEM_CONTROL, 4, in dhdpcie_ssreset_dis_enum_rst()
15239 dhdpcie_init_d11status(struct dhd_bus *bus) in dhdpcie_init_d11status() argument
15245 if (bus->pcie_sh->flags2 & PCIE_SHARED2_D2H_D11_TX_STATUS) { in dhdpcie_init_d11status()
15246 flags2 = bus->pcie_sh->flags2; in dhdpcie_init_d11status()
15247 addr = bus->shared_addr + OFFSETOF(pciedev_shared_t, flags2); in dhdpcie_init_d11status()
15249 ret = dhdpcie_bus_membytes(bus, TRUE, addr, in dhdpcie_init_d11status()
15256 bus->pcie_sh->flags2 = flags2; in dhdpcie_init_d11status()
15257 bus->dhd->d11_tx_status = TRUE; in dhdpcie_init_d11status()
15264 dhdpcie_init_d11status(struct dhd_bus *bus) in dhdpcie_init_d11status() argument
15271 dhdpcie_get_max_eventbufpost(struct dhd_bus *bus) in dhdpcie_get_max_eventbufpost() argument
15274 if (bus->pcie_sh->flags2 & (0x1 << PCIE_SHARED_EVENT_BUF_POOL_MAX_POS)) { in dhdpcie_get_max_eventbufpost()
15276 } else if (bus->pcie_sh->flags2 & (0x2 << PCIE_SHARED_EVENT_BUF_POOL_MAX_POS)) { in dhdpcie_get_max_eventbufpost()
15278 } else if (bus->pcie_sh->flags2 & (0x3 << PCIE_SHARED_EVENT_BUF_POOL_MAX_POS)) { in dhdpcie_get_max_eventbufpost()
15289 err = dhdpcie_oob_intr_register(dhdp->bus); in dhd_bus_oob_intr_register()
15298 dhdpcie_oob_intr_unregister(dhdp->bus); in dhd_bus_oob_intr_unregister()
15306 dhdpcie_oob_intr_set(dhdp->bus, enable); in dhd_bus_oob_intr_set()
15315 irq_num = dhdpcie_get_oob_irq_num(dhdp->bus); in dhd_bus_get_oob_irq_num()
15322 dhd_bus_flow_ring_cnt_update(dhd_bus_t *bus, uint16 flowid, uint32 txstatus) in dhd_bus_flow_ring_cnt_update() argument
15333 if (bus->dhd->d2h_sync_mode) in dhd_bus_flow_ring_cnt_update()
15345 flow_ring_node = DHD_FLOW_RING(bus->dhd, flowid); in dhd_bus_flow_ring_cnt_update()
15349 if_flow_lkup = (if_flow_lkup_t *)bus->dhd->if_flow_lkup; in dhd_bus_flow_ring_cnt_update()
15353 DHD_AWDL_STATS_LOCK(bus->dhd->awdl_stats_lock, flags); in dhd_bus_flow_ring_cnt_update()
15354 awdl_stats = &bus->dhd->awdl_stats[bus->dhd->awdl_tx_status_slot]; in dhd_bus_flow_ring_cnt_update()
15356 DHD_AWDL_STATS_UNLOCK(bus->dhd->awdl_stats_lock, flags); in dhd_bus_flow_ring_cnt_update()
15364 dhdpcie_bus_get_pcie_hostready_supported(dhd_bus_t *bus) in dhdpcie_bus_get_pcie_hostready_supported() argument
15366 return bus->dhd->d2h_hostrdy_supported; in dhdpcie_bus_get_pcie_hostready_supported()
15372 dhd_bus_t *bus = pub->bus; in dhd_pcie_dump_core_regs() local
15374 uint32 core_addr = SI_ENUM_BASE(bus->sih) + coreoffset; in dhd_pcie_dump_core_regs()
15378 core_addr = SI_ENUM_BASE(bus->sih) + coreoffset + first_addr; in dhd_pcie_dump_core_regs()
15379 if (serialized_backplane_access(bus, core_addr, 4, &value, TRUE) != BCME_OK) { in dhd_pcie_dump_core_regs()
15388 dhdpcie_bus_get_pcie_idma_supported(dhd_bus_t *bus) in dhdpcie_bus_get_pcie_idma_supported() argument
15390 if (!bus->dhd) in dhdpcie_bus_get_pcie_idma_supported()
15392 else if (bus->idma_enabled) { in dhdpcie_bus_get_pcie_idma_supported()
15393 return bus->dhd->idma_enable; in dhdpcie_bus_get_pcie_idma_supported()
15400 dhdpcie_bus_get_pcie_ifrm_supported(dhd_bus_t *bus) in dhdpcie_bus_get_pcie_ifrm_supported() argument
15402 if (!bus->dhd) in dhdpcie_bus_get_pcie_ifrm_supported()
15404 else if (bus->ifrm_enabled) { in dhdpcie_bus_get_pcie_ifrm_supported()
15405 return bus->dhd->ifrm_enable; in dhdpcie_bus_get_pcie_ifrm_supported()
15412 dhdpcie_bus_get_pcie_dar_supported(dhd_bus_t *bus) in dhdpcie_bus_get_pcie_dar_supported() argument
15414 if (!bus->dhd) { in dhdpcie_bus_get_pcie_dar_supported()
15416 } else if (bus->dar_enabled) { in dhdpcie_bus_get_pcie_dar_supported()
15417 return bus->dhd->dar_enable; in dhdpcie_bus_get_pcie_dar_supported()
15425 dhdpcie_bus_get_hp2p_supported(dhd_bus_t *bus) in dhdpcie_bus_get_hp2p_supported() argument
15427 if (!bus->dhd) { in dhdpcie_bus_get_hp2p_supported()
15429 } else if (bus->dhd->hp2p_enable) { in dhdpcie_bus_get_hp2p_supported()
15430 return bus->dhd->hp2p_capable; in dhdpcie_bus_get_hp2p_supported()
15439 dhdpcie_bus_get_pcie_oob_dw_supported(dhd_bus_t *bus) in dhdpcie_bus_get_pcie_oob_dw_supported() argument
15441 if (!bus->dhd) in dhdpcie_bus_get_pcie_oob_dw_supported()
15443 if (bus->oob_enabled) { in dhdpcie_bus_get_pcie_oob_dw_supported()
15444 return !bus->dhd->d2h_no_oob_dw; in dhdpcie_bus_get_pcie_oob_dw_supported()
15452 dhdpcie_bus_enab_pcie_dw(dhd_bus_t *bus, uint8 dw_option) in dhdpcie_bus_enab_pcie_dw() argument
15455 bus->dw_option = dw_option; in dhdpcie_bus_enab_pcie_dw()
15460 dhdpcie_bus_get_pcie_inband_dw_supported(dhd_bus_t *bus) in dhdpcie_bus_get_pcie_inband_dw_supported() argument
15462 if (!bus->dhd) in dhdpcie_bus_get_pcie_inband_dw_supported()
15464 if (bus->inb_enabled) { in dhdpcie_bus_get_pcie_inband_dw_supported()
15465 return bus->dhd->d2h_inband_dw; in dhdpcie_bus_get_pcie_inband_dw_supported()
15472 dhdpcie_bus_set_pcie_inband_dw_state(dhd_bus_t *bus, enum dhd_bus_ds_state state) in dhdpcie_bus_set_pcie_inband_dw_state() argument
15474 if (!INBAND_DW_ENAB(bus)) in dhdpcie_bus_set_pcie_inband_dw_state()
15478 bus->dhd->ds_state = state; in dhdpcie_bus_set_pcie_inband_dw_state()
15480 bus->ds_exit_timeout = 100; in dhdpcie_bus_set_pcie_inband_dw_state()
15483 bus->host_sleep_exit_timeout = 100; in dhdpcie_bus_set_pcie_inband_dw_state()
15486 bus->ds_exit_timeout = 0; in dhdpcie_bus_set_pcie_inband_dw_state()
15489 bus->host_sleep_exit_timeout = 0; in dhdpcie_bus_set_pcie_inband_dw_state()
15494 dhdpcie_bus_get_pcie_inband_dw_state(dhd_bus_t *bus) in dhdpcie_bus_get_pcie_inband_dw_state() argument
15496 if (!INBAND_DW_ENAB(bus)) in dhdpcie_bus_get_pcie_inband_dw_state()
15498 return bus->dhd->ds_state; in dhdpcie_bus_get_pcie_inband_dw_state()
15504 dhd_bus_mmio_trace(dhd_bus_t *bus, uint32 addr, uint32 value, bool set) in dhd_bus_mmio_trace() argument
15506 uint32 cnt = bus->mmio_trace_count % MAX_MMIO_TRACE_SIZE; in dhd_bus_mmio_trace()
15510 tmp_cnt = (bus->mmio_trace_count) ? ((bus->mmio_trace_count - 1) in dhd_bus_mmio_trace()
15514 DIV_U64_BY_U64(bus->mmio_trace[tmp_cnt].timestamp, NSEC_PER_USEC)) in dhd_bus_mmio_trace()
15515 > MIN_MMIO_TRACE_TIME) || (bus->mmio_trace[tmp_cnt].value != in dhd_bus_mmio_trace()
15517 bus->mmio_trace_count++; in dhd_bus_mmio_trace()
15521 bus->mmio_trace[cnt].timestamp = ts_cur; in dhd_bus_mmio_trace()
15522 bus->mmio_trace[cnt].addr = addr; in dhd_bus_mmio_trace()
15523 bus->mmio_trace[cnt].set = set; in dhd_bus_mmio_trace()
15524 bus->mmio_trace[cnt].value = value; in dhd_bus_mmio_trace()
15528 dhd_dump_bus_mmio_trace(dhd_bus_t *bus, struct bcmstrbuf *strbuf) in dhd_dump_bus_mmio_trace() argument
15533 dumpsz = bus->mmio_trace_count < MAX_MMIO_TRACE_SIZE ? in dhd_dump_bus_mmio_trace()
15534 bus->mmio_trace_count : MAX_MMIO_TRACE_SIZE; in dhd_dump_bus_mmio_trace()
15545 GET_SEC_USEC(bus->mmio_trace[i].timestamp), in dhd_dump_bus_mmio_trace()
15546 bus->mmio_trace[i].addr, in dhd_dump_bus_mmio_trace()
15547 bus->mmio_trace[i].set ? "W" : "R", in dhd_dump_bus_mmio_trace()
15548 bus->mmio_trace[i].value); in dhd_dump_bus_mmio_trace()
15555 dhd_bus_ds_trace(dhd_bus_t *bus, uint32 dsval, bool d2h, enum dhd_bus_ds_state inbstate) in dhd_bus_ds_trace() argument
15557 dhd_bus_ds_trace(dhd_bus_t *bus, uint32 dsval, bool d2h) in dhd_bus_ds_trace()
15560 uint32 cnt = bus->ds_trace_count % MAX_DS_TRACE_SIZE; in dhd_bus_ds_trace()
15562 bus->ds_trace[cnt].timestamp = OSL_LOCALTIME_NS(); in dhd_bus_ds_trace()
15563 bus->ds_trace[cnt].d2h = d2h; in dhd_bus_ds_trace()
15564 bus->ds_trace[cnt].dsval = dsval; in dhd_bus_ds_trace()
15566 bus->ds_trace[cnt].inbstate = inbstate; in dhd_bus_ds_trace()
15568 bus->ds_trace_count ++; in dhd_bus_ds_trace()
15647 dhd_dump_bus_ds_trace(dhd_bus_t *bus, struct bcmstrbuf *strbuf) in dhd_dump_bus_ds_trace() argument
15652 dumpsz = bus->ds_trace_count < MAX_DS_TRACE_SIZE ? in dhd_dump_bus_ds_trace()
15653 bus->ds_trace_count : MAX_DS_TRACE_SIZE; in dhd_dump_bus_ds_trace()
15664 bus->ds_trace[i].timestamp, in dhd_dump_bus_ds_trace()
15665 bus->ds_trace[i].d2h ? "D2H":"H2D", in dhd_dump_bus_ds_trace()
15666 dhd_convert_dsval(bus->ds_trace[i].dsval, bus->ds_trace[i].d2h), in dhd_dump_bus_ds_trace()
15667 dhd_convert_inb_state_names(bus->ds_trace[i].inbstate)); in dhd_dump_bus_ds_trace()
15673 bus->ds_trace[i].timestamp, in dhd_dump_bus_ds_trace()
15674 bus->ds_trace[i].d2h ? "D2H":"H2D", in dhd_dump_bus_ds_trace()
15675 bus->ds_trace[i].dsval); in dhd_dump_bus_ds_trace()
15682 dhd_bus_dump_trap_info(dhd_bus_t *bus, struct bcmstrbuf *strbuf) in dhd_bus_dump_trap_info() argument
15684 trap_t *tr = &bus->dhd->last_trap_info; in dhd_bus_dump_trap_info()
15693 ltoh32(bus->pcie_sh->trap_addr), in dhd_bus_dump_trap_info()
15704 struct dhd_bus *bus = dhdp->bus; in dhd_bus_readwrite_bp_addr() local
15706 if (serialized_backplane_access(bus, addr, size, data, read) != BCME_OK) { in dhd_bus_readwrite_bp_addr()
15717 return dhd->bus->idletime; in dhd_get_idletime()
15723 return dhd->bus->rpm_enabled; in dhd_get_rpm_state()
15730 dhd->bus->rpm_enabled = state; in dhd_set_rpm_state()
15737 if (serialized_backplane_access(dhd->bus, addr, sizeof(uint), val, read) != BCME_OK) { in dhd_sbreg_op()
15774 if (serialized_backplane_access(dhd->bus, addr, in dhdpcie_get_sssr_fifo_dump()
15792 si_t *sih = dhd->bus->sih; in dhdpcie_get_sssr_dig_dump()
15843 int err = dhdpcie_bus_membytes(dhd->bus, FALSE, addr_reg, (uint8 *)buf, in dhdpcie_get_sssr_dig_dump()
15861 if (serialized_backplane_access(dhd->bus, addr, sizeof(uint), in dhdpcie_get_sssr_dig_dump()
15933 uint32 endaddr = dhd->bus->dongle_ram_base + dhd->bus->ramsize - 4; in dhdpcie_get_etd_preserve_logs()
15959 if ((baseaddr < dhd->bus->dongle_ram_base) || in dhdpcie_get_etd_preserve_logs()
15967 err = dhdpcie_bus_membytes(dhd->bus, FALSE, in dhdpcie_get_etd_preserve_logs()
15984 if ((baseaddr < dhd->bus->dongle_ram_base) || in dhdpcie_get_etd_preserve_logs()
15991 err = dhdpcie_bus_membytes(dhd->bus, FALSE, in dhdpcie_get_etd_preserve_logs()
16344 if (MULTIBP_ENAB(dhd->bus->sih)) { in dhdpcie_arm_clear_clk_req()
16346 if (dhd->bus->coreid == ARMCA7_CORE_ID) { in dhdpcie_arm_clear_clk_req()
16347 cfgval = dhdpcie_bus_cfg_read_dword(dhd->bus, in dhdpcie_arm_clear_clk_req()
16349 dhdpcie_bus_cfg_write_dword(dhd->bus, PCIE_CFG_SUBSYSTEM_CONTROL, 4, in dhdpcie_arm_clear_clk_req()
16395 if (MULTIBP_ENAB(dhd->bus->sih) && (dhd->bus->coreid != ARMCA7_CORE_ID)) { in dhdpcie_arm_resume_clk_req()
16655 if (dhd->bus->is_linkdown) { in dhdpcie_sssr_dump()
16662 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhdpcie_sssr_dump()
16664 si_corereg(dhd->bus->sih, 0, OFFSETOF(chipcregs_t, powerctl), 0, 0), in dhdpcie_sssr_dump()
16665 PMU_REG(dhd->bus->sih, retention_ctl, 0, 0), in dhdpcie_sssr_dump()
16666 PMU_REG(dhd->bus->sih, res_state, 0, 0))); in dhdpcie_sssr_dump()
16683 if (MULTIBP_ENAB(dhd->bus->sih)) { in dhdpcie_sssr_dump()
16684 dhd_bus_pcie_pwr_req_wl_domain(dhd->bus, OFFSETOF(chipcregs_t, powerctl), FALSE); in dhdpcie_sssr_dump()
16692 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhdpcie_sssr_dump()
16694 si_corereg(dhd->bus->sih, 0, OFFSETOF(chipcregs_t, powerctl), 0, 0), in dhdpcie_sssr_dump()
16695 PMU_REG(dhd->bus->sih, retention_ctl, 0, 0), in dhdpcie_sssr_dump()
16696 PMU_REG(dhd->bus->sih, res_state, 0, 0))); in dhdpcie_sssr_dump()
16698 if (MULTIBP_ENAB(dhd->bus->sih)) { in dhdpcie_sssr_dump()
16699 dhd_bus_pcie_pwr_req_wl_domain(dhd->bus, OFFSETOF(chipcregs_t, powerctl), TRUE); in dhdpcie_sssr_dump()
16705 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhdpcie_sssr_dump()
16707 si_corereg(dhd->bus->sih, 0, OFFSETOF(chipcregs_t, powerctl), 0, 0), in dhdpcie_sssr_dump()
16708 PMU_REG(dhd->bus->sih, retention_ctl, 0, 0), in dhdpcie_sssr_dump()
16709 PMU_REG(dhd->bus->sih, res_state, 0, 0))); in dhdpcie_sssr_dump()
16741 if (dhd->bus->is_linkdown) { in dhdpcie_fis_trigger()
16757 PMU_REG(dhd->bus->sih, fis_ctrl_status, PMU_FIS_FORCEON_ALL_MASK, PMU_FIS_FORCEON_ALL_MASK); in dhdpcie_fis_trigger()
16759 fis_ctrl_status = PMU_REG(dhd->bus->sih, fis_ctrl_status, 0, 0); in dhdpcie_fis_trigger()
16763 cfg_status_cmd = dhd_pcie_config_read(dhd->bus, PCIECFGREG_STATUS_CMD, sizeof(uint32)); in dhdpcie_fis_trigger()
16764 cfg_pmcsr = dhd_pcie_config_read(dhd->bus, PCIE_CFG_PMCSR, sizeof(uint32)); in dhdpcie_fis_trigger()
16768 DHD_PCIE_CONFIG_SAVE(dhd->bus); in dhdpcie_fis_trigger()
16771 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhdpcie_fis_trigger()
16772 DAR_FIS_CTRL(dhd->bus->sih->buscorerev), ~0, DAR_FIS_START_MASK); in dhdpcie_fis_trigger()
16783 dhdpcie_bus_stop_host_dev(dhd->bus); in dhdpcie_fis_trigger()
16786 dhdpcie_bus_start_host_dev(dhd->bus); in dhdpcie_fis_trigger()
16788 dhdpcie_bus_enable_device(dhd->bus); in dhdpcie_fis_trigger()
16792 cfg_status_cmd = dhd_pcie_config_read(dhd->bus, PCIECFGREG_STATUS_CMD, sizeof(uint32)); in dhdpcie_fis_trigger()
16793 cfg_pmcsr = dhd_pcie_config_read(dhd->bus, PCIE_CFG_PMCSR, sizeof(uint32)); in dhdpcie_fis_trigger()
16798 DHD_PCIE_CONFIG_RESTORE(dhd->bus); in dhdpcie_fis_trigger()
16800 cfg_status_cmd = dhd_pcie_config_read(dhd->bus, PCIECFGREG_STATUS_CMD, sizeof(uint32)); in dhdpcie_fis_trigger()
16801 cfg_pmcsr = dhd_pcie_config_read(dhd->bus, PCIE_CFG_PMCSR, sizeof(uint32)); in dhdpcie_fis_trigger()
16810 int ret = dhdpcie_set_master_and_d0_pwrstate(dhd->bus); in dhdpcie_fis_trigger()
16816 dhd_pcie_config_read(dhd->bus, PCIECFGREG_STATUS_CMD, sizeof(uint32)); in dhdpcie_fis_trigger()
16817 cfg_pmcsr = dhd_pcie_config_read(dhd->bus, PCIE_CFG_PMCSR, sizeof(uint32)); in dhdpcie_fis_trigger()
16904 if (dhd->bus->is_linkdown) { in dhdpcie_fis_dump()
16910 PMU_REG(dhd->bus->sih, min_res_mask, ~0, in dhdpcie_fis_dump()
16911 PMU_REG(dhd->bus->sih, max_res_mask, 0, 0)); in dhdpcie_fis_dump()
16924 PMU_REG(dhd->bus->sih, fis_ctrl_status, PMU_CLEAR_FIS_DONE_MASK, PMU_CLEAR_FIS_DONE_MASK); in dhdpcie_fis_dump()
16958 if ((ret = dhdpcie_bus_membytes(dhd->bus, FALSE, etbinfo_addr, in dhd_bus_get_etb_info()
16972 if ((ret = dhdpcie_bus_membytes(dhd->bus, FALSE, addr, in dhd_bus_get_sdtc_etb()
16983 BCMFASTPATH(dhd_bus_rx_bt_log)(struct dhd_bus *bus, void* pkt) in BCMFASTPATH()
16985 dhd_rx_bt_log(bus->dhd, pkt); in BCMFASTPATH()
16993 return &dhd->bus->wake_counts; in dhd_bus_get_wakecount()
16998 return bcmpcie_set_get_wake(dhd->bus, 0); in dhd_bus_get_bus_wake()
17006 dhdpcie_wrt_rnd(struct dhd_bus *bus) in dhdpcie_wrt_rnd() argument
17012 uint32 addr = bus->dongle_ram_base + (bus->ramsize - BCM_NVRAM_OFFSET_TCM) - in dhdpcie_wrt_rnd()
17013 ((bus->nvram_csm & 0xffff)* BCM_NVRAM_IMG_COMPRS_FACTOR + sizeof(rnd_data)); in dhdpcie_wrt_rnd()
17019 dhdpcie_bus_membytes(bus, TRUE, addr, (uint8 *)&rnd_data, sizeof(rnd_data)); in dhdpcie_wrt_rnd()
17023 bus->ramtop_addr = addr; in dhdpcie_wrt_rnd()
17026 bus->dhd->rnd_buf = NULL; in dhdpcie_wrt_rnd()
17028 ret = dhd_get_rnd_info(bus->dhd); in dhdpcie_wrt_rnd()
17029 if (bus->dhd->rnd_buf) { in dhdpcie_wrt_rnd()
17032 dhdpcie_bus_membytes(bus, TRUE, addr, bus->dhd->rnd_buf, bus->dhd->rnd_len); in dhdpcie_wrt_rnd()
17035 dhd_dump_rnd_info(bus->dhd, bus->dhd->rnd_buf, bus->dhd->rnd_len); in dhdpcie_wrt_rnd()
17037 /* bus->dhd->rnd_buf is allocated in dhd_get_rnd_info, free here */ in dhdpcie_wrt_rnd()
17038 MFREE(bus->dhd->osh, bus->dhd->rnd_buf, bus->dhd->rnd_len); in dhdpcie_wrt_rnd()
17039 bus->dhd->rnd_buf = NULL; in dhdpcie_wrt_rnd()
17049 dhdpcie_bus_membytes(bus, TRUE, addr, rand_buf, count); in dhdpcie_wrt_rnd()
17053 dhd_dump_rnd_info(bus->dhd, rand_buf, count); in dhdpcie_wrt_rnd()
17056 bus->next_tlv = addr; in dhdpcie_wrt_rnd()
17065 return dhdp->bus->d2h_minidump; in dhd_bus_is_minidump_enabled()
17072 struct dhd_bus *bus = dhd->bus; in dhd_pcie_intr_count_dump() local
17077 bus->resume_intr_enable_count, bus->dpc_intr_enable_count)); in dhd_pcie_intr_count_dump()
17079 bus->isr_intr_disable_count, bus->suspend_intr_disable_count)); in dhd_pcie_intr_count_dump()
17082 bus->oob_intr_count, bus->oob_intr_enable_count, in dhd_pcie_intr_count_dump()
17083 bus->oob_intr_disable_count)); in dhd_pcie_intr_count_dump()
17085 dhdpcie_get_oob_irq_num(bus), in dhd_pcie_intr_count_dump()
17086 GET_SEC_USEC(bus->last_oob_irq_isr_time), in dhd_pcie_intr_count_dump()
17087 GET_SEC_USEC(bus->last_oob_irq_thr_time))); in dhd_pcie_intr_count_dump()
17090 GET_SEC_USEC(bus->last_oob_irq_enable_time), in dhd_pcie_intr_count_dump()
17091 GET_SEC_USEC(bus->last_oob_irq_disable_time))); in dhd_pcie_intr_count_dump()
17093 dhdpcie_get_oob_irq_status(bus), in dhd_pcie_intr_count_dump()
17097 bus->dpc_return_busdown_count, bus->non_ours_irq_count)); in dhd_pcie_intr_count_dump()
17104 GET_SEC_USEC(bus->isr_entry_time), in dhd_pcie_intr_count_dump()
17105 GET_SEC_USEC(bus->isr_exit_time))); in dhd_pcie_intr_count_dump()
17109 GET_SEC_USEC(bus->isr_sched_dpc_time), in dhd_pcie_intr_count_dump()
17110 GET_SEC_USEC(bus->rpm_sched_dpc_time), in dhd_pcie_intr_count_dump()
17111 GET_SEC_USEC(bus->last_non_ours_irq_time))); in dhd_pcie_intr_count_dump()
17114 GET_SEC_USEC(bus->dpc_entry_time), in dhd_pcie_intr_count_dump()
17115 GET_SEC_USEC(bus->last_process_ctrlbuf_time))); in dhd_pcie_intr_count_dump()
17118 GET_SEC_USEC(bus->last_process_flowring_time), in dhd_pcie_intr_count_dump()
17119 GET_SEC_USEC(bus->last_process_txcpl_time))); in dhd_pcie_intr_count_dump()
17123 GET_SEC_USEC(bus->last_process_rxcpl_time), in dhd_pcie_intr_count_dump()
17124 GET_SEC_USEC(bus->last_process_infocpl_time), in dhd_pcie_intr_count_dump()
17125 GET_SEC_USEC(bus->last_process_edl_time))); in dhd_pcie_intr_count_dump()
17128 GET_SEC_USEC(bus->dpc_exit_time), in dhd_pcie_intr_count_dump()
17129 GET_SEC_USEC(bus->resched_dpc_time))); in dhd_pcie_intr_count_dump()
17131 GET_SEC_USEC(bus->last_d3_inform_time))); in dhd_pcie_intr_count_dump()
17135 GET_SEC_USEC(bus->last_suspend_start_time), in dhd_pcie_intr_count_dump()
17136 GET_SEC_USEC(bus->last_suspend_end_time))); in dhd_pcie_intr_count_dump()
17139 GET_SEC_USEC(bus->last_resume_start_time), in dhd_pcie_intr_count_dump()
17140 GET_SEC_USEC(bus->last_resume_end_time))); in dhd_pcie_intr_count_dump()
17166 si_t *sih = dhd->bus->sih; in dhd_pcie_dump_wrapper_regs()
17274 si_setcoreidx(dhd->bus->sih, save_idx); in dhd_pcie_dump_wrapper_regs()
17280 dhdpcie_hw_war_regdump(dhd_bus_t *bus) in dhdpcie_hw_war_regdump() argument
17285 save_idx = si_coreidx(bus->sih); in dhdpcie_hw_war_regdump()
17286 if ((reg = si_setcore(bus->sih, CC_CORE_ID, 0)) != NULL) { in dhdpcie_hw_war_regdump()
17287 val = R_REG(bus->osh, reg + REG_WORK_AROUND); in dhdpcie_hw_war_regdump()
17291 if ((reg = si_setcore(bus->sih, ARMCR4_CORE_ID, 0)) != NULL) { in dhdpcie_hw_war_regdump()
17292 val = R_REG(bus->osh, reg + REG_WORK_AROUND); in dhdpcie_hw_war_regdump()
17296 if ((reg = si_setcore(bus->sih, PCIE2_CORE_ID, 0)) != NULL) { in dhdpcie_hw_war_regdump()
17297 val = R_REG(bus->osh, reg + REG_WORK_AROUND); in dhdpcie_hw_war_regdump()
17300 si_setcoreidx(bus->sih, save_idx); in dhdpcie_hw_war_regdump()
17302 val = PMU_REG_NEW(bus->sih, min_res_mask, 0, 0); in dhdpcie_hw_war_regdump()
17309 if (dhd->bus->is_linkdown) { in dhd_pcie_dma_info_dump()
17319 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x200, 0, 0), in dhd_pcie_dma_info_dump()
17320 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x204, 0, 0))); in dhd_pcie_dma_info_dump()
17322 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x208, 0, 0), in dhd_pcie_dma_info_dump()
17323 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x20C, 0, 0))); in dhd_pcie_dma_info_dump()
17325 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x210, 0, 0), in dhd_pcie_dma_info_dump()
17326 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x214, 0, 0))); in dhd_pcie_dma_info_dump()
17329 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x220, 0, 0), in dhd_pcie_dma_info_dump()
17330 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x224, 0, 0))); in dhd_pcie_dma_info_dump()
17332 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x228, 0, 0), in dhd_pcie_dma_info_dump()
17333 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x22C, 0, 0))); in dhd_pcie_dma_info_dump()
17335 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x230, 0, 0), in dhd_pcie_dma_info_dump()
17336 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x234, 0, 0))); in dhd_pcie_dma_info_dump()
17340 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x240, 0, 0), in dhd_pcie_dma_info_dump()
17341 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x244, 0, 0))); in dhd_pcie_dma_info_dump()
17343 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x248, 0, 0), in dhd_pcie_dma_info_dump()
17344 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x24C, 0, 0))); in dhd_pcie_dma_info_dump()
17346 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x250, 0, 0), in dhd_pcie_dma_info_dump()
17347 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x254, 0, 0))); in dhd_pcie_dma_info_dump()
17350 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x260, 0, 0), in dhd_pcie_dma_info_dump()
17351 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x264, 0, 0))); in dhd_pcie_dma_info_dump()
17353 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x268, 0, 0), in dhd_pcie_dma_info_dump()
17354 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x26C, 0, 0))); in dhd_pcie_dma_info_dump()
17356 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x270, 0, 0), in dhd_pcie_dma_info_dump()
17357 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, 0x274, 0, 0))); in dhd_pcie_dma_info_dump()
17371 intstatus = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_dump_int_regs()
17372 dhd->bus->pcie_mailbox_int, 0, 0); in dhd_pcie_dump_int_regs()
17378 intmask = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_dump_int_regs()
17379 dhd->bus->pcie_mailbox_mask, 0, 0); in dhd_pcie_dump_int_regs()
17385 d2h_db0 = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_dump_int_regs()
17395 dhd_bus_cmn_readshared(dhd->bus, &d2h_mb_data, D2H_MB_DATA, 0); in dhd_pcie_dump_int_regs()
17397 dhd->bus->def_intmask)); in dhd_pcie_dump_int_regs()
17407 dhdpcie_rc_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_pcie_dump_rc_conf_space_cap()
17411 dhdpcie_rc_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_pcie_dump_rc_conf_space_cap()
17413 dhdpcie_rc_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_pcie_dump_rc_conf_space_cap()
17415 dhdpcie_rc_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_pcie_dump_rc_conf_space_cap()
17417 dhdpcie_rc_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_pcie_dump_rc_conf_space_cap()
17435 dhdpcie_rc_access_cap(dhd->bus, PCIE_CAP_ID_EXP, in dhd_dump_pcie_rc_regs_for_linkdown()
17444 dhdpcie_rc_access_cap(dhd->bus, PCIE_CAP_ID_EXP, in dhd_dump_pcie_rc_regs_for_linkdown()
17453 dhdpcie_rc_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_dump_pcie_rc_regs_for_linkdown()
17462 dhdpcie_rc_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_dump_pcie_rc_regs_for_linkdown()
17487 "%c%08x", HANG_RAW_DEL, dhdpcie_rc_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_dump_pcie_rc_regs_for_linkdown()
17500 DHD_ERROR(("bus->bus_low_power_state = %d\n", dhd->bus->bus_low_power_state)); in dhd_pcie_debug_info_dump()
17501 host_irq_disabled = dhdpcie_irq_disabled(dhd->bus); in dhd_pcie_debug_info_dump()
17508 dhdpcie_dump_resource(dhd->bus); in dhd_pcie_debug_info_dump()
17514 dhd_debug_get_rc_linkcap(dhd->bus))); in dhd_pcie_debug_info_dump()
17516 if (dhd->bus->is_linkdown) { in dhd_pcie_debug_info_dump()
17524 dhd_bus_dump_imp_cfg_registers(dhd->bus); in dhd_pcie_debug_info_dump()
17527 dhdpcie_ep_access_cap(dhd->bus, PCIE_EXTCAP_ID_ERR, in dhd_pcie_debug_info_dump()
17531 dhd_pcie_config_read(dhd->bus, PCI_TLP_HDR_LOG1, sizeof(uint32)), in dhd_pcie_debug_info_dump()
17533 dhd_pcie_config_read(dhd->bus, PCI_TLP_HDR_LOG2, sizeof(uint32)), in dhd_pcie_debug_info_dump()
17535 dhd_pcie_config_read(dhd->bus, PCI_TLP_HDR_LOG3, sizeof(uint32)), in dhd_pcie_debug_info_dump()
17537 dhd_pcie_config_read(dhd->bus, PCI_TLP_HDR_LOG4, sizeof(uint32)))); in dhd_pcie_debug_info_dump()
17538 if (dhd->bus->sih->buscorerev >= 24) { in dhd_pcie_debug_info_dump()
17541 dhd_pcie_config_read(dhd->bus, PCIECFGREG_DEV_STATUS_CTRL, in dhd_pcie_debug_info_dump()
17543 dhd_pcie_config_read(dhd->bus, PCIE_CFG_SUBSYSTEM_CONTROL, in dhd_pcie_debug_info_dump()
17545 dhd_pcie_config_read(dhd->bus, PCIECFGREG_PML1_SUB_CTRL2, in dhd_pcie_debug_info_dump()
17547 dhd_bus_dump_dar_registers(dhd->bus); in dhd_pcie_debug_info_dump()
17551 if (dhd->bus->is_linkdown) { in dhd_pcie_debug_info_dump()
17556 if (MULTIBP_ENAB(dhd->bus->sih)) { in dhd_pcie_debug_info_dump()
17557 dhd_bus_pcie_pwr_req(dhd->bus); in dhd_pcie_debug_info_dump()
17567 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_PHY_DBG_CLKREQ0), in dhd_pcie_debug_info_dump()
17569 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_PHY_DBG_CLKREQ1), in dhd_pcie_debug_info_dump()
17571 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_PHY_DBG_CLKREQ2), in dhd_pcie_debug_info_dump()
17573 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_PHY_DBG_CLKREQ3))); in dhd_pcie_debug_info_dump()
17576 if (dhd->bus->sih->buscorerev >= 24) { in dhd_pcie_debug_info_dump()
17581 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_PHY_LTSSM_HIST_0), in dhd_pcie_debug_info_dump()
17583 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_PHY_LTSSM_HIST_1), in dhd_pcie_debug_info_dump()
17585 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_PHY_LTSSM_HIST_2), in dhd_pcie_debug_info_dump()
17587 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_PHY_LTSSM_HIST_3))); in dhd_pcie_debug_info_dump()
17591 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_TREFUP), in dhd_pcie_debug_info_dump()
17593 dhd_pcie_corereg_read(dhd->bus->sih, PCIECFGREG_TREFUP_EXT))); in dhd_pcie_debug_info_dump()
17599 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17602 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17604 PCIFunctionIntstatus(dhd->bus->sih->buscorerev), in dhd_pcie_debug_info_dump()
17605 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17606 PCIFunctionIntstatus(dhd->bus->sih->buscorerev), 0, 0), in dhd_pcie_debug_info_dump()
17607 PCIFunctionIntmask(dhd->bus->sih->buscorerev), in dhd_pcie_debug_info_dump()
17608 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17609 PCIFunctionIntmask(dhd->bus->sih->buscorerev), 0, 0), in dhd_pcie_debug_info_dump()
17610 PCIPowerIntstatus(dhd->bus->sih->buscorerev), in dhd_pcie_debug_info_dump()
17611 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17612 PCIPowerIntstatus(dhd->bus->sih->buscorerev), 0, 0), in dhd_pcie_debug_info_dump()
17613 PCIPowerIntmask(dhd->bus->sih->buscorerev), in dhd_pcie_debug_info_dump()
17614 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17615 PCIPowerIntmask(dhd->bus->sih->buscorerev), 0, 0))); in dhd_pcie_debug_info_dump()
17619 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17622 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17625 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17628 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17632 si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, in dhd_pcie_debug_info_dump()
17636 dhdpcie_hw_war_regdump(dhd->bus); in dhd_pcie_debug_info_dump()
17642 if (MULTIBP_ENAB(dhd->bus->sih)) { in dhd_pcie_debug_info_dump()
17643 dhd_bus_pcie_pwr_req_clear(dhd->bus); in dhd_pcie_debug_info_dump()
17650 dhd_bus_force_bt_quiesce_enabled(struct dhd_bus *bus) in dhd_bus_force_bt_quiesce_enabled() argument
17652 return bus->force_bt_quiesce; in dhd_bus_force_bt_quiesce_enabled()
17658 return (dhdp->bus->bp_base); in dhd_bus_get_bp_base()
17664 dhd_bus_get_hp2p_ring_max_size(struct dhd_bus *bus, bool tx) in dhd_bus_get_hp2p_ring_max_size() argument
17667 return bus->hp2p_txcpl_max_items; in dhd_bus_get_hp2p_ring_max_size()
17669 return bus->hp2p_rxcpl_max_items; in dhd_bus_get_hp2p_ring_max_size()
17673 dhd_bus_set_hp2p_ring_max_size(struct dhd_bus *bus, bool tx, uint16 val) in dhd_bus_set_hp2p_ring_max_size() argument
17676 bus->hp2p_txcpl_max_items = val; in dhd_bus_set_hp2p_ring_max_size()
17678 bus->hp2p_rxcpl_max_items = val; in dhd_bus_set_hp2p_ring_max_size()
17686 return si_scan_core_present(dhdp->bus->sih) ? in dhd_d11_slices_num_get()
17692 dhd_bus_tcm_test(struct dhd_bus *bus) in dhd_bus_tcm_test() argument
17711 if (!bus) { in dhd_bus_tcm_test()
17712 DHD_ERROR(("%s: bus is NULL !\n", __FUNCTION__)); in dhd_bus_tcm_test()
17716 read_buf = MALLOCZ(bus->dhd->osh, MEMBLOCK); in dhd_bus_tcm_test()
17723 write_buf = MALLOCZ(bus->dhd->osh, MEMBLOCK); in dhd_bus_tcm_test()
17726 MFREE(bus->dhd->osh, read_buf, MEMBLOCK); in dhd_bus_tcm_test()
17731 DHD_ERROR(("%s: start %x, size: %x\n", __FUNCTION__, bus->dongle_ram_base, bus->ramsize)); in dhd_bus_tcm_test()
17735 start = bus->dongle_ram_base; in dhd_bus_tcm_test()
17737 size = bus->ramsize; in dhd_bus_tcm_test()
17745 if ((ret = dhdpcie_bus_membytes(bus, TRUE, start, write_buf, read_size))) { in dhd_bus_tcm_test()
17747 MFREE(bus->dhd->osh, read_buf, MEMBLOCK); in dhd_bus_tcm_test()
17748 MFREE(bus->dhd->osh, write_buf, MEMBLOCK); in dhd_bus_tcm_test()
17753 if ((ret = dhdpcie_bus_membytes(bus, FALSE, start, read_buf, read_size))) { in dhd_bus_tcm_test()
17755 MFREE(bus->dhd->osh, read_buf, MEMBLOCK); in dhd_bus_tcm_test()
17756 MFREE(bus->dhd->osh, write_buf, MEMBLOCK); in dhd_bus_tcm_test()
17766 MFREE(bus->dhd->osh, read_buf, MEMBLOCK); in dhd_bus_tcm_test()
17767 MFREE(bus->dhd->osh, write_buf, MEMBLOCK); in dhd_bus_tcm_test()
17778 MFREE(bus->dhd->osh, read_buf, MEMBLOCK); in dhd_bus_tcm_test()
17779 MFREE(bus->dhd->osh, write_buf, MEMBLOCK); in dhd_bus_tcm_test()
17801 dhd_bus_checkdied(struct dhd_bus *bus, char *data, uint size) in dhd_bus_checkdied() argument
17803 return dhdpcie_checkdied(bus, data, size); in dhd_bus_checkdied()